qiangdaqi.map.eqn

实现n路抢答功能

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-- without limitation, that your use is for the sole purpose of 
-- programming logic devices manufactured by Altera and sold by 
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-- applicable agreement for further details.
--D1_ringin is cnt10:u3|ringin
--operation mode is normal

D1_ringin_lut_out = VCC;
D1_ringin = DFFEA(D1_ringin_lut_out, D1_clk1, clr, , D1L38, GND, D1L37);

--D1L39Q is cnt10:u3|ringin~20
--operation mode is normal

D1L39Q = D1_ringin;


--D1_t4 is cnt10:u3|t4
--operation mode is normal

D1_t4_lut_out = VCC;
D1_t4 = DFFEA(D1_t4_lut_out, D1_temp2, clr, , , , );

--D1L49Q is cnt10:u3|t4~1
--operation mode is normal

D1L49Q = D1_t4;


--D1L42 is cnt10:u3|ring~24
--operation mode is normal

D1L42 = D1_ringin & clk2 & (!D1_t4);

--D1L43 is cnt10:u3|ring~25
--operation mode is normal

D1L43 = D1_ringin & clk2 & (!D1_t4);


--D1_t3 is cnt10:u3|t3
--operation mode is normal

D1_t3_lut_out = VCC;
D1_t3 = DFFEA(D1_t3_lut_out, D1_temp, clr, , , , );

--D1L47Q is cnt10:u3|t3~1
--operation mode is normal

D1L47Q = D1_t3;


--B1_temp[0] is sel0:u1|temp[0]
--operation mode is normal

B1_temp[0]_lut_out = !B1_temp[0] & !B1_temp[1];
B1_temp[0] = DFFEA(B1_temp[0]_lut_out, B1_din, , , , , );

--B1L9Q is sel0:u1|temp[0]~51
--operation mode is normal

B1L9Q = B1_temp[0];


--B1_temp[1] is sel0:u1|temp[1]
--operation mode is normal

B1_temp[1]_lut_out = !B1_temp[1] & (B1_temp[0]);
B1_temp[1] = DFFEA(B1_temp[1]_lut_out, B1_din, , , , , );

--B1L11Q is sel0:u1|temp[1]~52
--operation mode is normal

B1L11Q = B1_temp[1];


--D1_q1[0] is cnt10:u3|q1[0]
--operation mode is normal

D1_q1[0]_lut_out = !D1_q1[0];
D1_q1[0] = DFFEA(D1_q1[0]_lut_out, D1_clk1, , , D1L23, D1L3, !clr);

--D1L24Q is cnt10:u3|q1[0]~261
--operation mode is normal

D1L24Q = D1_q1[0];


--D1_q1[1] is cnt10:u3|q1[1]
--operation mode is normal

D1_q1[1]_lut_out = D1L27 # D1_q1[1] & (!D1_t3);
D1_q1[1] = DFFEA(D1_q1[1]_lut_out, D1_clk1, , , , D1L8, !clr);

--D1L28Q is cnt10:u3|q1[1]~262
--operation mode is normal

D1L28Q = D1_q1[1];


--D1_q1[2] is cnt10:u3|q1[2]
--operation mode is normal

D1_q1[2]_lut_out = D1L31 # D1_q1[2] & (!D1_t3);
D1_q1[2] = DFFEA(D1_q1[2]_lut_out, D1_clk1, , , , D1L9, !clr);

--D1L32Q is cnt10:u3|q1[2]~263
--operation mode is normal

D1L32Q = D1_q1[2];


--D1_q1[3] is cnt10:u3|q1[3]
--operation mode is normal

D1_q1[3]_lut_out = A1L35 $ (D1_q1[3]);
D1_q1[3] = DFFEA(D1_q1[3]_lut_out, D1_clk1, , , D1L23, D1L10, !clr);

--D1L35Q is cnt10:u3|q1[3]~264
--operation mode is normal

D1L35Q = D1_q1[3];


--F1_q[0] is cnt10:u3|lpm_counter:q2_rtl_0|alt_counter_f10ke:wysi_counter|q[0]
--operation mode is clrb_cntr

F1_q[0]_lut_out = (F1L9 $ F1_q[0]) & VCC;
F1_q[0] = DFFEA(F1_q[0]_lut_out, D1_clk1, , , , D1L4, !clr);

--F1L13Q is cnt10:u3|lpm_counter:q2_rtl_0|alt_counter_f10ke:wysi_counter|q[0]~0
--operation mode is clrb_cntr

F1L13Q = F1_q[0];

--F1L3 is cnt10:u3|lpm_counter:q2_rtl_0|alt_counter_f10ke:wysi_counter|counter_cell[0]~COUT
--operation mode is clrb_cntr

F1L3 = CARRY(!F1_q[0]);


--F1_q[1] is cnt10:u3|lpm_counter:q2_rtl_0|alt_counter_f10ke:wysi_counter|q[1]
--operation mode is clrb_cntr

F1_q[1]_lut_out = (F1_q[1] $ (F1L9 & F1L3)) & VCC;
F1_q[1] = DFFEA(F1_q[1]_lut_out, D1_clk1, , , , D1L5, !clr);

--F1L15Q is cnt10:u3|lpm_counter:q2_rtl_0|alt_counter_f10ke:wysi_counter|q[1]~1
--operation mode is clrb_cntr

F1L15Q = F1_q[1];

--F1L5 is cnt10:u3|lpm_counter:q2_rtl_0|alt_counter_f10ke:wysi_counter|counter_cell[1]~COUT
--operation mode is clrb_cntr

F1L5 = CARRY(!F1_q[1] & (F1L3));


--F1_q[2] is cnt10:u3|lpm_counter:q2_rtl_0|alt_counter_f10ke:wysi_counter|q[2]
--operation mode is clrb_cntr

F1_q[2]_lut_out = (F1_q[2] $ (F1L9 & F1L5)) & VCC;
F1_q[2] = DFFEA(F1_q[2]_lut_out, D1_clk1, , , , D1L6, !clr);

--F1L17Q is cnt10:u3|lpm_counter:q2_rtl_0|alt_counter_f10ke:wysi_counter|q[2]~2
--operation mode is clrb_cntr

F1L17Q = F1_q[2];

--F1L7 is cnt10:u3|lpm_counter:q2_rtl_0|alt_counter_f10ke:wysi_counter|counter_cell[2]~COUT
--operation mode is clrb_cntr

F1L7 = CARRY(!F1_q[2] & (F1L5));


--F1_q[3] is cnt10:u3|lpm_counter:q2_rtl_0|alt_counter_f10ke:wysi_counter|q[3]
--operation mode is clrb_cntr

F1_q[3]_lut_out = (F1_q[3] $ (F1L9 & F1L7)) & VCC;
F1_q[3] = DFFEA(F1_q[3]_lut_out, D1_clk1, , , , D1L7, !clr);

--F1L19Q is cnt10:u3|lpm_counter:q2_rtl_0|alt_counter_f10ke:wysi_counter|q[3]~3
--operation mode is clrb_cntr

F1L19Q = F1_q[3];


--D1_clk1 is cnt10:u3|clk1
--operation mode is normal

D1_clk1 = clk & (!C1_cout);

--D1L2 is cnt10:u3|clk1~7
--operation mode is normal

D1L2 = clk & (!C1_cout);


--A1L33 is rtl~0
--operation mode is normal

A1L33 = !D1_q1[3] & !D1_q1[2] & !D1_q1[0] & !D1_q1[1];

--A1L36 is rtl~16
--operation mode is normal

A1L36 = !D1_q1[3] & !D1_q1[2] & !D1_q1[0] & !D1_q1[1];


--D1L19 is cnt10:u3|process2~33
--operation mode is normal

D1L19 = !F1_q[0] & !F1_q[1] & !F1_q[2] & !F1_q[3];

--D1L20 is cnt10:u3|process2~34
--operation mode is normal

D1L20 = !F1_q[0] & !F1_q[1] & !F1_q[2] & !F1_q[3];


--D1L38 is cnt10:u3|ringin~2
--operation mode is normal

D1L38 = D1_t3 & A1L33 & D1L19;

--D1L40 is cnt10:u3|ringin~21
--operation mode is normal

D1L40 = D1_t3 & A1L33 & D1L19;


--D1L37 is cnt10:u3|ringin~0
--operation mode is normal

D1L37 = D1_t3 & C1_cout;

--D1L41 is cnt10:u3|ringin~22
--operation mode is normal

D1L41 = D1_t3 & C1_cout;


--D1_t6 is cnt10:u3|t6
--operation mode is normal

D1_t6_lut_out = D1_t1;
D1_t6 = DFFEA(D1_t6_lut_out, clk2, , , , , );

--D1L53Q is cnt10:u3|t6~1
--operation mode is normal

D1L53Q = D1_t6;


--D1_t5 is cnt10:u3|t5
--operation mode is normal

D1_t5_lut_out = din;
D1_t5 = DFFEA(D1_t5_lut_out, clk2, , , , , );

--D1L51Q is cnt10:u3|t5~1
--operation mode is normal

D1L51Q = D1_t5;


--D1_temp2 is cnt10:u3|temp2
--operation mode is normal

D1_temp2 = D1_t6 & (!D1_t5);

--D1L56 is cnt10:u3|temp2~7
--operation mode is normal

D1L56 = D1_t6 & (!D1_t5);


--D1_t1 is cnt10:u3|t1
--operation mode is normal

D1_t1_lut_out = star;
D1_t1 = DFFEA(D1_t1_lut_out, clk2, , , , , );

--D1L45Q is cnt10:u3|t1~1
--operation mode is normal

D1L45Q = D1_t1;


--D1_temp is cnt10:u3|temp
--operation mode is normal

D1_temp = D1_t6 & (!D1_t1);

--D1L57 is cnt10:u3|temp~7
--operation mode is normal

D1L57 = D1_t6 & (!D1_t1);


--B1_t2 is sel0:u1|t2
--operation mode is normal

B1_t2_lut_out = B1_t1;
B1_t2 = DFFEA(B1_t2_lut_out, clk2, , , , , );

--B1L6Q is sel0:u1|t2~1
--operation mode is normal

B1L6Q = B1_t2;


--B1_t1 is sel0:u1|t1
--operation mode is normal

B1_t1_lut_out = sel;
B1_t1 = DFFEA(B1_t1_lut_out, clk2, , , , , );

--B1L4Q is sel0:u1|t1~1
--operation mode is normal

B1L4Q = B1_t1;


--B1_din is sel0:u1|din
--operation mode is normal

B1_din = B1_t2 & (!B1_t1);

--B1L2 is sel0:u1|din~7
--operation mode is normal

B1L2 = B1_t2 & (!B1_t1);


--D1L3 is cnt10:u3|Mux~126
--operation mode is normal

D1L3 = D1_q1[0] & B1_temp[0] & B1_temp[1];

--D1L11 is cnt10:u3|Mux~137
--operation mode is normal

D1L11 = D1_q1[0] & B1_temp[0] & B1_temp[1];


--F1L9 is cnt10:u3|lpm_counter:q2_rtl_0|alt_counter_f10ke:wysi_counter|counter_cell[3]~0
--operation mode is normal

F1L9 = A1L33 & D1L23;

--F1L10 is cnt10:u3|lpm_counter:q2_rtl_0|alt_counter_f10ke:wysi_counter|counter_cell[3]~40
--operation mode is normal

F1L10 = A1L33 & D1L23;


--D1L4 is cnt10:u3|Mux~130
--operation mode is normal

D1L4 = B1_temp[1] & F1_q[0] # !B1_temp[0];

--D1L12 is cnt10:u3|Mux~138
--operation mode is normal

D1L12 = B1_temp[1] & F1_q[0] # !B1_temp[0];


--D1L5 is cnt10:u3|Mux~131
--operation mode is normal

D1L5 = B1_temp[0] & F1_q[1] # !B1_temp[1];

--D1L13 is cnt10:u3|Mux~139
--operation mode is normal

D1L13 = B1_temp[0] & F1_q[1] # !B1_temp[1];


--D1L6 is cnt10:u3|Mux~132
--operation mode is normal

D1L6 = B1_temp[0] & (F1_q[2] # !B1_temp[1]);

--D1L14 is cnt10:u3|Mux~140
--operation mode is normal

D1L14 = B1_temp[0] & (F1_q[2] # !B1_temp[1]);


--D1L7 is cnt10:u3|Mux~133
--operation mode is normal

D1L7 = B1_temp[1] & (F1_q[3] # !B1_temp[0]);

--D1L15 is cnt10:u3|Mux~141
--operation mode is normal

D1L15 = B1_temp[1] & (F1_q[3] # !B1_temp[0]);


--C1L3 is qiangda:u2|Mux~2683
--operation mode is normal

C1L3 = data[0] & !data[6] & !data[2] & !data[4] # !data[0] & (data[6] & !data[2] & !data[4] # !data[6] & (data[2] $ data[4]));

--C1L14 is qiangda:u2|Mux~2694
--operation mode is normal

C1L14 = data[0] & !data[6] & !data[2] & !data[4] # !data[0] & (data[6] & !data[2] & !data[4] # !data[6] & (data[2] $ data[4]));


--C1L4 is qiangda:u2|Mux~2684
--operation mode is normal

C1L4 = C1L3 & (!data[1]);

--C1L15 is qiangda:u2|Mux~2695
--operation mode is normal

C1L15 = C1L3 & (!data[1]);


--C1L25 is qiangda:u2|process0~478
--operation mode is normal

C1L25 = data[4] & !data[5] & !data[7] & !data[6] # !data[4] & (data[5] & !data[7] & !data[6] # !data[5] & (data[7] $ data[6]));

--C1L31 is qiangda:u2|process0~484
--operation mode is normal

C1L31 = data[4] & !data[5] & !data[7] & !data[6] # !data[4] & (data[5] & !data[7] & !data[6] # !data[5] & (data[7] $ data[6]));


--C1L5 is qiangda:u2|Mux~2685
--operation mode is normal

C1L5 = !data[1] & !data[0] & !data[2] & !data[3];

--C1L16 is qiangda:u2|Mux~2696
--operation mode is normal

C1L16 = !data[1] & !data[0] & !data[2] & !data[3];


--C1L26 is qiangda:u2|process0~479
--operation mode is normal

C1L26 = C1L25 & D1_t3 & C1L5 & !C1_cout;

--C1L32 is qiangda:u2|process0~485
--operation mode is normal

C1L32 = C1L25 & D1_t3 & C1L5 & !C1_cout;