📄 sysdef.inc
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call ReadIND
sub a, reg
rlc pr1
sub a, @0
call WriteIND
inc pr0
jbs r3, zflag
jmp submrw_read1
inc pr0+1
jbc r3, zflag
inc pr0+2
submrw_read1:
call ReadIND
sub a, reg+1
jbs pr1, 0
add a, @1
sub a, @0
call WriteIND
.ENDIF
.ENDM
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
.MACRO SUBMRD addr,reg,access
.LOCAL SUBMRD_BYTE2
.LOCAL SUBMRD_BYTE3
.LOCAL submrd_read1
.LOCAL submrd_read2
.LOCAL submrd_read3
;RAM
.IF access = 0
mov A, reg
sub addr, a
rlc pr1
mov a, reg+1
sub addr+1, a
jbc pr1,0
jmp SUBMRD_BYTE2
mov addr+1, addr+1
jbc r3,zflag
bc r3,cflag
dec addr+1
SUBMRD_BYTE2:
rlc pr1
mov a, reg+2
sub addr+2, a
jbc pr1,0
jmp SUBMRD_BYTE3
mov addr+2, addr+2
jbc r3,zflag
bc r3,cflag
dec addr+2
SUBMRD_BYTE3:
jbs r3, cflag
dec addr+3
mov a, reg+3
sub addr+3, a
.ENDIF
;ROM
.IF access = 1
ERROR "Can't write to ROM data"
.ENDIF
; IO
.IF access = 2
ior addr
sub a, reg
rlc pr1
sub a, @0
iow addr
ior addr+1
sub a, reg+1
rlc pr1
jbs pr1, 1
add a, @0xFF
iow addr+1
jbs r3, cflag
bc pr1, 0
ior addr+2
sub a, reg+2
rlc pr1
jbc pr1, 1
add a, @0xFF
iow addr+2
jbs r3, cflag
bc pr1, 0
ior addr+3
sub a, reg+3
rlc pr1
jbc pr1, 1
add a, @0xFF
iow addr+3
.ENDIF
;IND
.IF access = 3
mov a, @.B0.(addr)
mov pr0, a
mov a, @.B1.(addr)
mov pr0+1, a
mov a, @.B2.(addr)
mov pr0+2, a
call ReadIND
sub a, reg
rlc pr1
sub a, @0
call WriteIND
inc pr0
jbs r3, zflag
jmp submrd_read1
inc pr0+1
jbc r3, zflag
inc pr0+2
call ReadIND
sub a, reg+1
rlc pr1
jbs pr1, 1
add a, @0xFF
call WriteIND
jbs r3, cflag
bc pr1, 0
inc pr0
jbs r3, zflag
jmp submrd_read2
inc pr0+1
jbc r3, zflag
inc pr0+2
submrd_read2:
call ReadIND
sub a, reg+2
rlc pr1
jbs pr1, 1
add a, @0xFF
call WriteIND
jbs r3, cflag
bc pr1, 0
inc pr0
jbs r3, zflag
jmp submrd_read3
inc pr0+1
jbc r3, zflag
inc pr0+2
submrd_read3:
call ReadIND
sub a, reg+3
rlc pr1
jbs pr1, 1
add a, @0xFF
call WriteIND
.ENDIF
.ENDM
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
.MACRO ORMRB addr,reg,access
; RAM
.IF access = 0
mov a, reg
or addr, a
.ENDIF
;ROM
.IF access = 1
ERROR "Can't write to ROM data"
.ENDIF
; IO
.IF access = 2
ior addr
or a, reg
iow addr
.ENDIF
;IND
.IF access = 3
mov a, @.B0.(addr)
mov pr0, a
mov a, @.B1.(addr)
mov pr0+1, a
mov a, @.B2.(addr)
mov pr0+2, a
call ReadIND
or a, reg
call WriteIND
.ENDIF
.ENDM
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
.MACRO ORMRW addr,reg,access
.LOCAL ormw_read
; RAM
.IF access = 0
mov a, reg
or addr, a
mov a, reg+1
or addr+1, a
.ENDIF
;ROM
.IF access = 1
ERROR "Can't write to ROM data"
.ENDIF
; IO
.IF access = 2
ior addr
or a, reg
iow addr
ior addr+1
or a, reg+1
iow addr+1
.ENDIF
;IND
.IF access = 3
mov a, @.B0.(addr)
mov pr0, a
mov a, @.B1.(addr)
mov pr0+1, a
mov a, @.B2.(addr)
mov pr0+2, a
call ReadIND
or a, reg
call WriteIND
inc pr0
jbs r3, zflag
jmp ormw_read
inc pr0+1
jbc r3, zflag
inc pr0+2
ormw_read:
call ReadIND
or a, reg+1
call WriteIND
.ENDIF
.ENDM
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
.MACRO ORMRD addr,reg,access
.LOCAL ormd_read1
.LOCAL ormd_read2
.LOCAL ormd_read3
; RAM
.IF access = 0
mov a, reg
or addr, a
mov a, reg+1
or addr+1, a
mov a, reg+2
or addr+2, a
mov a, reg+3
or addr+3, a
.ENDIF
;ROM
.IF access = 1
ERROR "Can't write to ROM data"
.ENDIF
; IO
.IF access = 2
ior addr
or a, reg
iow addr
ior addr+1
or a, reg+1
iow addr+1
ior addr+2
or a, reg+2
iow addr+2
ior addr+3
or a, reg+3
iow addr+3
.ENDIF
;IND
.IF access = 3
mov a, @.B0.(addr)
mov pr0, a
mov a, @.B1.(addr)
mov pr0+1, a
mov a, @.B2.(addr)
mov pr0+2, a
call ReadIND
or a, reg
call WriteIND
inc pr0
jbs r3, zflag
jmp ormd_read1
inc pr0+1
jbc r3, zflag
inc pr0+2
ormd_read1:
call ReadIND
or a, reg+1
call WriteIND
inc pr0
jbs r3, zflag
jmp ormd_read2
inc pr0+1
jbc r3, zflag
inc pr0+2
ormd_read2:
call ReadIND
or a, reg+2
call WriteIND
inc pr0
jbs r3, zflag
jmp ormd_read3
inc pr0+1
jbc r3, zflag
inc pr0+2
ormd_read3:
call ReadIND
or a, reg+3
call WriteIND
.ENDIF
.ENDM
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
.MACRO XORMRB addr,reg,access
; RAM
.IF access = 0
mov a, reg
xor addr, a
.ENDIF
;ROM
.IF access = 1
ERROR "Can't write to ROM data"
.ENDIF
; IO
.IF access = 2
ior addr
xor a, reg
iow addr
.ENDIF
;IND
.IF access = 3
mov a, @.B0.(addr)
mov pr0, a
mov a, @.B1.(addr)
mov pr0+1, a
mov a, @.B2.(addr)
mov pr0+2, a
call ReadIND
xor a, reg
call WriteIND
.ENDIF
.ENDM
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
.MACRO XORMRW addr,reg,access
.LOCAL xormrw_read
; RAM
.IF access = 0
mov a, reg
xor addr, a
mov a, reg+1
xor addr+1, a
.ENDIF
;ROM
.IF access = 1
ERROR "Can't write to ROM data"
.ENDIF
; IO
.IF access = 2
ior addr
xor a, reg
iow addr
ior addr+1
xor a, reg+1
iow addr+1
.ENDIF
;IND
.IF access = 3
mov a, @.B0.(addr)
mov pr0, a
mov a, @.B1.(addr)
mov pr0+1, a
mov a, @.B2.(addr)
mov pr0+1, a
call ReadIND
xor a, reg
call WriteIND
inc pr0
jbs r3, zflag
jmp xormrw_read
inc pr0+1
jbc r3, zflag
inc pr0+2
xormrw_read:
call ReadIND
xor a, reg+1
call WriteIND
.ENDIF
.ENDM
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
.MACRO XORMRD addr,reg,access
.LOCAL xormrd_read1
.LOCAL xormrd_read2
.LOCAL xormrd_read3
; RAM
.IF access = 0
mov a, reg
xor addr, a
mov a, reg+1
xor addr+1, a
mov a, reg+2
xor addr+2, a
mov a, reg+3
xor addr+3, a
.ENDIF
;ROM
.IF access = 1
ERROR "Can't write to ROM data"
.ENDIF
; IO
.IF access = 2
ior addr
xor a, reg
iow addr
ior addr+1
xor a, reg+1
iow addr+1
ior addr+2
xor a, reg+2
iow addr+2
ior addr+3
xor a, reg+3
iow addr+3
.ENDIF
;IND
.IF access = 3
mov a, @.B0.(addr)
mov pr0, a
mov a, @.B1.(addr)
mov pr0+1, a
mov a, @.B2.(addr)
mov pr0+2, a
call ReadIND
xor a, reg
call WriteIND
inc pr0
jbs r3, zflag
jmp xormrd_read1
inc pr0+1
jbc r3, zflag
inc pr0+2
xormrd_read1:
call ReadIND
xor a, reg+1
call WriteIND
inc pr0
jbs r3, zflag
jmp xormrd_read2
inc pr0+1
jbc r3, zflag
inc pr0+2
xormrd_read2:
call ReadIND
xor a, reg+2
call WriteIND
inc pr0
jbs r3, zflag
jmp xormrd_read3
inc pr0+1
jbc r3, zflag
inc pr0+2
xormrd_read3:
call ReadIND
xor a, reg+3
call WriteIND
.ENDIF
.ENDM
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
.MACRO ANDMRB addr,reg,access
; RAM
.IF access = 0
mov a, reg
and addr, a
.ENDIF
;ROM
.IF access = 1
ERROR "Can't write to ROM data"
.ENDIF
; IO
.IF access = 2
ior addr
and a, reg
iow addr
.ENDIF
;IND
.IF access = 3
mov a, @.B0.(addr)
mov pr0, a
mov a, @.B1.(addr)
mov pr0+1, a
mov a, @.B2.(addr)
mov pr0+2, a
call ReadIND
and a, reg
call WriteIND
.ENDIF
.ENDM
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
.MACRO ANDMRW addr,reg,access
.LOCAL andmrw_read
; RAM
.IF access = 0
mov a, reg
and addr, a
mov a, reg+1
and addr+1, a
.ENDIF
;ROM
.IF access = 1
ERROR "Can't write to ROM data"
.ENDIF
; IO
.IF access = 2
ior addr
and a, reg
iow addr
ior addr+1
and a, reg+1
iow addr+1
.ENDIF
;IND
.IF access = 3
mov a, @.B0.(addr)
mov pr0, a
mov a, @.B1.(addr)
mov pr0+1, a
call ReadIND
and a, reg
call WriteIND
inc pr0
jbs r3, zflag
jmp andmrw_read
inc pr0+1
jbc r3, zflag
inc pr0+2
andmrw_read:
call ReadIND
and a, reg+1
call WriteIND
.ENDIF
.ENDM
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
.MACRO ANDMRD addr,reg,access
.LOCAL andmrd_read1
.LOCAL andmrd_read2
.LOCAL andmrd_read3
; RAM
.IF access = 0
mov a, reg
and addr, a
mov a, reg+1
and addr+1, a
mov a, reg+2
and addr+2, a
mov a, reg+3
and addr+3, a
.ENDIF
;ROM
.IF access = 1
ERROR "Can't write to ROM data"
.ENDIF
; IO
.IF access = 2
ior addr
and a, reg
iow addr
ior addr+1
and a, reg+1
iow addr+1
ior addr+2
and a, reg+2
iow addr+2
ior addr+3
and a, reg+3
iow addr+3
.ENDIF
;IND
.IF access = 3
mov a, @.B0.(addr)
mov pr0, a
mov a, @.B1.(addr)
mov pr0+1, a
mov a, @.B2.(addr)
mov pr0+2, a
call ReadIND
and a, reg
call WriteIND
inc pr0
jbs r3, zflag
jmp andmrd_read1
inc pr0+1
jbc r3, zflag
inc pr0+2
andmrd_read1:
call ReadIND
and a, reg+1
call WriteIND
inc pr0
jbs r3, zflag
jmp andmrd_read2
inc pr0+1
jbc r3, zflag
inc pr0+2
andmrd_read2:
call ReadIND
and a, reg+2
call WriteIND
inc pr0
jbs r3, zflag
jmp andmrd_read3
inc pr0+1
jbc r3, zflag
inc pr0+2
andmrd_read3:
call ReadIND
and a, reg+3
call WriteIND
.ENDIF
.ENDM
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
.MACRO ADDMIB addr,imm,access
;RAM
.IF access = 0
mov a, @imm
add addr, a
.ENDIF
;ROM
.IF access = 1
ERROR "Can't write to ROM data"
.ENDIF
; IO
.IF access = 2
ior addr
add a, @imm
iow addr
.ENDIF
;IND
.IF access = 3
mov a, @.B0.(addr)
mov pr0, a
mov a, @.B1.(addr)
mov pr0+1, a
mov a, @.B2.(addr)
mov pr0+2, a
call ReadIND
add a, @imm
call WriteIND
.ENDIF
.ENDM
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
.MACRO ADDMIW addr,imm,access
.LOCAL addmiw_read
; RAM
.IF access = 0
mov a, @.B0.imm
add addr, a
jbc r3, cflag
inc addr+1
mov a, @.B1.imm
add addr+1, a
.ENDIF
;ROM
.IF access = 1
ERROR "Can't write to ROM data"
.ENDIF
; IO
.IF access = 2
ior addr
add a, @.B0.imm
iow addr
ior addr+1
jbc r3, cflag
add a, 1
add a, @.B1.imm
iow addr+1
.ENDIF
;IND
.IF access = 3
mov a, @.B0.(addr)
mov pr0, a
mov a, @.B1.(addr)
mov pr0+1, a
mov a, @.B2.(addr)
mov pr0+2, a
call ReadIND
add a, @.B0.imm
call WriteIND
inc pr0
jbs r3, zflag
jmp addmiw_read
inc pr0+1
jbc r3, zflag
inc pr0+2
addmiw_read:
call ReadIND
jbc r3, cflag
add a, @1
add a, @.B1.imm
call WriteIND
.ENDIF
.ENDM
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
.MACRO ADDMID addr,imm,access
.local ADDMID_BYTE2
.local ADDMID_BYTE3
.LOCAL addmid_read1
.LOCAL addmid_read2
.LOCAL addmid_read3
;RAM
.IF access = 0
mov A, @.B0.imm
add addr, a
rlc pr1
mov a, @.B1.imm
add addr+1, a
jbs pr1,0
jmp ADDMID_BYTE2
inc addr+1
jbc r3,zflag
bs r3,cflag
ADDMID_BYTE2:
rlc pr1
mov a, @.B2.imm
add addr+2, a
jbs pr1,0
jmp ADDMID_BYTE3
inc addr+2
jbc r3,zflag
bs r3,cflag
ADDMID_BYTE3:
jbc r3, cflag
inc addr+3
mov a, @.B3.imm
add addr+3, a
.ENDIF
;ROM
.IF access = 1
ERROR "Can't write to ROM data"
.ENDIF
; IO
.IF access = 2
ior addr
add a, @.B0.imm
iow addr
rlc pr1
ior addr+1
add a, @.B1.imm
rlc pr1
jbc pr1, 1
add a, 1
iow addr+1
jbc r3, zflag
bs pr1, 0
ior addr+2
add a, @.B2.imm
rlc pr1
jbc pr1, 1
add a, 1
iow addr+2
jbc r3, zflag
bs pr1, 0
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