📄 irq_asm.s
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;/****************************************************************
;** *
;** FILE : IRQ_asm.S *
;** COPYRIGHT : (c) 2004 .Xiamen Yaxon NetWork CO.LTD *
;** *
;** *
;** 2004/10/22 *
;****************************************************************/
AREA IRQ, CODE, READONLY
INCLUDE at91m40800.inc
EXPORT AIC_ISR_TBL
EXPORT C_ISR_TBL
;----------------------------------------------------------------
;- IRQ Entry
;- Register initialization
;- Banked Registers ; Irq_register
;- SPSR need to be saved for nested interrupt
;- R13_irq <- Irq Stack register
;- R14_irq <- Irq link register
;- Outpout in ARM_MODE_SVC
;-----------------------------------------------------------------
MACRO
IRQ_ENTRY
;- Adjust and save LR_irq in IRQ stack
sub lr, lr, #4 ; THE NEXT INSTRUCTOR ADDR
stmfd sp!, {lr}
;- Write in the IVR to support Protect Mode
;- No effect in Normal Mode
;- De-assert the NIRQ and clear the source in Protect Mode
ldr r14, =AT91C_BASE_AIC
str r14, [r14, #AIC_IVR] ; STILL NOT UNDERSTAND
;- Save SPSR and r0 in IRQ stack
mrs r14, SPSR
stmfd sp!, {r14}
;- Enable Interrupt and Switch in Supervisor Mode
msr CPSR_c, #ARM_MODE_SVC
;- Save scratch/used registers and LR in User Stack
stmfd sp!, { r0-r3, r12, r14}
;stmfd sp!, {r0-r12, r14}
MEND
;-----------------------------------------------------------------
;- IRQ Exit
;-----------------------------------------------------------------
MACRO
IRQ_EXIT
;- Restore scratch/used registers and LR from User Stack
ldmia sp!, { r0-r3, r12, r14}
; ldmia sp!, {r0-r12, r14}
;- Disable Interrupt and switch back in IRQ mode
msr CPSR_c, #I_BIT :OR: ARM_MODE_IRQ
;- Mark the End of Interrupt on the AIC
ldr r14, =AT91C_BASE_AIC
str r14, [r14, #AIC_EOICR]
;- Restore SPSR_irq and r0 from IRQ stack
ldmia sp!, {r14}
msr SPSR_cxsf, r14
;- Restore adjusted LR_irq from IRQ stack directly in the PC
ldmia sp!, {pc}^
MEND
;-----------------------------------------------------------------
;- FIQ Entry Macro - NO NESTED
;
;- FIQ Entry with no nested (reentrant) interrupt allowed.
;- Register initialization
;- Banked Registers ; FIQ_register
;- SPSR does not need to be save because we do not want nested FIQ
;- R13_fiq <- Same as above. No need to save it.
;- R14_irq <- link register
;-----------------------------------------------------------------
MACRO
FIQ_ENTRY
;- Switch in SYS/User Mode to allow User Stack access for C code and
;Disable FIQ and IRQ Interrupt for this mode
; because the FIQ is not yet acknowledged
msr CPSR_c, #I_BIT:OR:F_BIT:OR:ARM_MODE_SVC
;- Save scratch/used registers and LR in User Stack
stmfd sp!, { r0-r3, r12, lr}
MEND
;-----------------------------------------------------------------
;- FIQ Exit -
;-----------------------------------------------------------------
MACRO
FIQ_EXIT
;- Restore scratch/used registers and LR from User Stack
ldmia sp!, { r0-r3, r12, lr}
;- Leave Interrupts disabled and switch back in FIQ mode
msr CPSR_c, #I_BIT :OR: F_BIT :OR: ARM_MODE_FIQ
;- Restore the Program Counter using the LR_fiq directly in the PC
subs pc,lr,#4
MEND
; EXPORT TC1_asm_irq_handler
; IMPORT at91_TC1_handler
;TC1_asm_irq_handler
;- Manage Exception Entry
; IRQ_ENTRY
;- Call the PIO Interrupt C handler
; ldr r0, =at91_TC1_handler
; mov r14, pc
; bx r0
; IRQ_EXIT
;-----------------------------------------------------------------
;- INTERRUPT HANDLE FUNCTION MACRO
;-----------------------------------------------------------------
MACRO
$IRQINT_HANDLER IRQHANDLER $int_func
$IRQINT_HANDLER
IRQ_ENTRY
ldr r0, =$int_func
ldr r0, [r0]
mov r14, pc
bx r0
IRQ_EXIT
MEND
MACRO
$FIQINT_HANDLER FIQHANDLER $int_func
$FIQINT_HANDLER
FIQ_ENTRY
ldr r0, =$int_func
ldr r0, [r0]
mov r14, pc
bx r0
FIQ_EXIT
MEND
;-----------------------------------------------------------------
;- INTERRUPT HANDLE FUNCTION MACRO END
;-----------------------------------------------------------------
;-----------------------------------------------------------------
;- FIQ AND IRQ ISR handler code
;- THESE ROUTINES CAN CALLED BY AIC_SVR
;-----------------------------------------------------------------
LTORG
FIQ_HDL_FIQ FIQHANDLER HANDLE_FIQ
IRQ_HDL_SWIIRQ IRQHANDLER HANDLE_SWIIRQ
IRQ_HDL_US0IRQ IRQHANDLER HANDLE_US0IRQ
IRQ_HDL_US1IRQ IRQHANDLER HANDLE_US1IRQ
IRQ_HDL_TC0IRQ IRQHANDLER HANDLE_TC0IRQ
IRQ_HDL_TC1IRQ IRQHANDLER HANDLE_TC1IRQ
IRQ_HDL_TC2IRQ IRQHANDLER HANDLE_TC2IRQ
IRQ_HDL_WDIRQ IRQHANDLER HANDLE_WDIRQ
IRQ_HDL_PIOIRQ IRQHANDLER HANDLE_PIOIRQ
IRQ_HDL_IRQ0 IRQHANDLER HANDLE_IRQ0
IRQ_HDL_IRQ1 IRQHANDLER HANDLE_IRQ1
IRQ_HDL_IRQ2 IRQHANDLER HANDLE_IRQ2
;-----------------------------------------------------------------
;- DEFINE A TABLE WHICH CONTAIN THE INTERRUPT SERVICE FUNCTION
;-----------------------------------------------------------------
AIC_ISR_TBL
DCD FIQ_HDL_FIQ
DCD IRQ_HDL_SWIIRQ
DCD IRQ_HDL_US0IRQ
DCD IRQ_HDL_US1IRQ
DCD IRQ_HDL_TC0IRQ
DCD IRQ_HDL_TC1IRQ
DCD IRQ_HDL_TC2IRQ
DCD IRQ_HDL_WDIRQ
DCD IRQ_HDL_PIOIRQ
DCD 0
DCD 0
DCD 0
DCD 0
DCD 0
DCD 0
DCD 0
DCD IRQ_HDL_IRQ0
DCD IRQ_HDL_IRQ1
DCD IRQ_HDL_IRQ2
;-----------------------------------------------------------------
;- THIS FUNCTION CAN BE READWRITE
;-----------------------------------------------------------------
AREA C_ISR_TABLE, DATA, READWRITE
LTORG
C_ISR_TBL
HANDLE_FIQ DCD 0
HANDLE_SWIIRQ DCD 0
HANDLE_US0IRQ DCD 0
HANDLE_US1IRQ DCD 0
HANDLE_TC0IRQ DCD 0
HANDLE_TC1IRQ DCD 0
HANDLE_TC2IRQ DCD 0
HANDLE_WDIRQ DCD 0
HANDLE_PIOIRQ DCD 0
HANDLE_RES9 DCD 0
HANDLE_RES10 DCD 0
HANDLE_RES11 DCD 0
HANDLE_RES12 DCD 0
HANDLE_RES13 DCD 0
HANDLE_RES14 DCD 0
HANDLE_RES15 DCD 0
HANDLE_IRQ0 DCD 0
HANDLE_IRQ1 DCD 0
HANDLE_IRQ2 DCD 0
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