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📄 main.asm

📁 the filter program write myself,the effect is not bad ,look and kool
💻 ASM
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;*************************************************************************
;文件名:		main6_11.asm
;日期:      	2006年12月15日
;公司(作者):  
;描述和说明:    Filling Data Memory with Known Values
;*************************************************************************
				.include  	f2407.h 	; 引用汇编头文件
				.include	fircycle_struct.asm;coeff file and struct file is
									;separated,prevent coeff being copied twice
				.copy	 vectors.h
				.ref	FIRFILTC_INIT; inialize the filter struct
				.ref	FIRFILTC_CALC; the true calcuate program
				.ref	sample_res,firlp_res
				.global	conver_time,total_time
				.def	xn,yn,fir,dbuffer,stk,sampdata_ptr
period			.set		 4000;4000(10K,40M)2625(15.238K,40M)
;-------------------------------------------------
xn				.usect".bss",1;the new sample data
yn				.usect".bss",1;the filter result unit
;tttttttttttttttttttttttttttttttttttttttttttttttttttttt;below bss is for test 
conver_time		.usect".bss",1;,m parameter is optional,block alignment(128)
								;usually used in struct 
total_time		.usect".bss",1;variable" conversion and total_time" is used to count
							  ;the ad conversion time and interrup routine time,see
							  ;follow
;temp			.usect".bss",1
sampdata_ptr	.usect".bss",1;search sampdata address that store the 128 pot data
;tttttttttttttttttttttttttttttttttttttttttttttttttttttt
;------------------------------------------------------
fir_order		.set		71;
dbuffer_size	.set		128;initalize the dbuffer basic fir_order
fir				.usect".bss",FIR_CYCLE_LEN,1;notice the block boundary
fir				.tag	FIR_CYCLE
dbuffer			.usect".buffer",dbuffer_size;
;*******************************************************
;adress of dbuffer is imporant,must be start with like 300h,400h,500h,it is
;determated by the bit reversion cycyle.
;*******************************************************
;-------------------------------------matlab load
				.def	BL,B
BL				.usect".bss",1
B				.usect".fircoeff",fir_order
;--------------------------------------

;--------------------------------------------------Setup the software stack
stk_len 		.set    100              ;stack length
stk     		.usect  ".stack",stk_len  ;reserve space for stack
;----------------------------------------------------
KICK_DOG		.macro
		LDP     #DP_PF1
		SPLK	#05555H,WDKEY 
		SPLK	#0AAAAH,WDKEY
				.endm
			    .sect".text"
start:
;-----------------------------------------this segment is system initialize	
		SETC 	INTM	;关闭总中断
		CLRC 	SXM		;禁止符号扩展
		CLRC 	OVM		;正常溢出,结果装入acc
		CLRC 	CNF		;b0作为data空间
		LDP 	#DP_PF1;指向系统寄存器页
		SPLK	#00FDH,SCSR1;CLKOUT=CPUCLK*4倍频*使能所有模块时钟*清除无效地址检测位
		LACC	SCSR2 
		OR		#0000000000001010B;saram映射到片内数据区*禁止引导rom*可以软禁dog
		AND		#1111111110001110b;外部信号至少保存5个cpuclk*xmif 正常驱动模式
									;注意以上对scsr2操作并未影响mp//mc位
									;reset default able to disable  watchdog
									;warning!!!! 5th bit must be clear 0,avoid
									;SCSR2.5 be writed 1 to clear 0,then the dog
									;cannot bi  kickout.then error!
		SACL	SCSR2
		SPLK	#0000000001101111b,WDCR	;清除复位标志防止混淆*关看门狗截断wdcntr输入时钟*key=101*
		                                ;if  enable dog ,wdclk/64 driver the  wdcntr register
		KICK_DOG
		LDP		#0 
		SPLK	#0001h,IMR		;允许INT1中断
		LACC	IFR
		SACL	IFR				;清所有中断标志
		LAR     AR1, #stk       ;AR1 is the stack pointer
;----------------------------------end of system initalize
		CALL	ADINIT          			;初始化ADC程序,T1 start ad conversion
		CALL	PWMINIT						;initialize pwm ,T3 is symmetry(up mode) and T4
											;(up and down mode) is asymmetry pwm wave
;--------------------------------------start of filter initalize
		LDP		#fir;nien bit (0304h)
		SPLK	#B,fir.coeff_ptr
		SPLK	#dbuffer,fir.dbuffer_ptr
		SPLK	#fir_order,fir.order
		MAR		*,AR1;AR1 creat the software stack
		SPLK	#fir,*+
		CALL	FIRFILTC_INIT
		MAR		*-;AR1 ->stk(0800h-SARAM);AR1 point the top of stk again
;--------------------------------------end of filter initalize
;tttttttttttttttttttttttttttttttttttttt ;below is for test (graph)
		LAR		AR7,#501
		LAR		AR6,#firlp_res;AR6,AR7 cannot be modified,it is special for
							  ;test AR7=count,AR6=adress_ptr
		LAR		AR5,#501;AR5,AR6,AR7 cannot be push into stack,they must be
						;modified in ISR to count
		SPLK	#8000H,sampdata_ptr
;ttttttttttttttttttttttttttttttttttttttt;AR7 store the size of frilp_res
;		LDP		#DP_B2
;		SPLK	#57,temp
;		LT		temp
;		MPY		#02C8H
		CLRC	INTM					;enable INTM,start T1
										;this must be done at the last
		CALL	T1START
;----------------------------------start main loop	
LOOP:
;ttttttttttttttttttttttttttttttttttttttt
		LDP		#PADATDIR>>7
		SPLK	#0FFFFH,PADATDIR
;tttttttttttttttttttttttttttttttttttttt
;--------------------------------------

		B		LOOP
;*****************************************************************************
ADINIT:
    	LDP		#DP_PF2
		SPLK	#4000H,ADCTRL1;reset adc module
		NOP
		SPLK	#1000H,ADCTRL1 ;not  continus,not seq,high interrupt,run free under emulator
	  	SPLK	#0700H,ADCTRL2 ; 	allow  eva start adc,clear flag,immediately go interrupt when flag=1;
    	SPLK	#0000H,MAXCONV 		;只转换一个通道
	   	SPLK	#0004H,CHSELSEQ1
		LDP		#DP_EVA      			
		SPLK	#0000H,T1CNT
     	SPLK	#9000H,T1CON ;free run*increase count*inner clk=clkout
		SPLK	#period,T1PR
     	SPLK	#0140H,GPTCONA;T1 start adc enable
     	SPLK	#0000H,EVAIMRA ;diable all interrupt
     	SPLK	#0FFFFH,EVAIFRA;clear all flags
	  	RET
PWMINIT:
		LDP		#DP_PF2;ADC, GPIO (0x7080 - 0x70FF)
		SPLK	#0000110000000001B,MCRC;enable PF2/PF3 basic function
		LDP		#DP_EVB
		SPLK	#0000000001001010B,GPTCONB;enable compare out,T3 high effect,T4 high effect
;----------------------------------------set T3
		SPLK	#400,T3PR;set period of symmetry pwm
		SPLK	#0000H,T3CNT
		SPLK	#1001000001000010B,T3CON ;run free when emulate halt*up mode*1 divide*
		  							;inner clk=clkout*enable compare function
									; start count
		SPLK	#100,T3CMPR
;----------------------------------------set	T4
		SPLK	#40000,T4PR;set period of asymmetry pwm
		SPLK	#0000H,T4CNT
		SPLK	#1000100001000010B,T4CON;run free when emulate halt*up and down mode
										;inner clk=clkout*use self enable bit*use self T4PR
										;enable compare function*
										;start count
		SPLK	#20000,T4CMPR
		RET
T1START:
		LDP		#DP_EVA								;启动模数转换程序
		LACC	T1CON
		OR		#0000000001000000B
		SACL	T1CON
		RET
GISR1:
;-----------------------------------this segment is used to display the sample
									;frequency by the PA0 transfer rate
		LDP		#PADATDIR>>7
		SPLK	#1111111111111110B,PADATDIR
;------------------------------------;this segment store the content of T1CNT to
									; count conversion time	
		LDP		#DP_EVA
		LACC	T1CNT,0
		LDP		#DP_B2
		SACL	conver_time
;--------------------------------------------------------
		LDP		#DP_PF1
		LACC	PIVR,1					;读取外设中断向量寄存器(PIVR),并左移一位
		ADD		#PVECTORS				;加上外设中断入口地址
		BACC							;跳到相应的中断服务子程序
ADCINT_ISR:
        MAR     *,AR1                   ;ARP=stack pointer
	    MAR     *+                      ;skip one stack location (required)
        SST     #1, *+                  ;save ST1
        SST     #0, *+                  ;save ST0
        SACH    *+                      ;save ACCH
	    SACL    *+                      ;save ACCL
		SAR		AR0,*+
		SAR		AR2,*+
		SAR		AR3,*+
		SAR		AR4,*+
;------------------------------------------contorl T3PWM
		LDP		#DP_PF2
		LACC	RESULT0,10		;stroe ACH with 10bit conversion result
		LDP		#DP_EVB
		SACH	T3CMPR			;the 10bit AD result control the duty PWM
;------------------------------------------ store sampdata to xn
;------------------------------------------prepare for filter
		LDP		#DP_B2
		SACH	xn
;------------------------------------------
;ttttttttttttttttttttttttttttttttt-below is for test (graph display)
		MAR		*,AR1
		SAR		AR0,*+; push AR0 into stack,because ARO keep the brindex
		LAR		AR0,#0;AR0 is used to compared to AR7
					  ; to keep from firlp_res overflow
		MAR		*,AR5
		CMPR	00;	test weather AR7=AR0=0
		BCND	CON1,TC
		NOP
		BANZ	SSAMPLE,*-
		B		CON1
SSAMPLE:
		LDP		#DP_B2
		LAR		AR0,#sampdata_ptr
		MAR		*,AR0
		LAR		AR0,*; use AR0 as the temp point	
		BLDD	#xn,*
		LDP		#sampdata_ptr
		LACL	sampdata_ptr
		ADD		#1
		SACL	sampdata_ptr
		LAR		AR0,#0;AR0=0 for the next  segment test program
CON1:
;ttttttttttttttttttttttttttttttttttttttttttttt
;		LDP		#DP_PF2
;		LACC	RESULT0	
;		LDP		#DP_B2	
;		SFR
;		AND		#7FFFh 	
;		SACL	xn
;--------------------------------------------
		LDP		#fir
		BLDD	#xn,fir.input
		MAR		*,AR1
		SPLK	#fir,*+
		CALL	FIRFILTC_CALC	;NOTICE:this subroutine used AR1,AR0,AR3,AR4,AR2
		MAR		*-				 ;this is imporant for return from software
								 ;stack correct
		LDP		#DP_B2
		BLDD	#fir.output,yn
;*********************************end of filter program segment
;		LACC	yn,11;Q15->Q0
;		SACH	yn
;ttttttttttttttttttttttttttttttttt-below is for test (graph display)
		MAR		*,AR7;NOTICE: this is inherit the test program before;
					 ;at this time AR0=0,and original value is in stack
		CMPR	00;	test weather AR7=AR0=0
		BCND	CONT2,TC
		BANZ	SFILTER,*-,AR6
		B		CONT2
SFILTER:	
		NOP
		BLDD	#yn,*+
CONT2:
;ttttttttttttttttttttttttttttttttt- test end
;--------------------------------this below segment reset SEQ1
		LDP		#DP_PF2  
		SPLK	#0100011100000000B,ADCTRL2
;------------------------------------------
	    MAR     *, AR1           ;ARP = AR1
	    MAR     *-               ;SP points to last entry
		LAR		AR0,*-;restore AR0 =brindex,this is for test,could deltet,
		LAR		AR4,*-
		LAR		AR3,*-
		LAR		AR2,*-
		LAR		AR0,*-
	    LACL    *-               ;restore ACCL
	    ADD     *-,16            ;restore ACCH
	    LST     #0, *-           ;restore ST0
	    LST     #1, *-           ;restore ST1, unskip one stack location
;--------------------------------------------------------------------
	    CLRC    INTM             ;re-enable interrupts
;--------------------------------------------------------------------
		LDP		#DP_EVA
		LACC	T1CNT,0
		LDP		#DP_B2
		SACL	total_time       ;the interrupt routine time is 
								 ;"total-conversion-time"
;---------------------------------------------------------------
	    RET                             ;return from the interrupt
GISR2:
		RET
GISR3:
		RET
GISR4:	
		RET
GISR5:	
		RET
GISR6:
		RET
PHANTOM:
		RET
		.end

	

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