master_main_old_1121.c
来自「DSP编程」· C语言 代码 · 共 372 行
C
372 行
//2007.11.16 by axia
//master DSP program
//dsp0/cpu1
#include <stdio.h>
#include <c6x.h>
#include <math.h>
#include "include.h"
#include "target.h"
#pragma DATA_SECTION(ImgBufferArea,"STORE_IN_IRAM");
INT16S ImgBufferArea[IMG_SIZE];
#pragma DATA_SECTION(img_buff,"STORE_IN_IRAM");
INT16U img_buff[IMG_SIZE];
#pragma DATA_SECTION(seg_buff,"STORE_IN_IRAM");
INT8U seg_buff[IMG_SIZE];
#pragma DATA_SECTION(TrashArea,"STORE_IN_SDRAM");
INT16S TrashArea[IMG_SIZE];
#pragma DATA_SECTION(symbol_tmp,"STORE_IN_IRAM")
INT16U symbol_tmp[6][8*16]={
{0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,SYMBOLGRAY,0,0,0,0,0,SYMBOLGRAY,SYMBOLGRAY,SYMBOLGRAY,0,0,0,0,0,0,0,SYMBOLGRAY,0,0,0,0,0,0,0,SYMBOLGRAY,0,0,0,0,0,0,0,SYMBOLGRAY,0,0,0,0,0,0,0,SYMBOLGRAY,0,0,0,0,0,0,0,SYMBOLGRAY,0,0,0,0,0,0,0,SYMBOLGRAY,0,0,0,0,0,0,0,SYMBOLGRAY,0,0,0,0,0,0,0,SYMBOLGRAY,0,0,0,0,0,SYMBOLGRAY,SYMBOLGRAY,SYMBOLGRAY,SYMBOLGRAY,SYMBOLGRAY,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0},
{0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,SYMBOLGRAY,SYMBOLGRAY,SYMBOLGRAY,SYMBOLGRAY,0,0,0,SYMBOLGRAY,0,0,0,0,SYMBOLGRAY,0,0,SYMBOLGRAY,0,0,0,0,SYMBOLGRAY,0,0,SYMBOLGRAY,0,0,0,0,SYMBOLGRAY,0,0,0,0,0,0,SYMBOLGRAY,0,0,0,0,0,0,0,SYMBOLGRAY,0,0,0,0,0,0,SYMBOLGRAY,0,0,0,0,0,0,SYMBOLGRAY,0,0,0,0,0,0,SYMBOLGRAY,0,0,0,0,0,0,SYMBOLGRAY,0,0,0,0,SYMBOLGRAY,0,0,SYMBOLGRAY,SYMBOLGRAY,SYMBOLGRAY,SYMBOLGRAY,SYMBOLGRAY,SYMBOLGRAY,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0},
{0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,SYMBOLGRAY,SYMBOLGRAY,SYMBOLGRAY,SYMBOLGRAY,0,0,0,SYMBOLGRAY,0,0,0,0,SYMBOLGRAY,0,0,SYMBOLGRAY,0,0,0,0,SYMBOLGRAY,0,0,0,0,0,0,SYMBOLGRAY,0,0,0,0,0,SYMBOLGRAY,SYMBOLGRAY,0,0,0,0,0,0,0,0,SYMBOLGRAY,0,0,0,0,0,0,0,0,SYMBOLGRAY,0,0,0,0,0,0,0,SYMBOLGRAY,0,0,SYMBOLGRAY,0,0,0,0,SYMBOLGRAY,0,0,SYMBOLGRAY,0,0,0,SYMBOLGRAY,0,0,0,0,SYMBOLGRAY,SYMBOLGRAY,SYMBOLGRAY,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0},
{0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,SYMBOLGRAY,0,0,0,0,0,0,SYMBOLGRAY,SYMBOLGRAY,0,0,0,0,0,SYMBOLGRAY,0,SYMBOLGRAY,0,0,0,0,SYMBOLGRAY,0,0,SYMBOLGRAY,0,0,0,0,SYMBOLGRAY,0,0,SYMBOLGRAY,0,0,0,SYMBOLGRAY,0,0,0,SYMBOLGRAY,0,0,0,SYMBOLGRAY,0,0,0,SYMBOLGRAY,0,0,0,SYMBOLGRAY,SYMBOLGRAY,SYMBOLGRAY,SYMBOLGRAY,SYMBOLGRAY,SYMBOLGRAY,0,0,0,0,0,0,SYMBOLGRAY,0,0,0,0,0,0,0,SYMBOLGRAY,0,0,0,0,0,SYMBOLGRAY,SYMBOLGRAY,SYMBOLGRAY,SYMBOLGRAY,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0},
{0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,SYMBOLGRAY,SYMBOLGRAY,SYMBOLGRAY,SYMBOLGRAY,SYMBOLGRAY,SYMBOLGRAY,0,0,SYMBOLGRAY,0,0,0,0,0,0,0,SYMBOLGRAY,0,0,0,0,0,0,0,SYMBOLGRAY,0,0,0,0,0,0,0,SYMBOLGRAY,0,SYMBOLGRAY,SYMBOLGRAY,0,0,0,0,SYMBOLGRAY,SYMBOLGRAY,0,0,SYMBOLGRAY,0,0,0,0,0,0,0,0,SYMBOLGRAY,0,0,0,0,0,0,0,SYMBOLGRAY,0,0,SYMBOLGRAY,0,0,0,0,SYMBOLGRAY,0,0,SYMBOLGRAY,0,0,0,SYMBOLGRAY,0,0,0,0,SYMBOLGRAY,SYMBOLGRAY,SYMBOLGRAY,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0},
{0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,SYMBOLGRAY,SYMBOLGRAY,SYMBOLGRAY,0,0,0,0,SYMBOLGRAY,0,0,SYMBOLGRAY,0,0,0,SYMBOLGRAY,0,0,0,0,0,0,0,SYMBOLGRAY,0,0,0,0,0,0,0,SYMBOLGRAY,0,SYMBOLGRAY,SYMBOLGRAY,0,0,0,0,SYMBOLGRAY,SYMBOLGRAY,0,0,SYMBOLGRAY,0,0,0,SYMBOLGRAY,0,0,0,0,SYMBOLGRAY,0,0,SYMBOLGRAY,0,0,0,0,SYMBOLGRAY,0,0,SYMBOLGRAY,0,0,0,0,SYMBOLGRAY,0,0,0,SYMBOLGRAY,0,0,SYMBOLGRAY,0,0,0,0,0,SYMBOLGRAY,SYMBOLGRAY,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}
};
volatile MSG message_rec1, message_rec2, message_trans;//McBSP串口通讯消息
volatile INT8U RecfromDsp1_flag=0, RecfromDsp2_flag=0, TransToDsp1_flag=0, TransToDsp2_flag=0, exch_flag=0, TransToDpram_flag=0, RawImgRxEnable=1;
volatile DSP_STATE dsp_s = {good,good,good};//3 DSPs初始状态
volatile INT32U slave1_time, slave2_time; //从DSP定时器时间
volatile INT32U tips0_start,tips0_end, tips0; //
volatile INT16S target_max, target_min, threhold;
volatile target obj={158,117,0};
volatile ATA_REC ata_rec_msg; //与控制通讯用双口RAM的数据结构
ATA_TRANS ata_trans_msg;
#define REC_FROM_CONTROLLER(BaseAddr) \
{ \
ata_rec_msg.STA_O = *(INT8S*)(BaseAddr); \
ata_rec_msg.VAR_O = *(INT8S*)(BaseAddr+1); \
ata_rec_msg.PX_O = *(INT16S*)(BaseAddr+2); \
ata_rec_msg.PY_O = *(INT16S*)(BaseAddr+4); \
ata_rec_msg.RD = *(INT16S*)(BaseAddr+6); \
ata_rec_msg.TH = *(INT16S*)(BaseAddr+8); \
ata_rec_msg.EH = *(INT16S*)(BaseAddr+10); \
ata_rec_msg.EB = *(INT16S*)(BaseAddr+12); \
ata_rec_msg.MEH = *(INT16S*)(BaseAddr+14); \
ata_rec_msg.MEB = *(INT16S*)(BaseAddr+16); \
ata_rec_msg.MR = *(INT16S*)(BaseAddr+18); \
ata_rec_msg.MV = *(INT8S*)(BaseAddr+20); \
}
#define TRANS_TO_CONTROLLER(BaseAddr) \
{ \
*(INT8S*)(BaseAddr) = ata_trans_msg.STA_VC; \
*(INT16S*)(BaseAddr+5) = ata_trans_msg.PX_O_T; \
*(INT16S*)(BaseAddr+7) = ata_trans_msg.PY_O_T; \
*(INT16S*)(BaseAddr+9) = ata_trans_msg.PX_O_R; \
*(INT16S*)(BaseAddr+11) = ata_trans_msg.PY_O_R; \
*(INT8S*)(BaseAddr+13) = ata_trans_msg.TIME_O; \
*(INT16S*)(BaseAddr+14) = ata_trans_msg.CODE_S; \
*(INT8U*)(BaseAddr+16) = ata_trans_msg.DELAY; \
}
extern far void RelocateISTP();
void InitDSP();
void main()
{
int i = 0;
InitDSP();
while(1)//main loop
{
while(RawImgRxEnable);//等待收图
//找出图像中灰度值7％的最大最小点
findthrehold(ImgBufferArea,ROW,COL,&target_max,&target_min,&threhold);
//根据最大值最小值进行动态归一化，结果存在result_img中
display(ImgBufferArea,img_buff,target_max,target_min,ROW,COL,255);
for(i=0;i<COL*ROW;i++)
seg_buff[i]=(unsigned char)img_buff[i];
REC_FROM_CONTROLLER(ADDR_OF_REC_ATA_MSG);//21 BYTES---------------------
timer_start(0);
tips0_start = TIMER_READ(0);
ContiDet1(ImgBufferArea, ROW, COL,threhold,&obj);
tips0_end=TIMER_READ(0);
tips0 = timer_count2us(tips0_end-tips0_start);
ata_trans_msg.STA_VC = 0x05; //ATA成功
ata_trans_msg.PX_O_T = obj.objx;
ata_trans_msg.PY_O_T = obj.objy;
ata_trans_msg.PX_O_R = obj.objx;
ata_trans_msg.PY_O_R = obj.objy;
ata_trans_msg.DELAY = (INT8U)tips0;
AddCross(img_buff, ROW,COL, obj.objx, obj.objy);
TRANS_TO_CONTROLLER(ADDR_OF_TRANS_ATA_MSG);//18 BYTES---------------------
//屏幕显示
edma_1Dto2D_start((int)symbol_tmp[0], (int)img_buff, CHANNEL_OF_INTERNAL_EXCH,
320, 256, 0, 0, 7, 15, 2);
SET_BIT(ESRL,CHANNEL_OF_INTERNAL_EXCH);
while(exch_flag == 0);
exch_flag = 0;
edma_1Dto2D_start((int)symbol_tmp[0], (int)img_buff, CHANNEL_OF_INTERNAL_EXCH,
320, 256, 319-7, 0, 319, 15, 2);
SET_BIT(ESRL,CHANNEL_OF_INTERNAL_EXCH);
while(exch_flag == 0);
exch_flag = 0;
/*
edma_1Dto2D_start((int)symbol_tmp[0], (int)img_buff, CHANNEL_OF_INTERNAL_EXCH,
320, 256, 0, 240, 14, 255, 2);
SET_BIT(ESRL,CHANNEL_OF_INTERNAL_EXCH);
while(exch_flag == 0);
exch_flag = 0;
edma_1Dto2D_start((int)symbol_tmp[0], (int)img_buff, CHANNEL_OF_INTERNAL_EXCH,
320, 256, 304, 240, 319, 255, 2);
SET_BIT(ESRL,CHANNEL_OF_INTERNAL_EXCH);
while(exch_flag == 0);
exch_flag = 0;
*/
TransformData(img_buff, IMG_SIZE, 2);
*(unsigned volatile int *)QDMA_S_OPT = (QDMA_PRI<<PRI) + (1<<SUM) + (1<<DUM) + (1<<TCINT)
+ (CHANNEL_OF_TARNS_TO_DPRAM%16<<TCC)
+ (CHANNEL_OF_TARNS_TO_DPRAM/16<<TCCM) + (1<<FS);
while(TransToDpram_flag == 0);
TransToDpram_flag = 0;
}
}
void InitDSP()
{
volatile int temp, i;
// Initial the common control registers
CSR = (1<<EN); //enable the little endian mode
IER = (1<<NMIE);
ICR = 0xffff; //clear the all interruptions
RelocateISTP();
// Initial the EMIFA and EMIFB register
*(volatile unsigned int *)EMIFA_GCR = EMIFA_GCR_PARAMS; //EMIFA global control
*(volatile unsigned int *)EMIFA_CE0 = EMIFA_CE0_PARAMS; //32bit programmable sync for DSPs，与其他DSP数据通讯
*(volatile unsigned int *)EMIFA_CE0SEC = EMIFA_CE0SEC_PARAMS;
*(volatile unsigned int *)EMIFA_CE2 = EMIFA_CE2_PARAMS; //通讯双口RAM
*(volatile unsigned int *)EMIFA_CE2SEC = EMIFA_CE2SEC_PARAMS;
*(volatile unsigned int *)EMIFA_CE3 = EMIFA_CE3_PARAMS; //32bit programmable sync for FIFO，收图
*(volatile unsigned int *)EMIFA_CE3SEC = EMIFA_CE3SEC_PARAMS; // FWFT mode
*(volatile unsigned int *)EMIFB_GCR = EMIFB_GCR_PARAMS; //EMIFB global control
*(volatile unsigned int *)EMIFB_CE0 = EMIFB_CE0_PARAMS; //16bit sync for SDRAM
*(volatile unsigned int *)EMIFB_CE1 |= EMIFB_CE1_PARAMS; //8bit async for FLASH
*(volatile unsigned int *)EMIFB_CE3 = EMIFB_CE3_PARAMS; //16bit async for dual-RAM，显示图像
*(volatile unsigned int *)EMIFB_SDCTRL = EMIFB_SDCTRL_PARAMS;
*(volatile unsigned int *)EMIFB_SDRP = EMIFB_SDRP_PARAMS;
*(volatile unsigned int *)EMIFB_SDEXT = EMIFB_SDEXT_PARAMS;
//Initial the GPIO register
*(volatile unsigned int *)GPEN |= GPEN_PARAMS;
*(volatile unsigned int *)GPDIR = GPDIR_PARAMS;
FIFO_01_LOW();
FIFO_02_LOW();
//Initial the EDMA registers
REG_WRITE(CIERL, 0x0);
REG_WRITE(CIERH, 0x0);
REG_WRITE(CIPRL, 0xFFFF);
REG_WRITE(CIPRH, 0xFFFF);
REG_WRITE(EERL, 0x0);
REG_WRITE(EERH, 0x0);
REG_WRITE(ECRL, 0xFFFF);
REG_WRITE(ECRH, 0xFFFF);
edma_null_init();
edma_start(ADDR_OF_REC_FROM_FIFO,(int)(ImgBufferArea), CHANNEL_OF_REC_FROM_FIFO,
FIXED_ADDR_MODE, INCREMENT_ADDR_MODE, 1, IMG_SIZE_IN_WORD);
edma_start(ADDR_OF_REC_FROM_FIFO,(int)(TrashArea), CHANNEL_OF_REC_FROM_FIFO_TRASH,
FIXED_ADDR_MODE, INCREMENT_ADDR_MODE, 1, IMG_SIZE_IN_WORD);
edma_start((int)(seg_buff),ADDR_OF_TRANS_TO_DSP1,CHANNEL_OF_TRANS_TO_DSP1,
INCREMENT_ADDR_MODE,FIXED_ADDR_MODE, 1, IMG_SIZE_IN_WORD/2);
edma_start((int)(seg_buff),ADDR_OF_TRANS_TO_DSP2,CHANNEL_OF_TRANS_TO_DSP2,
INCREMENT_ADDR_MODE,FIXED_ADDR_MODE, 1, IMG_SIZE_IN_WORD/2);
*(unsigned volatile int *)QDMA_OPT = (QDMA_PRI<<PRI) + (1<<SUM) + (1<<DUM) + (1<<TCINT)
+ (CHANNEL_OF_TARNS_TO_DPRAM%16<<TCC)
+ (CHANNEL_OF_TARNS_TO_DPRAM/16<<TCCM) + (1<<FS);
*(unsigned volatile int *)QDMA_SRC = (int)img_buff;
*(unsigned volatile int *)QDMA_DST = ADDR_OF_DUALPORT_RAM;
*(unsigned volatile int *)QDMA_CNT = IMG_SIZE_IN_WORD;
*(unsigned volatile int *)CIERL |= (1<<CHANNEL_OF_TARNS_TO_DPRAM);
// Initial the McBSP registers
mcbsp_init(McBSP_TO_DSP1, 5); //modify the ClkGdv value in SRGR
RESET_BIT(McBSP_SPCR(McBSP_TO_DSP1), RRST);
SPORT_edmar_init((int)&message_rec1, McBSP_TO_DSP1, MSG_SIZE);
SET_BIT(McBSP_SPCR(McBSP_TO_DSP1), RRST);
mcbsp_init(McBSP_TO_DSP2, 5); //modify the ClkGdv value in SRGR
RESET_BIT(McBSP_SPCR(McBSP_TO_DSP2), RRST);
SPORT_edmar_init((int)&message_rec2, McBSP_TO_DSP2, MSG_SIZE);
SET_BIT(McBSP_SPCR(McBSP_TO_DSP2), RRST);
//Initial the Timer register for interrupt
slave1_time = 9999999;
slave2_time = 9999999;
C6000_Set_Up_TIMER_Tick_In_Microseconds(1000, 1);
//dpram
ata_trans_msg.STA_VC = 0x00; //默认待命
TRANS_TO_CONTROLLER(ADDR_OF_TRANS_ATA_MSG);
//Open the needed Interrupt
ICR = IFR | ((1<<IF4)+(1<<IF5)+(1<<IF6)+(1<<IF7)+(1<<IF8)+(1<<IF15));
IER |= ((1<<IF4)+(1<<IF5)+(1<<IF6)+(1<<IF7)+(1<<IF8)+(1<<IF15));
CSR |= (1<<GIE);
}
//从红外头收图中断
interrupt void RecOrg_isr()
{
if(RawImgRxEnable)
{
// BusEnable = 0; //Lock the System Bus
SET_BIT(ESRL,CHANNEL_OF_REC_FROM_FIFO); //trig rec EDMA
}
else
{
// BusEnable = 0; //Lock the System Bus
SET_BIT(ESRL,CHANNEL_OF_REC_FROM_FIFO_TRASH); //trig rec EDMA
}
REC_FROM_CONTROLLER(ADDR_OF_REC_ATA_MSG);
}
//从DSP超时无响应中断
interrupt void timer1_isr()
{
if((--slave1_time)<=0)
{
slave1_time = 9999999;
dsp_s.Dsp1State = bad;
TransToDsp1_flag = 1;
RecfromDsp1_flag = 1;
}
if((--slave2_time)<=0)
{
slave2_time = 9999999;
dsp_s.Dsp2State = bad;
TransToDsp2_flag = 1;
RecfromDsp2_flag = 1;
}
}
//EDMA中断
interrupt void edma_isr()
{
if(GET_BIT(CIPRL,McBSPr_EDMA_Ch[McBSP_TO_DSP1]))
{
REG_WRITE(CIPRL,1<<McBSPr_EDMA_Ch[McBSP_TO_DSP1]);
//消息处理
switch(message_rec1.MsgType)
{
case MSG_TYPE_PROC_RESULT:
slave1_time = 9999999;
RecfromDsp1_flag = 1;
// 算法需要赋值的--------------------
break;
case MSG_TYPE_ACK_STATE:
FIFO_01_HIGH();
FIFO_01_LOW();
SET_BIT(ESRL,CHANNEL_OF_TRANS_TO_DSP1);
break;
default:
break;
}
SPORT_edmar_init((int)&message_rec1, McBSP_TO_DSP1, MSG_SIZE);
}
if(GET_BIT(CIPRL,McBSPr_EDMA_Ch[McBSP_TO_DSP2]))
{
REG_WRITE(CIPRL,1<<McBSPr_EDMA_Ch[McBSP_TO_DSP2]);
//消息处理
switch(message_rec2.MsgType)
{
case MSG_TYPE_PROC_RESULT:
slave2_time = 9999999;
RecfromDsp2_flag = 1;
// 算法需要赋值的--------------------
break;
case MSG_TYPE_ACK_STATE:
FIFO_02_HIGH();
FIFO_02_LOW();
SET_BIT(ESRL,CHANNEL_OF_TRANS_TO_DSP2);
break;
default:
break;
}
SPORT_edmar_init((int)&message_rec2, McBSP_TO_DSP2, MSG_SIZE);
}
else if(GET_BIT(CIPRL,CHANNEL_OF_REC_FROM_FIFO))
{
REG_WRITE(CIPRL,1<<CHANNEL_OF_REC_FROM_FIFO);
edma_start(ADDR_OF_REC_FROM_FIFO,(int)(ImgBufferArea), CHANNEL_OF_REC_FROM_FIFO,
FIXED_ADDR_MODE, INCREMENT_ADDR_MODE, 1, IMG_SIZE_IN_WORD);
RawImgRxEnable = 0;
// BusEnable = 1; //Unlock the System Bus
}
else if(GET_BIT(CIPRL,CHANNEL_OF_REC_FROM_FIFO_TRASH))
{
REG_WRITE(CIPRL,1<<CHANNEL_OF_REC_FROM_FIFO_TRASH);
edma_start(ADDR_OF_REC_FROM_FIFO,(int)(TrashArea), CHANNEL_OF_REC_FROM_FIFO_TRASH,
FIXED_ADDR_MODE, INCREMENT_ADDR_MODE, 1, IMG_SIZE_IN_WORD);
// BusEnable = 1; //Unlock the System Bus
}
else if(GET_BIT(CIPRL,CHANNEL_OF_TRANS_TO_DSP1))
{
REG_WRITE(CIPRL,1<<CHANNEL_OF_TRANS_TO_DSP1);
edma_start((int)(seg_buff),ADDR_OF_TRANS_TO_DSP1,CHANNEL_OF_TRANS_TO_DSP1,
INCREMENT_ADDR_MODE,FIXED_ADDR_MODE, 1, IMG_SIZE_IN_WORD/2);
TransToDsp1_flag = 1;
}
else if(GET_BIT(CIPRL,CHANNEL_OF_TRANS_TO_DSP2))
{
REG_WRITE(CIPRL,1<<CHANNEL_OF_TRANS_TO_DSP2);
edma_start((int)(seg_buff),ADDR_OF_TRANS_TO_DSP2,CHANNEL_OF_TRANS_TO_DSP2,
INCREMENT_ADDR_MODE,FIXED_ADDR_MODE, 1, IMG_SIZE_IN_WORD/2);
TransToDsp2_flag = 1;
}
else if(GET_BIT(CIPRL,CHANNEL_OF_INTERNAL_EXCH))
{
REG_WRITE(CIPRL,1<<CHANNEL_OF_INTERNAL_EXCH);
exch_flag = 1;
}
else if(GET_BIT(CIPRL,CHANNEL_OF_TARNS_TO_DPRAM))
{
REG_WRITE(CIPRL,1<<CHANNEL_OF_TARNS_TO_DPRAM);
edma_start((int)(img_buff),ADDR_OF_DUALPORT_RAM, CHANNEL_OF_TARNS_TO_DPRAM,
INCREMENT_ADDR_MODE, INCREMENT_ADDR_MODE, 1, IMG_SIZE_IN_WORD);
RawImgRxEnable = 1;
TransToDpram_flag = 1;
}
}
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