boot.asm

DSP编程

        .title  "Flash bootup utility for 6414 dsk"
       
; EMIF registers and values   
EMIFA_GCR 	  .equ    0x01800000  	;EMIFA global control.
EMIFA_CE0 	  .equ    0x01800008  	;EMIFA CE0 space control reg.
EMIFA_CE0SEC  .equ    0x01800048  	;EMIFA CE0 space secondary control.
EMIFB_GCR 	  .equ    0x01A80000	;EMIFB global control.    
EMIFB_CE1     .equ    0x01A80004	;EMIFB CE1 space control reg.
EMIFB_CE3     .equ    0x01A80014    ;EMIFB CE3 space control reg.

EMIFA_GCR_V    .equ    0x00012328	;EMIFA global control value.
EMIFA_CE0_V    .equ    0xffffff43	;EMIFA CE0 space control reg value.
EMIFA_CE0SEC_V .equ    0x00000072	;EMIFA CE0 space secondary control value.
EMIFB_GCR_V    .equ    0x00002360	;EMIFB global control value.
EMIFB_CE1_V    .equ    0xffffff03	;EMIFB CE1 space control reg value.
EMIFB_CE3_V    .equ    0x10410110	;EMIFB CE3 space control reg value.

;ADDR_OF_MODE	.equ	0x80000014	;The Address of Selectable Mode Reg in FPGA1.
;ADDR_OF_MODE	.equ	0x6C03FF66	;The Address of Selectable Mode Reg in Dualport-RAM.

	.global _BootRam
	.global _BootRom
	.global copy_table_1
;	.global copy_table_2
    .global _RelocateISTP

    .ref  __vector    				;Memory location for default
	
_BootRom .sect ".boot_rom" 
                                           
; **************       
; Configure EMIF                
; **************
                            
            mvkl  EMIFA_GCR,A4		;EMIFA_GCR address ->A4
      ||    mvkl  EMIFA_GCR_V,B4      
            mvkh  EMIFA_GCR,A4
      ||    mvkh  EMIFA_GCR_V,B4                            
            stw   B4,*A4
            
            mvkl  EMIFA_CE0,A4		;EMIFA_CE0 address ->A4
      ||    mvkl  EMIFA_CE0_V,B4      
            mvkh  EMIFA_CE0,A4
      ||    mvkh  EMIFA_CE0_V,B4                            
            stw   B4,*A4
            
            mvkl  EMIFA_CE0SEC,A4	;EMIFA_CE0SEC address ->A4
      ||    mvkl  EMIFA_CE0SEC_V,B4      
            mvkh  EMIFA_CE0SEC,A4
      ||    mvkh  EMIFA_CE0SEC_V,B4                            
            stw   B4,*A4
            
            mvkl  EMIFB_GCR,A4		;EMIFB_GCR address ->A4
      ||    mvkl  EMIFB_GCR_V,B4      
            mvkh  EMIFB_GCR,A4
      ||    mvkh  EMIFB_GCR_V,B4                            
            stw   B4,*A4
            
            mvkl  EMIFB_CE1,A4      ;EMIFB_CE1 address ->A4
      ||    mvkl  EMIFB_CE1_V,B4
            mvkh  EMIFB_CE1,A4
      ||    mvkh  EMIFB_CE1_V,B4
            stw   B4,*A4
            
            mvkl  EMIFB_CE3,A4		;EMIFB_CE3 address ->A4
      ||    mvkl  EMIFB_CE3_V,B4      
            mvkh  EMIFB_CE3,A4
      ||    mvkh  EMIFB_CE3_V,B4                            
            stw   B4,*A4

; *************            
; Copy Sections
; *************
S_R   .set	b4
D_R   .set	a4

;select mode
;			mvkl  ADDR_OF_MODE,A4	;MODE Reg address ->A4
;			mvkh  ADDR_OF_MODE,A4
;			ldw  *A4,B0			;Load unsigned 32-bit Data (from FPGA1).
		;	ldhu  *A4,B0			;Load unsigned 16-bit Data (from Dualport-RAM).
;			nop   4
	    				
			mvkl  copy_table_1, A3	;Select other mode
	    	mvkh  copy_table_1, A3
	    	nop	4

copy_section_top:	
	    	ldw   *A3++, B0			;Load src copy lenth      B0 = cnt
	    	ldw   *A3++, A4			;Load ram start address   A4 = (dst)
	    	ldw   *A3++, B4			;Load flash start address B4 = (src)
	    	nop   2
	[!b0]   b	  copy_done			;Have we copied all sections? 
	    	nop	  5
	    	
			shr   B0,2,B1			;Divide size by 4 (because we're in 32-bit mode)
	    	
copy_loop:
	        ldw        *S_R++,B5
  ||        mv         B1, A1       ;Copy data length.
  ||        sub        B1, 1, B1
  
	[B1]    ldw        *S_R++,B5
  ||[B1]    sub        B1, 1, B1
	[B1]    ldw        *S_R++,B5
  ||[B1]    sub        B1, 1, B1
	[B1]    ldw        *S_R++,B5
  ||[B1]    sub        B1, 1, B1
	[B1]    ldw        *S_R++,B5
  ||[B1]    sub        B1, 1, B1

            stw        B5,*D_R++
  ||        sub        A1, 1, A1
    [A1]    stw        B5,*D_R++
  ||[A1]    sub        A1, 1, A1
    [A1]    stw        B5,*D_R++
  ||[A1]    sub        A1, 1, A1
    [A1]    stw        B5,*D_R++
  ||[A1]    sub        A1, 1, A1
    [A1]    stw        B5,*D_R++
  ||[A1]    sub        A1, 1, A1
  
    [B1]    b          copy_loop                        
            nop        5

;next section	           
			b	  copy_section_top
			nop   5

copy_done:
            mvkl .S2 __vector,B0	;Jump to Interrupt Server Table.
	        mvkh .S2 __vector,B0
            B    .S2 B0
            nop   5
               
               
; *************
; Section Table
; *************
    ;; Table of sections to copy. Format is:
    ;; word 0:	  | word 1:     | word 2:
    ;; byte count | run address | load address
    
copy_table_1:       
    ;; .vectors
    .word 0x00000200, 0x00000400, 0x64000400
    ;; .text
    .word 0x0000f000, 0x00000600, 0x64000600
    ;; .const
;   .word 0x00000000, 0x00000600, 0x64000600
    ;; .cinit
    .word 0x00000000, 0x00000000, 0x64000000
    ;; .switch
    .word 0x00000000, 0x00000000, 0x00000000
    ;; end of table
    .word 0x00000000, 0x00000000, 0x00000000                  
    
    
; **********************
; Emulate/Simulate Boot
; **********************
_BootRam .sect ".boot_ram" 
    mvkl  .s2 __vector,B0
	mvkh  .s2 __vector,B0
	B     .s2 B0
	NOP 5

; **************
; Relocate ISTP
; **************
	.text
_RelocateISTP
	mvkl  .s2 __vector,B0
	mvkh  .s2 __vector,B0
	mvc   B0,ISTP
	B b3
	NOP 5

;************************* The end of file ********************************