sport.c

DSP编程

	*(unsigned volatile int *)(SPI_TRANS_PARAMS_RELOAD + LNK)= ((0xffff& SPI_TRANS_PARAMS_RELOAD));	
	
	
//	*(unsigned volatile int *)CIERL |= 0x200;		//Enable EDMA Done INT 
	//Transfer complete code (TCCM+ :TCC) is 00 1001

}


/*-------------------------------------------------------------------------*/
/* evt_edma_init() - used to initiate channel  EDMA         
read from a FIFO to a ram                                                    */
/*-------------------------------------------------------------------------*/
void evt_edmar_init(int src, int dst, int size, int ch)
{ 
	
	//Config the EDMA Channel 	EDMA Transfer Parameters
//	*(unsigned volatile int *)(EVENT_PARAMS_ADDR(ch) + OPT)= 0x40390002;
		//PRI ESIZE 2DS SUM 2DD DUM TCINT TCC  Reserved        LINK FS
		//010  00    0  00   0   01  1    1000 00000000000000  1    0
	*(unsigned volatile int *)(EVENT_PARAMS_ADDR(ch) + OPT)= ((0<<PRI) + (0<<ESIZE)+
									(0<<SUM) + (1<<DUM) + (0<<TCINT) + (ch<<TCC)+
									(1<<LINK) + (0<<FS));
		
	*(unsigned volatile int *)(EVENT_PARAMS_ADDR(ch) + SRC)= src;
	*(unsigned volatile int *)(EVENT_PARAMS_ADDR(ch) + CNT)= size;
	*(unsigned volatile int *)(EVENT_PARAMS_ADDR(ch) + DST)= dst;
	*(unsigned volatile int *)(EVENT_PARAMS_ADDR(ch) + IDX)= 0x00000000;
	*(unsigned volatile int *)(EVENT_PARAMS_ADDR(ch) + LNK)= ((0xffff& SPI_REC_PARAMS_RELOAD));

	*(unsigned volatile int *)(SPI_REC_PARAMS_RELOAD + OPT)= ((0<<PRI) + (0<<ESIZE)+
									(0<<SUM) + (1<<DUM) + (0<<TCINT) + (ch<<TCC)+
									(1<<LINK) + (0<<FS));
	
	*(unsigned volatile int *)(SPI_REC_PARAMS_RELOAD + SRC)= src;
	*(unsigned volatile int *)(SPI_REC_PARAMS_RELOAD + CNT)= size;
	*(unsigned volatile int *)(SPI_REC_PARAMS_RELOAD + DST)= dst;
	*(unsigned volatile int *)(SPI_REC_PARAMS_RELOAD + IDX)= 0x00000000;
	*(unsigned volatile int *)(SPI_REC_PARAMS_RELOAD+ LNK)= ((0xffff& SPI_REC_PARAMS_RELOAD));	

}

#if 0
int SPORT_edmax_init(int src, unsigned int MsBSP_ch, int size)
{ 
	unsigned char DMA_ch;
	volatile EDMA_REG  *EDMA_reg ;
	
	if((MsBSP_ch >= McBSP_CHANNEL_NUM))
		return 0;

	DMA_ch = McBSPx_EDMA_Ch[MsBSP_ch];
 	EDMA_reg = (volatile EDMA_REG  *)EVENT_PARAMS_ADDR(DMA_ch);
	*(unsigned volatile int *)ECRL |= (1<<DMA_ch);		//Clear all pending events

	EDMA_reg->opt = ((2<<PRI) + (0<<ESIZE) + 
					(0<<DS) + (1<<SUM) + 
					(0<<DD) + (0<<DUM) +
				 (1<<TCINT) + ((DMA_ch%16)<<TCC) + ((MsBSP_ch>>1)<<TCCM) +
				 (1<<LINK) + (0<<FS) );
	EDMA_reg->src = src;
	EDMA_reg->cnt = size;
	EDMA_reg->dst = SP_MEM_ADDR(MsBSP_ch);
	EDMA_reg->idx = 0x00000000;
	EDMA_reg->lnk = ((0xffff& NULL_PARAMS_ADDR));
	
	*(unsigned volatile int *)CIERL |= (1<<DMA_ch);		//Enable EDMA Done INT 
	*(unsigned volatile int *)EERL |= (1<<DMA_ch);	//only enable EVENT ch
	return 1;
}

/*-------------------------------------------------------------------------*/
/* evt_edma_init() - used to initiate channel  EDMA         
read size 32bit from a FIFO to a ram                                                    */
/*-------------------------------------------------------------------------*/
int SPORT_edmar_init(int dst, unsigned int MsBSP_ch, int size)
{ 
	unsigned char DMA_ch;
	volatile EDMA_REG  *EDMA_reg ;
	
	if((MsBSP_ch >= McBSP_CHANNEL_NUM))
		return 0;

	DMA_ch = McBSPr_EDMA_Ch[MsBSP_ch];
	
   	EDMA_reg = (volatile EDMA_REG  *)EVENT_PARAMS_ADDR(DMA_ch);
	*(unsigned volatile int *)ECRL |= (1<<DMA_ch);		//Clear all pending events
	
	//Config the EDMA Channel 	EDMA Transfer Parameters
	EDMA_reg->opt = ((2<<PRI) + (0<<ESIZE) + 
					(0<<DS) + (0<<SUM) + 
					(0<<DD) + (1<<DUM) +
				 (1<<TCINT) + ((DMA_ch%16)<<TCC) + ((MsBSP_ch>>1)<<TCCM) +
				(1<<LINK) + (0<<FS) );
	EDMA_reg->src = SP_MEM_ADDR(MsBSP_ch);
	EDMA_reg->cnt = size;
	EDMA_reg->dst = dst;
	EDMA_reg->idx = 0x00000000;
	EDMA_reg->lnk = ((0xffff& NULL_PARAMS_ADDR));
	
	*(unsigned volatile int *)CIERL |= (1<<DMA_ch);		//Enable EDMA Done INT 
	*(unsigned volatile int *)EERL |= (1<<DMA_ch);	//only enable EVENT ch
	return 1;
}
#endif

/*-------------------------------------------------------------------------*/
/* evt_edma_init() - used to initiate channel  EDMA         
read size 32bit from a FIFO to a ram              */
/*modefied by shiyan at 11/6/2003*/ 
/*-------------------------------------------------------------------------*/
int SPORT_edmar_init(int dst, unsigned int MsBSP_ch, int size)
{ 
	unsigned char DMA_ch;
	volatile EDMA_REG  *EDMA_reg ;
	
	if((MsBSP_ch >= McBSP_CHANNEL_NUM))
		return 0;

	DMA_ch = McBSPr_EDMA_Ch[MsBSP_ch];
	
   	EDMA_reg = (volatile EDMA_REG  *)EVENT_PARAMS_ADDR(DMA_ch);
	*(unsigned volatile int *)ECRL |= (1<<DMA_ch);		//Clear all pending events
	
	//Config the EDMA Channel 	EDMA Transfer Parameters
	EDMA_reg->opt = ((2<<PRI) + (0<<ESIZE) + 
					(0<<DS) + (0<<SUM) + 
					(0<<DD) + (1<<DUM) +
				 (1<<TCINT) + ((DMA_ch%16)<<TCC) + ((MsBSP_ch>>1)<<TCCM) +
				(0<<LINK) + (0<<FS) );
	EDMA_reg->src = SP_MEM_ADDR(MsBSP_ch);
	EDMA_reg->cnt = size;
	EDMA_reg->dst = dst;
	EDMA_reg->idx = 0x00000000;
	EDMA_reg->lnk = 0;
	
//	EDMA_reg->lnk = ((0xffff& NULL_PARAMS_ADDR));
	
	*(unsigned volatile int *)CIERL |= (1<<DMA_ch);		//Enable EDMA Done INT 
	*(unsigned volatile int *)EERL |= (1<<DMA_ch);	//only enable EVENT ch
	return 1;
}


int SPORT_edmax_init(int src, unsigned int MsBSP_ch, int size)
{ 
	unsigned char DMA_ch;
	volatile EDMA_REG  *EDMA_reg ;
	
	if((MsBSP_ch >= McBSP_CHANNEL_NUM))
		return 0;

	DMA_ch = McBSPx_EDMA_Ch[MsBSP_ch];
 	EDMA_reg = (volatile EDMA_REG  *)EVENT_PARAMS_ADDR(DMA_ch);
	*(unsigned volatile int *)ECRL |= (1<<DMA_ch);		//Clear all pending events

	EDMA_reg->opt = ((2<<PRI) + (0<<ESIZE) + 
					(0<<DS) + (1<<SUM) + 
					(0<<DD) + (0<<DUM) +
				 (0<<TCINT) + ((DMA_ch%16)<<TCC) + ((MsBSP_ch>>1)<<TCCM) +
				 (1<<LINK) + (0<<FS) );

	EDMA_reg->src = src;
	EDMA_reg->cnt = size;
	EDMA_reg->dst = SP_MEM_ADDR(MsBSP_ch);
	EDMA_reg->idx = 0x00000000;
	EDMA_reg->lnk = ((0xffff& NULL_PARAMS_ADDR));
	
//	*(unsigned volatile int *)CIERL |= (1<<DMA_ch);		//Enable EDMA Done INT 
//	doesn't need EDMA done interrupt.
	*(unsigned volatile int *)EERL |= (1<<DMA_ch);	//only enable EVENT ch
	return 1;
}


#ifdef _PINGPONG_VER
int SPORT_edmar_pingpong_init(int dst,int dst_ping, int dst_pong, unsigned int MsBSP_ch, int size)
{ 
	unsigned char DMA_ch;
	volatile EDMA_REG  *EDMA_reg ;
	
	if((MsBSP_ch >= McBSP_CHANNEL_NUM))
		return 0;

	SPORT_edmar_ping_pong(dst_ping, dst_pong, MsBSP_ch, size);

	DMA_ch = McBSPr_EDMA_Ch[MsBSP_ch];
	
   	EDMA_reg = (volatile EDMA_REG  *)EVENT_PARAMS_ADDR(DMA_ch);
	*(unsigned volatile int *)ECRL |= (1<<DMA_ch);		//Clear all pending events
	
	//Config the EDMA Channel 	EDMA Transfer Parameters
	EDMA_reg->opt = ((2<<PRI) + (0<<ESIZE) + 
					(0<<DS) + (0<<SUM) + 
					(0<<DD) + (1<<DUM) +
				 (1<<TCINT) + ((DMA_ch%16)<<TCC) + ((MsBSP_ch>>1)<<TCCM) +
				(1<<LINK) + (0<<FS) );
	EDMA_reg->src = SP_MEM_ADDR(MsBSP_ch);
	EDMA_reg->cnt = size;
	EDMA_reg->dst = dst;
	EDMA_reg->idx = 0x00000000;
	EDMA_reg->lnk = (0xffff & EVENT_PARAMS_ADDR(SPORT_EDMA_R_PING[MsBSP_ch]));
	//SPORT_edmar_ping_pong(dst_ping, dst_pong, MsBSP_ch, size);
//	EDMA_reg->lnk = ((0xffff& NULL_PARAMS_ADDR));
	
	*(unsigned volatile int *)CIERL |= (1<<DMA_ch);		//Enable EDMA Done INT 
	*(unsigned volatile int *)EERL |= (1<<DMA_ch);	//only enable EVENT ch
	return 1;
}

/*------------------------------------------------------------------------------*/
/* SPORT_edmar_ping                                                             */
/*------------------------------------------------------------------------------*/
void SPORT_edmar_ping_pong(int dst_ping, int dst_pong, unsigned int MsBSP_ch, int size)
{
    unsigned char DMA_ch, DMA_ch_ping, DMA_ch_pong;
    volatile EDMA_REG *EDMA_reg_ping, *EDMA_reg_pong;
    
    DMA_ch = McBSPr_EDMA_Ch[MsBSP_ch];
    DMA_ch_ping = SPORT_EDMA_R_PING[MsBSP_ch];
    DMA_ch_pong = SPORT_EDMA_R_PONG[MsBSP_ch];
    
    EDMA_reg_ping = (volatile EDMA_REG *)EVENT_PARAMS_ADDR(DMA_ch_ping);
    EDMA_reg_pong = (volatile EDMA_REG *)EVENT_PARAMS_ADDR(DMA_ch_pong);
//    *(unsigned volatile int *)ECRL |= (1<<DMA_ch_ping) + (1<<DMA_ch_pong);     //Clear all pending events
    
    //Config the EDMA Channel 	EDMA Transfer Parameters
    EDMA_reg_ping->opt = ((2<<PRI) + (0<<ESIZE) + 
				          (0<<DS) + (0<<SUM) + 
				          (0<<DD) + (1<<DUM) +
				          (1<<TCINT) + ((DMA_ch%16)<<TCC) + ((MsBSP_ch>>1)<<TCCM) +
			              (1<<LINK) + (0<<FS) );
    EDMA_reg_ping->src = SP_MEM_ADDR(MsBSP_ch);
	EDMA_reg_ping->cnt = size;
	EDMA_reg_ping->dst = dst_ping;
	EDMA_reg_ping->idx = 0x00000000;
	EDMA_reg_ping->lnk = (0xffff & EVENT_PARAMS_ADDR(SPORT_EDMA_R_PONG[MsBSP_ch]));
	
    EDMA_reg_pong->opt = ((2<<PRI) + (0<<ESIZE) + 
				          (0<<DS) + (0<<SUM) + 
				          (0<<DD) + (1<<DUM) +
				          (1<<TCINT) + ((DMA_ch%16)<<TCC) + ((MsBSP_ch>>1)<<TCCM) +
			              (1<<LINK) + (0<<FS) );
    EDMA_reg_pong->src = SP_MEM_ADDR(MsBSP_ch);
	EDMA_reg_pong->cnt = size;
	EDMA_reg_pong->dst = dst_pong;
	EDMA_reg_pong->idx = 0x00000000;
	EDMA_reg_pong->lnk = (0xffff & EVENT_PARAMS_ADDR(SPORT_EDMA_R_PING[MsBSP_ch]));
	
//	*(unsigned volatile int *)CIERL |= (1<<DMA_ch);		//Enable EDMA Done INT 
//	*(unsigned volatile int *)EERL |= (1<<DMA_ch);	//only enable EVENT ch
}
#endif