config.pl

ARM7的源代码

	CONFIG_MMU_D16 => 16,
	CONFIG_MMU_D32 => 32
	],
	      

    # Memory controller 
    CONFIG_MCTRL_8BIT => [CONFIG_MCTRL_8BIT => 1],
    CONFIG_MCTRL_16BIT => [CONFIG_MCTRL_16BIT => 1],
    CONFIG_MCTRL_5CS => [CONFIG_MCTRL_5CS => 1],
    CONFIG_MCTRL_WFB => [CONFIG_MCTRL_WFB => 1],
    CONFIG_MCTRL_SDRAM => [CONFIG_MCTRL_SDRAM => 1],
    CONFIG_MCTRL_SDRAM_INVCLK => [CONFIG_MCTRL_SDRAM_INVCLK => 1],
    
    # Peripherals 
    CONFIG_PERI_LCONF => [CONFIG_PERI_LCONF =>  1],
    CONFIG_PERI_AHBSTAT => [CONFIG_PERI_AHBSTAT => 1],
    CONFIG_PERI_WPROT => [CONFIG_PERI_WPROT => 1],
    CONFIG_PERI_WDOG => [CONFIG_PERI_WDOG => 1],
    CONFIG_PERI_IRQ2 => [CONFIG_PERI_IRQ2 => 1],
    
    # AHB 
    CONFIG_AHB_DEFMST => [CONFIG_AHB_DEFMST => sub { my ($v) = @_; return $v;}],
    CONFIG_AHB_SPLIT => [CONFIG_AHB_SPLIT => 1],
    CONFIG_AHBRAM_ENABLE => [CONFIG_AHBRAM_ENABLE => 1],
    CFG_AHBRAM_SZ => [
	CONFIG_AHBRAM_SZ1 => 1,
	CONFIG_AHBRAM_SZ2 => 2,
	CONFIG_AHBRAM_SZ4 => 3,
	CONFIG_AHBRAM_SZ8 => 4,
	CONFIG_AHBRAM_SZ16 => 5,
	CONFIG_AHBRAM_SZ32 => 6,
	CONFIG_AHBRAM_SZ64 => 7
	],
    
    
    # Debug 
    CONFIG_DEBUG_UART => [CONFIG_DEBUG_UART => 1],
    CONFIG_DEBUG_IURF => [CONFIG_DEBUG_IURF => 1],
    CONFIG_DEBUG_FPURF => [CONFIG_DEBUG_FPURF => 1],
    CONFIG_DEBUG_NOHALT => [CONFIG_DEBUG_NOHALT => 1],
    CFG_DEBUG_PCLOW => [CONFIG_DEBUG_PC32 => 0],
    CONFIG_DEBUG_RFERR => [CONFIG_DEBUG_RFERR => 1],
    CONFIG_DEBUG_CACHEMEMERR => [CONFIG_DEBUG_CACHEMEMERR => 1],
    
    # DSU 
    CONFIG_DSU_ENABLE => [CONFIG_DSU_ENABLE => sub { $ahbmst ++; return 1;} ] ,  ##; ahbmst ++;]
    
    CONFIG_DSU_TRACEBUF => [CONFIG_DSU_TRACEBUF => 1],
    CONFIG_DSU_MIXED_TRACE=> [CONFIG_DSU_MIXED_TRACE => 1],
    
    CFG_DSU_TRACE_SZ => [
	CONFIG_DSU_TRACESZ64 => 64,
	CONFIG_DSU_TRACESZ128 => 128,
	CONFIG_DSU_TRACESZ256 => 256,
	CONFIG_DSU_TRACESZ512 => 512,
	CONFIG_DSU_TRACESZ1024 => 1024
	],


    # Boot 
    CFG_BOOT_SOURCE => [
	CONFIG_BOOT_EXTPROM => "memory",
	CONFIG_BOOT_INTPROM => "prom",
	CONFIG_BOOT_MIXPROM => "dual" 
	],
    
    CONFIG_BOOT_RWS => [CONFIG_BOOT_RWS => sub { my ($v) = @_; $v = hex ($v) & 0x3;  return $v;} ],
    CONFIG_BOOT_WWS => [CONFIG_BOOT_WWS => sub { my ($v) = @_; $v = hex ($v) & 0x3;  return $v;} ],
    CONFIG_BOOT_SYSCLK => [CONFIG_BOOT_SYSCLK => sub { my ($v) = @_; return $v;} ],
    CONFIG_BOOT_BAUDRATE => [CONFIG_BOOT_BAUDRATE => sub { my ($v) = @_; $v = hex ($v) & 0x3fffff;  return $v;} ],
    CONFIG_BOOT_EXTBAUD => [CONFIG_BOOT_EXTBAUD => 1],
    CONFIG_BOOT_PROMABITS => [CONFIG_BOOT_PROMABITS => sub { my ($v) = @_; $v = hex ($v) & 0x3f;  return $v;} ],
    
    # Ethernet 
    CONFIG_ETH_ENABLE => [CONFIG_ETH_ENABLE => sub { $ahbmst++; return 1; } ], #; ahbmst++
    CONFIG_ETH_TXFIFO => [CONFIG_ETH_TXFIFO => sub { my ($v) = @_; $v = hex ($v) & 0xffff;  return $v;}],
    CONFIG_ETH_RXFIFO => [CONFIG_ETH_RXFIFO => sub { my ($v) = @_; $v = hex ($v) & 0xffff;  return $v;}],
    CONFIG_ETH_BURST  => [CONFIG_ETH_BURST => sub { my ($v) = @_; $v = hex ($v) & 0xffff;  return $v;}],



    # PCI 
    CONFIG_PCI_ENABLE => [CONFIG_PCI_ENABLE => 1],
    CFG_PCI_CORE => [
		     CONFIG_PCI_TARGET => sub { $ahbmst++; $pciahbmst = 1; $pciahbslv = 1; return "target_only"; },
		     CONFIG_PCI_OPENCORES => sub { $ahbmst++; $pciahbmst = 1; $pciahbslv = 1; return "opencores"; },
		     CONFIG_PCI_INSILICON => sub { $ahbmst+=2; $pciahbmst = 2; $pciahbslv = 1; return "insilicon"; }
		     ],
    
    CONFIG_PCI_VENDORID => [ CONFIG_PCI_VENDORID => sub { my ($v) = @_; $v = hex ($v) & 0xffff;  return $v;}],
    CONFIG_PCI_DEVICEID => [ CONFIG_PCI_DEVICEID => sub { my ($v) = @_; $v = hex ($v) & 0xffff;  return $v;}],
    CONFIG_PCI_SUBSYSID => [ CONFIG_PCI_SUBSYSID => sub { my ($v) = @_; $v = hex ($v) & 0xffff;  return $v;}],
    CONFIG_PCI_REVID    => [ CONFIG_PCI_REVID    => sub { my ($v) = @_; $v = hex ($v) & 0xff;  return $v;}],
    CONFIG_PCI_CLASSCODE => [ CONFIG_PCI_CLASSCODE => sub { my ($v) = @_; $v = hex ($v) & 0x0ffffff;  return $v;}],
    
    
    CFG_PCI_FIFO => [ CONFIG_PCI_FIFO2 => 1,
		      CONFIG_PCI_FIFO4 => 2,
		      CONFIG_PCI_FIFO8 => 3,
		      CONFIG_PCI_FIFO16 => 4,
		      CONFIG_PCI_FIFO32 => 5,
		      CONFIG_PCI_FIFO64 => 6,
		      CONFIG_PCI_FIFO128 => 7 ],
    
    CONFIG_PCI_PMEPADS => [ CONFIG_PCI_PMEPADS => 1 ],
    CONFIG_PCI_P66PAD => [ CONFIG_PCI_P66PAD => 1 ],
    CONFIG_PCI_RESETALL => [ CONFIG_PCI_RESETALL => 1 ],
    CONFIG_PCI_ARBEN => [ CONFIG_PCI_ARBEN => 1]

);		     

sub log2 {
    my ($x) = @_;
    my $i;

    $x--;
    for ($i=0; $x!=0; $i++) { $x >>= 1;}
    return $i;
}

sub sparc_config_file {
    
    my ($sparccfg) = @_;
    my %sparccfg = %{$sparccfg};
    my $fn = "vhdl/sparc/leon_device.vhd";
    my $fn_v = "vhdl/sparc/leon_device.v";
    
    $sparccfg{CONFIG_FPU_ENABLE_CONFIG_FPU_REGS} = $sparccfg{CONFIG_FPU_ENABLE}*$sparccfg{CONFIG_FPU_REGS};
    $sparccfg{CFG_ICACHE_LSZ_4} = int ($sparccfg{CFG_ICACHE_LSZ}/4);
    $sparccfg{CFG_DCACHE_LSZ_4} = int ($sparccfg{CFG_DCACHE_LSZ}/4);

    $sparccfg{CONFIG_AHB_DEFMST_ahbmst} = int ($sparccfg{CONFIG_AHB_DEFMST} % $ahbmst);
    $sparccfg{CFG_AHBRAM_SZ_7 } = 7 + $sparccfg{CFG_AHBRAM_SZ};

    $sparccfg{CONFIG_PCI_VENDORID_4} = sprintf ("%04X",$sparccfg{CONFIG_PCI_VENDORID});
    $sparccfg{CONFIG_PCI_DEVICEID_4} = sprintf ("%04X",$sparccfg{CONFIG_PCI_DEVICEID});
    $sparccfg{CONFIG_PCI_SUBSYSID_4} = sprintf ("%04X",$sparccfg{CONFIG_PCI_SUBSYSID});

    $sparccfg{CONFIG_PCI_REVID_2} = sprintf ("%02X",$sparccfg{CONFIG_PCI_REVID});
    $sparccfg{CONFIG_PCI_CLASSCODE_6} = sprintf ("%06X",$sparccfg{CONFIG_PCI_CLASSCODE});

    if ($sparccfg{CONFIG_AHBRAM_ENABLE} == 1) { $ahbram = 4; }  else { $ahbram = 0;}
    if ($sparccfg{CONFIG_DSU_ENABLE} == 1) {$dsuen = 2;} else {$dsuen = 7;}
    if ($sparccfg{CONFIG_PCI_ENABLE} == 1) {$pcien = 3;} else {$pcien = 7;}
    if ($sparccfg{CONFIG_ETH_ENABLE} == 1) {$ethen = 5;} else {$ethen = 7;}

    $sparccfg{CONFIG_ETH_TXFIFO_log2} =  log2($sparccfg{CONFIG_ETH_TXFIFO})+1;
    $sparccfg{CONFIG_ETH_RXFIFO_log2} = log2($sparccfg{CONFIG_ETH_RXFIFO})+1;
    $sparccfg{CONFIG_ETH_BURST_log2} = log2($sparccfg{CONFIG_ETH_BURST})+1;

    if (($sparccfg{CFG_ICACHE_ALGO} eq "lrr") && ($sparccfg{CFG_ICACHE_ASSO} > 2)) {
	$sparccfg{CFG_ICACHE_ALGO} = "rnd"; }
    if (($sparccfg{CFG_DCACHE_ALGO} eq "lrr") && ($sparccfg{CFG_DCACHE_ASSO} > 2)) {
	$sparccfg{CFG_DCACHE_ALGO} = "rnd"; }

    $sparccfg{ahbmst} = $ahbmst;
    $sparccfg{ahbram} = $ahbram;
    $sparccfg{dsuen} = $dsuen;
    $sparccfg{pcien} = $pcien;
    $sparccfg{ethen} = $ethen;
    $sparccfg{pciahbmst} = $pciahbmst;
    $sparccfg{pciahbslv} = $pciahbslv;
    
    if (-f $fn) {
	print STDERR ("Making backup of $fn\n");
	`cp $fn $fn.bck`;
    }
    if (-f $fn_v) {
	print STDERR ("Making backup of $fn_v\n");
	`cp $fn_v $fn_v.bck`;
    }
    
    foreach $k (keys %sparccfg) {
	$v = $sparccfg{$k};
	$sparc_config_file = cfg_replace ($k,$v,$sparc_config_file);
	$sparc_config_file_v = cfg_replace ($k,$v,$sparc_config_file_v);
	$sparc_config_file_v2 = cfg_replace ($k,$v,$sparc_config_file_v2);
	$sparc_config_file_v3 = cfg_replace ($k,$v,$sparc_config_file_v3);
    }

    if (($sparccfg{CONFIG_SYN_INFER_RAM} == 0) && (!(($sparccfg{CFG_SYN_TARGET_TECH} eq "virtex") && 
						     ($sparccfg{CFG_SYN_TARGET_TECH} eq "virtex2")))) {
	$sparc_config_file_v .= $sparc_config_file_v2;
    } else {
	$sparc_config_file_v .= $sparc_config_file_v3;
    }
    
    if (open(FILEH, ">$fn")) {
	print FILEH $sparc_config_file;
    } else {
	die ("opening \"$fn\": $!\n");
    }
    if (open(FILEH, ">$fn_v")) {
	print FILEH $sparc_config_file_v;
    } else {
	die ("opening \"$fn_v\": $!\n");
    }
}

sub cfg_replace {
    my ($k,$v,$l) = @_;
    my $type;
    if ($l =~ /%$k%\[(.)\]/) {
	$type = $1;
	if ($type eq "b") {
	    if ($v == 0) {
		$v = "false";
	    } else {
		$v = "true";
	    }
	    $l =~ s/%($k)%\[(.)\]/$v/gi;
	} else {
	    print STDERR ("Warning cound not resolve [$1] typedef\n");
	}
    }
    else {
	$l =~ s/%$k%/$v/gi;
    }
    return $l;
}


$sparc_config_file=<<SPARC_CONFIG_END;

library IEEE;
use IEEE.std_logic_1164.all;
use work.leon_target.all;

package leon_device is

-----------------------------------------------------------------------------
-- Automatically generated by vhdl/sparc/config.pl from of .config
-----------------------------------------------------------------------------


  
   constant syn_%CONFIG_CFG_NAME% : syn_config_type := ( 
    targettech => %CFG_SYN_TARGET_TECH%,infer_pads =>%CONFIG_SYN_INFER_PADS%[b],infer_pci=>%CONFIG_SYN_INFER_PCI_PADS%[b],
    infer_ram => %CONFIG_SYN_INFER_RAM%[b], infer_regf => %CONFIG_SYN_INFER_REGF%[b], infer_rom => %CONFIG_SYN_INFER_ROM%[b],
    infer_mult => %CONFIG_SYN_INFER_MULT%[b], rftype => %CONFIG_SYN_RFTYPE%, targetclk => %CONFIG_TARGET_CLK%,
    clk_mul => %CONFIG_PLL_CLK_MUL%, clk_div => %CONFIG_PLL_CLK_DIV%, pci_dll => %CONFIG_PCI_CLKDLL%[b], 
    pci_sysclk => %CONFIG_PCI_SYSCLK%[b] );

  constant iu_%CONFIG_CFG_NAME% : iu_config_type := (
    nwindows => %CONFIG_IU_NWINDOWS%, multiplier => %CFG_IU_MUL_TYPE%, mulpipe => %CONFIG_IU_MULPIPE%[b], 
    divider => %CFG_IU_DIVIDER%, mac => %CONFIG_IU_MUL_MAC%[b], fpuen => %CONFIG_FPU_ENABLE%, cpen => false, 
    fastjump => %CONFIG_IU_FASTJUMP%[b], icchold => %CONFIG_IU_ICCHOLD%[b], lddelay => %CONFIG_IU_LDELAY%, 
    fastdecode => %CONFIG_IU_FASTDECODE%[b], rflowpow => %CONFIG_IU_RFPOW%[b], watchpoints => %CONFIG_IU_WATCHPOINTS%, 
    impl => %CONFIG_IU_IMPL%, version => %CONFIG_IU_VER%);

  constant fpu_%CONFIG_CFG_NAME% : fpu_config_type := 
    (core => %CFG_FPU_CORE%, interface => %CFG_FPU_IF%, fregs => %CONFIG_FPU_ENABLE_CONFIG_FPU_REGS%, 
     version => %CONFIG_FPU_VER%);

  constant cache_%CONFIG_CFG_NAME% : cache_config_type := (
    isets => %CFG_ICACHE_ASSO%, isetsize => %CFG_ICACHE_SZ%, ilinesize => %CFG_ICACHE_LSZ_4%, 
    ireplace => %CFG_ICACHE_ALGO%, ilock => %CFG_ICACHE_LOCK%,
    dsets => %CFG_DCACHE_ASSO%, dsetsize => %CFG_DCACHE_SZ%, dlinesize => %CFG_DCACHE_LSZ_4%, 
    dreplace => %CFG_DCACHE_ALGO%, dlock => %CFG_DCACHE_LOCK%,
    dsnoop => %CFG_DCACHE_SNOOP%, drfast => %CFG_DCACHE_RFAST%[b], dwfast => %CFG_DCACHE_WFAST%[b], 
    dlram => %CFG_DCACHE_LRAM%[b], 
    dlramsize => %CFG_DCACHE_LRSZ%, dlramaddr => 16#%CFG_DCACHE_LRSTART%#);

  constant mmu_%CONFIG_CFG_NAME% : mmu_config_type := (
    enable => %CFG_MMU_ENABLE%, itlbnum => %CFG_MMU_I%, dtlbnum => %CFG_MMU_D%, tlb_type => %CFG_MMU_TYPE%, 
    tlb_rep => %CFG_MMU_REP%, tlb_diag => %CFG_MMU_DIAG%[b] );

  constant ahbrange_config  : ahbslv_addr_type := 
        (0,0,0,0,0,0,%ahbram%,0,1,%dsuen%,%pcien%,%ethen%,%pcien%,%pcien%,%pcien%,%pcien%);

  constant ahb_%CONFIG_CFG_NAME% : ahb_config_type := ( masters => %ahbmst%, defmst => %CONFIG_AHB_DEFMST_ahbmst%,
    split => %CONFIG_AHB_SPLIT%[b], testmod => false);

  constant mctrl_%CONFIG_CFG_NAME% : mctrl_config_type := (
    bus8en => %CONFIG_MCTRL_8BIT%[b], bus16en => %CONFIG_MCTRL_16BIT%[b], wendfb => %CONFIG_MCTRL_WFB%[b], 
    ramsel5 => %CONFIG_MCTRL_5CS%[b], sdramen => %CONFIG_MCTRL_SDRAM%[b], sdinvclk => %CONFIG_MCTRL_SDRAM_INVCLK%[b]);
   
  constant peri_%CONFIG_CFG_NAME% : peri_config_type := (
    cfgreg => %CONFIG_PERI_LCONF%[b], ahbstat => %CONFIG_PERI_AHBSTAT%[b], wprot => %CONFIG_PERI_WPROT%[b], 
    wdog => %CONFIG_PERI_WDOG%[b],  irq2en => %CONFIG_PERI_IRQ2%[b], ahbram => %CONFIG_AHBRAM_ENABLE%[b], 
    ahbrambits => %CFG_AHBRAM_SZ_7%, ethen => %CONFIG_ETH_ENABLE%[b] );

  constant debug_%CONFIG_CFG_NAME% : debug_config_type := ( enable => true, uart => %CONFIG_DEBUG_UART%[b],
    iureg => %CONFIG_DEBUG_IURF%[b], fpureg => %CONFIG_DEBUG_FPURF%[b], nohalt => %CONFIG_DEBUG_NOHALT%[b], 
    pclow => %CFG_DEBUG_PCLOW%,
    dsuenable => %CONFIG_DSU_ENABLE%[b], dsutrace => %CONFIG_DSU_TRACEBUF%[b], dsumixed => %CONFIG_DSU_MIXED_TRACE%[b],
    dsudpram => %CONFIG_SYN_TRACE_DPRAM%[b], tracelines => %CFG_DSU_TRACE_SZ%);

  constant boot_%CONFIG_CFG_NAME% : boot_config_type := (boot => %CFG_BOOT_SOURCE%, ramrws => %CONFIG_BOOT_RWS%,
    ramwws => %CONFIG_BOOT_WWS%, sysclk => %CONFIG_BOOT_SYSCLK%, baud => %CONFIG_BOOT_BAUDRATE%, 
    extbaud => %CONFIG_BOOT_EXTBAUD%[b], pabits => %CONFIG_BOOT_PROMABITS%);

  constant pci_%CONFIG_CFG_NAME% : pci_config_type := (
    pcicore => %CFG_PCI_CORE% , ahbmasters => %pciahbmst%, ahbslaves => %pciahbslv%,
    arbiter => %CONFIG_PCI_ARBEN%[b], fixpri => false, prilevels => 4, pcimasters => 4,
    vendorid => 16#%CONFIG_PCI_VENDORID_4%#, deviceid => 16#%CONFIG_PCI_DEVICEID_4%#, 
    subsysid => 16#%CONFIG_PCI_SUBSYSID%#,
    revisionid => 16#%CONFIG_PCI_REVID_2%#, classcode =>16#%CONFIG_PCI_CLASSCODE_6%#, pmepads => %CONFIG_PCI_PMEPADS%[b],
    p66pad => %CONFIG_PCI_P66PAD%[b], pcirstall => %CONFIG_PCI_RESETALL%[b]);

  constant irq2cfg : irq2type := irq2none;

-----------------------------------------------------------------------------
-- end of automatic configuration
-----------------------------------------------------------------------------

end leon_device;

SPARC_CONFIG_END

$sparc_config_file_v =<<SPARC_CONFIG_V_END;

`define HEADER_VENDOR_ID    16'h%CONFIG_PCI_VENDORID_4%
`define HEADER_DEVICE_ID    16'h%CONFIG_PCI_DEVICEID_4%
`define HEADER_REVISION_ID  8'h%CONFIG_PCI_REVID_2%

`define ETH_WISHBONE_B3

`define ETH_TX_FIFO_CNT_WIDTH  %CONFIG_ETH_TXFIFO%_log2%
`define ETH_TX_FIFO_DEPTH      %CONFIG_ETH_TXFIFO%

`define ETH_RX_FIFO_CNT_WIDTH  %CONFIG_ETH_RXFIFO_log2%
`define ETH_RX_FIFO_DEPTH      %CONFIG_ETH_RXFIFO%

`define ETH_BURST_CNT_WIDTH    %CONFIG_ETH_BURST_log2%
`define ETH_BURST_LENGTH       %CONFIG_ETH_BURST%

SPARC_CONFIG_V_END



$sparc_config_file_v2 =<<SPARC_CONFIG_V2_END;

`define FPGA
`define XILINX
`define WBW_ADDR_LENGTH 7
`define WBR_ADDR_LENGTH 7
`define PCIW_ADDR_LENGTH 7
`define PCIR_ADDR_LENGTH 7
`define PCI_FIFO_RAM_ADDR_LENGTH 8 
`define WB_FIFO_RAM_ADDR_LENGTH 8   


SPARC_CONFIG_V2_END

$sparc_config_file_v3 =<<SPARC_CONFIG_V3_END;

`define WB_RAM_DONT_SHARE
`define PCI_RAM_DONT_SHARE
`define WBW_ADDR_LENGTH %CFG_PCI_FIFO%
`define WBR_ADDR_LENGTH %CFG_PCI_FIFO%
`define PCIW_ADDR_LENGTH %CFG_PCI_FIFO%
`define PCIR_ADDR_LENGTH %CFG_PCI_FIFO%
`define PCI_FIFO_RAM_ADDR_LENGTH %CFG_PCI_FIFO% 
`define WB_FIFO_RAM_ADDR_LENGTH %CFG_PCI_FIFO%    

SPARC_CONFIG_V3_END


1;