📄 multlib.vhd
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---- Modified Booth algorithm architecture--library ieee;use ieee.std_logic_1164.all;architecture BOOTHCODER of BOOTHCODER_18_18 is-- Components used in the architecturecomponent PP_LOWport( ONEPOS, ONENEG, TWONEG: in std_logic; INA, INB: in std_logic; PPBIT: out std_logic);end component;component PP_MIDDLEport( ONEPOS, ONENEG, TWOPOS, TWONEG: in std_logic; INA, INB, INC, IND: in std_logic; PPBIT: out std_logic);end component;component PP_HIGHport( ONEPOS, ONENEG, TWOPOS, TWONEG: in std_logic; INA, INB: in std_logic; PPBIT: out std_logic);end component;component R_GATEport( INA, INB, INC: in std_logic; PPBIT: out std_logic);end component;component DECODERport( INA, INB, INC: in std_logic; TWOPOS, TWONEG, ONEPOS, ONENEG: out std_logic);end component;-- Internal signal in Booth structuresignal INV_MULTIPLICAND: std_logic_vector(0 to 17);signal INT_MULTIPLIER: std_logic_vector(0 to 35);signal LOGIC_ONE, LOGIC_ZERO: std_logic;beginLOGIC_ONE <= '1';LOGIC_ZERO <= '0';-- Begin decoder block 1DEC_0:DECODER -- Decoder of multiplier operand port map ( INA => LOGIC_ZERO,INB => OPB(0),INC => OPB(1), TWOPOS => INT_MULTIPLIER(0),TWONEG => INT_MULTIPLIER(1),ONEPOS => INT_MULTIPLIER(2),ONENEG => INT_MULTIPLIER(3) );-- End decoder block 1-- Begin partial product 1INV_MULTIPLICAND(0) <= NOT OPA(0);PPL_0:PP_LOW port map ( INA => OPA(0),INB => INV_MULTIPLICAND(0), TWONEG => INT_MULTIPLIER(1),ONEPOS => INT_MULTIPLIER(2),ONENEG => INT_MULTIPLIER(3), PPBIT => SUMMAND(0) );RGATE_0:R_GATE port map ( INA => LOGIC_ZERO,INB => OPB(0),INC => OPB(1), PPBIT => SUMMAND(1) );INV_MULTIPLICAND(1) <= NOT OPA(1);PPM_0:PP_MIDDLE port map ( INA => OPA(0),INB => INV_MULTIPLICAND(0), INC => OPA(1),IND => INV_MULTIPLICAND(1), TWOPOS => INT_MULTIPLIER(0),TWONEG => INT_MULTIPLIER(1),ONEPOS => INT_MULTIPLIER(2),ONENEG => INT_MULTIPLIER(3), PPBIT => SUMMAND(2) );INV_MULTIPLICAND(2) <= NOT OPA(2);PPM_1:PP_MIDDLE port map ( INA => OPA(1),INB => INV_MULTIPLICAND(1), INC => OPA(2),IND => INV_MULTIPLICAND(2), TWOPOS => INT_MULTIPLIER(0),TWONEG => INT_MULTIPLIER(1),ONEPOS => INT_MULTIPLIER(2),ONENEG => INT_MULTIPLIER(3), PPBIT => SUMMAND(3) );INV_MULTIPLICAND(3) <= NOT OPA(3);PPM_2:PP_MIDDLE port map ( INA => OPA(2),INB => INV_MULTIPLICAND(2), INC => OPA(3),IND => INV_MULTIPLICAND(3), TWOPOS => INT_MULTIPLIER(0),TWONEG => INT_MULTIPLIER(1),ONEPOS => INT_MULTIPLIER(2),ONENEG => INT_MULTIPLIER(3), PPBIT => SUMMAND(6) );INV_MULTIPLICAND(4) <= NOT OPA(4);PPM_3:PP_MIDDLE port map ( INA => OPA(3),INB => INV_MULTIPLICAND(3), INC => OPA(4),IND => INV_MULTIPLICAND(4), TWOPOS => INT_MULTIPLIER(0),TWONEG => INT_MULTIPLIER(1),ONEPOS => INT_MULTIPLIER(2),ONENEG => INT_MULTIPLIER(3), PPBIT => SUMMAND(8) );INV_MULTIPLICAND(5) <= NOT OPA(5);PPM_4:PP_MIDDLE port map ( INA => OPA(4),INB => INV_MULTIPLICAND(4), INC => OPA(5),IND => INV_MULTIPLICAND(5), TWOPOS => INT_MULTIPLIER(0),TWONEG => INT_MULTIPLIER(1),ONEPOS => INT_MULTIPLIER(2),ONENEG => INT_MULTIPLIER(3), PPBIT => SUMMAND(12) );INV_MULTIPLICAND(6) <= NOT OPA(6);PPM_5:PP_MIDDLE port map ( INA => OPA(5),INB => INV_MULTIPLICAND(5), INC => OPA(6),IND => INV_MULTIPLICAND(6), TWOPOS => INT_MULTIPLIER(0),TWONEG => INT_MULTIPLIER(1),ONEPOS => INT_MULTIPLIER(2),ONENEG => INT_MULTIPLIER(3), PPBIT => SUMMAND(15) );INV_MULTIPLICAND(7) <= NOT OPA(7);PPM_6:PP_MIDDLE port map ( INA => OPA(6),INB => INV_MULTIPLICAND(6), INC => OPA(7),IND => INV_MULTIPLICAND(7), TWOPOS => INT_MULTIPLIER(0),TWONEG => INT_MULTIPLIER(1),ONEPOS => INT_MULTIPLIER(2),ONENEG => INT_MULTIPLIER(3), PPBIT => SUMMAND(20) );INV_MULTIPLICAND(8) <= NOT OPA(8);PPM_7:PP_MIDDLE port map ( INA => OPA(7),INB => INV_MULTIPLICAND(7), INC => OPA(8),IND => INV_MULTIPLICAND(8), TWOPOS => INT_MULTIPLIER(0),TWONEG => INT_MULTIPLIER(1),ONEPOS => INT_MULTIPLIER(2),ONENEG => INT_MULTIPLIER(3), PPBIT => SUMMAND(24) );INV_MULTIPLICAND(9) <= NOT OPA(9);PPM_8:PP_MIDDLE port map ( INA => OPA(8),INB => INV_MULTIPLICAND(8), INC => OPA(9),IND => INV_MULTIPLICAND(9), TWOPOS => INT_MULTIPLIER(0),TWONEG => INT_MULTIPLIER(1),ONEPOS => INT_MULTIPLIER(2),ONENEG => INT_MULTIPLIER(3), PPBIT => SUMMAND(30) );INV_MULTIPLICAND(10) <= NOT OPA(10);PPM_9:PP_MIDDLE port map ( INA => OPA(9),INB => INV_MULTIPLICAND(9), INC => OPA(10),IND => INV_MULTIPLICAND(10), TWOPOS => INT_MULTIPLIER(0),TWONEG => INT_MULTIPLIER(1),ONEPOS => INT_MULTIPLIER(2),ONENEG => INT_MULTIPLIER(3), PPBIT => SUMMAND(35) );INV_MULTIPLICAND(11) <= NOT OPA(11);PPM_10:PP_MIDDLE port map ( INA => OPA(10),INB => INV_MULTIPLICAND(10), INC => OPA(11),IND => INV_MULTIPLICAND(11), TWOPOS => INT_MULTIPLIER(0),TWONEG => INT_MULTIPLIER(1),ONEPOS => INT_MULTIPLIER(2),ONENEG => INT_MULTIPLIER(3), PPBIT => SUMMAND(42) );INV_MULTIPLICAND(12) <= NOT OPA(12);PPM_11:PP_MIDDLE port map ( INA => OPA(11),INB => INV_MULTIPLICAND(11), INC => OPA(12),IND => INV_MULTIPLICAND(12), TWOPOS => INT_MULTIPLIER(0),TWONEG => INT_MULTIPLIER(1),ONEPOS => INT_MULTIPLIER(2),ONENEG => INT_MULTIPLIER(3), PPBIT => SUMMAND(48) );INV_MULTIPLICAND(13) <= NOT OPA(13);PPM_12:PP_MIDDLE port map ( INA => OPA(12),INB => INV_MULTIPLICAND(12), INC => OPA(13),IND => INV_MULTIPLICAND(13), TWOPOS => INT_MULTIPLIER(0),TWONEG => INT_MULTIPLIER(1),ONEPOS => INT_MULTIPLIER(2),ONENEG => INT_MULTIPLIER(3), PPBIT => SUMMAND(56) );INV_MULTIPLICAND(14) <= NOT OPA(14);PPM_13:PP_MIDDLE port map ( INA => OPA(13),INB => INV_MULTIPLICAND(13), INC => OPA(14),IND => INV_MULTIPLICAND(14), TWOPOS => INT_MULTIPLIER(0),TWONEG => INT_MULTIPLIER(1),ONEPOS => INT_MULTIPLIER(2),ONENEG => INT_MULTIPLIER(3), PPBIT => SUMMAND(63) );INV_MULTIPLICAND(15) <= NOT OPA(15);PPM_14:PP_MIDDLE port map ( INA => OPA(14),INB => INV_MULTIPLICAND(14), INC => OPA(15),IND => INV_MULTIPLICAND(15), TWOPOS => INT_MULTIPLIER(0),TWONEG => INT_MULTIPLIER(1),ONEPOS => INT_MULTIPLIER(2),ONENEG => INT_MULTIPLIER(3), PPBIT => SUMMAND(72) );INV_MULTIPLICAND(16) <= NOT OPA(16);PPM_15:PP_MIDDLE port map ( INA => OPA(15),INB => INV_MULTIPLICAND(15), INC => OPA(16),IND => INV_MULTIPLICAND(16), TWOPOS => INT_MULTIPLIER(0),TWONEG => INT_MULTIPLIER(1),ONEPOS => INT_MULTIPLIER(2),ONENEG => INT_MULTIPLIER(3), PPBIT => SUMMAND(80) );INV_MULTIPLICAND(17) <= NOT OPA(17);PPM_16:PP_MIDDLE port map ( INA => OPA(16),INB => INV_MULTIPLICAND(16), INC => OPA(17),IND => INV_MULTIPLICAND(17), TWOPOS => INT_MULTIPLIER(0),TWONEG => INT_MULTIPLIER(1),ONEPOS => INT_MULTIPLIER(2),ONENEG => INT_MULTIPLIER(3), PPBIT => SUMMAND(90) );PPH_0:PP_HIGH port map ( INA => OPA(17),INB => INV_MULTIPLICAND(17), TWOPOS => INT_MULTIPLIER(0),TWONEG => INT_MULTIPLIER(1),ONEPOS => INT_MULTIPLIER(2),ONENEG => INT_MULTIPLIER(3), PPBIT => SUMMAND(99) );SUMMAND(100) <= '1';-- Begin partial product 1-- Begin decoder block 2DEC_1:DECODER -- Decoder of multiplier operand port map ( INA => OPB(1),INB => OPB(2),INC => OPB(3), TWOPOS => INT_MULTIPLIER(4),TWONEG => INT_MULTIPLIER(5),ONEPOS => INT_MULTIPLIER(6),ONENEG => INT_MULTIPLIER(7) );-- End decoder block 2-- Begin partial product 2PPL_1:PP_LOW port map ( INA => OPA(0),INB => INV_MULTIPLICAND(0), TWONEG => INT_MULTIPLIER(5),ONEPOS => INT_MULTIPLIER(6),ONENEG => INT_MULTIPLIER(7), PPBIT => SUMMAND(4) );RGATE_1:R_GATE port map ( INA => OPB(1),INB => OPB(2),INC => OPB(3), PPBIT => SUMMAND(5) );PPM_17:PP_MIDDLE port map ( INA => OPA(0),INB => INV_MULTIPLICAND(0), INC => OPA(1),IND => INV_MULTIPLICAND(1), TWOPOS => INT_MULTIPLIER(4),TWONEG => INT_MULTIPLIER(5),ONEPOS => INT_MULTIPLIER(6),ONENEG => INT_MULTIPLIER(7), PPBIT => SUMMAND(7) );PPM_18:PP_MIDDLE port map ( INA => OPA(1),INB => INV_MULTIPLICAND(1), INC => OPA(2),IND => INV_MULTIPLICAND(2), TWOPOS => INT_MULTIPLIER(4),TWONEG => INT_MULTIPLIER(5),ONEPOS => INT_MULTIPLIER(6),ONENEG => INT_MULTIPLIER(7), PPBIT => SUMMAND(9) );PPM_19:PP_MIDDLE port map ( INA => OPA(2),INB => INV_MULTIPLICAND(2), INC => OPA(3),IND => INV_MULTIPLICAND(3), TWOPOS => INT_MULTIPLIER(4),TWONEG => INT_MULTIPLIER(5),ONEPOS => INT_MULTIPLIER(6),ONENEG => INT_MULTIPLIER(7), PPBIT => SUMMAND(13) );PPM_20:PP_MIDDLE port map ( INA => OPA(3),INB => INV_MULTIPLICAND(3), INC => OPA(4),IND => INV_MULTIPLICAND(4), TWOPOS => INT_MULTIPLIER(4),TWONEG => INT_MULTIPLIER(5),ONEPOS => INT_MULTIPLIER(6),ONENEG => INT_MULTIPLIER(7), PPBIT => SUMMAND(16) );PPM_21:PP_MIDDLE port map ( INA => OPA(4),INB => INV_MULTIPLICAND(4), INC => OPA(5),IND => INV_MULTIPLICAND(5), TWOPOS => INT_MULTIPLIER(4),TWONEG => INT_MULTIPLIER(5),ONEPOS => INT_MULTIPLIER(6),ONENEG => INT_MULTIPLIER(7), PPBIT => SUMMAND(21) );PPM_22:PP_MIDDLE port map ( INA => OPA(5),INB => INV_MULTIPLICAND(5), INC => OPA(6),IND => INV_MULTIPLICAND(6), TWOPOS => INT_MULTIPLIER(4),TWONEG => INT_MULTIPLIER(5),ONEPOS => INT_MULTIPLIER(6),ONENEG => INT_MULTIPLIER(7), PPBIT => SUMMAND(25) );PPM_23:PP_MIDDLE port map ( INA => OPA(6),INB => INV_MULTIPLICAND(6), INC => OPA(7),IND => INV_MULTIPLICAND(7), TWOPOS => INT_MULTIPLIER(4),TWONEG => INT_MULTIPLIER(5),ONEPOS => INT_MULTIPLIER(6),ONENEG => INT_MULTIPLIER(7), PPBIT => SUMMAND(31) );PPM_24:PP_MIDDLE port map ( INA => OPA(7),INB => INV_MULTIPLICAND(7), INC => OPA(8),IND => INV_MULTIPLICAND(8), TWOPOS => INT_MULTIPLIER(4),TWONEG => INT_MULTIPLIER(5),ONEPOS => INT_MULTIPLIER(6),ONENEG => INT_MULTIPLIER(7), PPBIT => SUMMAND(36) );PPM_25:PP_MIDDLE port map ( INA => OPA(8),INB => INV_MULTIPLICAND(8), INC => OPA(9),IND => INV_MULTIPLICAND(9), TWOPOS => INT_MULTIPLIER(4),TWONEG => INT_MULTIPLIER(5),ONEPOS => INT_MULTIPLIER(6),ONENEG => INT_MULTIPLIER(7), PPBIT => SUMMAND(43) );PPM_26:PP_MIDDLE port map ( INA => OPA(9),INB => INV_MULTIPLICAND(9), INC => OPA(10),IND => INV_MULTIPLICAND(10), TWOPOS => INT_MULTIPLIER(4),TWONEG => INT_MULTIPLIER(5),ONEPOS => INT_MULTIPLIER(6),ONENEG => INT_MULTIPLIER(7), PPBIT => SUMMAND(49) );PPM_27:PP_MIDDLE port map ( INA => OPA(10),INB => INV_MULTIPLICAND(10), INC => OPA(11),IND => INV_MULTIPLICAND(11), TWOPOS => INT_MULTIPLIER(4),TWONEG => INT_MULTIPLIER(5),ONEPOS => INT_MULTIPLIER(6),ONENEG => INT_MULTIPLIER(7), PPBIT => SUMMAND(57) );PPM_28:PP_MIDDLE port map ( INA => OPA(11),INB => INV_MULTIPLICAND(11), INC => OPA(12),IND => INV_MULTIPLICAND(12), TWOPOS => INT_MULTIPLIER(4),TWONEG => INT_MULTIPLIER(5),ONEPOS => INT_MULTIPLIER(6),ONENEG => INT_MULTIPLIER(7), PPBIT => SUMMAND(64) );PPM_29:PP_MIDDLE port map ( INA => OPA(12),INB => INV_MULTIPLICAND(12), INC => OPA(13),IND => INV_MULTIPLICAND(13), TWOPOS => INT_MULTIPLIER(4),TWONEG => INT_MULTIPLIER(5),ONEPOS => INT_MULTIPLIER(6),ONENEG => INT_MULTIPLIER(7), PPBIT => SUMMAND(73) );PPM_30:PP_MIDDLE port map ( INA => OPA(13),INB => INV_MULTIPLICAND(13), INC => OPA(14),IND => INV_MULTIPLICAND(14), TWOPOS => INT_MULTIPLIER(4),TWONEG => INT_MULTIPLIER(5),ONEPOS => INT_MULTIPLIER(6),ONENEG => INT_MULTIPLIER(7), PPBIT => SUMMAND(81) );PPM_31:PP_MIDDLE port map ( INA => OPA(14),INB => INV_MULTIPLICAND(14), INC => OPA(15),IND => INV_MULTIPLICAND(15), TWOPOS => INT_MULTIPLIER(4),TWONEG => INT_MULTIPLIER(5),ONEPOS => INT_MULTIPLIER(6),ONENEG => INT_MULTIPLIER(7), PPBIT => SUMMAND(91) );PPM_32:PP_MIDDLE port map ( INA => OPA(15),INB => INV_MULTIPLICAND(15), INC => OPA(16),IND => INV_MULTIPLICAND(16), TWOPOS => INT_MULTIPLIER(4),TWONEG => INT_MULTIPLIER(5),ONEPOS => INT_MULTIPLIER(6),ONENEG => INT_MULTIPLIER(7), PPBIT => SUMMAND(101) );PPM_33:PP_MIDDLE port map ( INA => OPA(16),INB => INV_MULTIPLICAND(16), INC => OPA(17),IND => INV_MULTIPLICAND(17), TWOPOS => INT_MULTIPLIER(4),TWONEG => INT_MULTIPLIER(5),ONEPOS => INT_MULTIPLIER(6),ONENEG => INT_MULTIPLIER(7), PPBIT => SUMMAND(109) );SUMMAND(110) <= LOGIC_ONE;PPH_1:PP_HIGH port map ( INA => OPA(17),INB => INV_MULTIPLICAND(17), TWOPOS => INT_MULTIPLIER(4),TWONEG => INT_MULTIPLIER(5),ONEPOS => INT_MULTIPLIER(6),ONENEG => INT_MULTIPLIER(7), PPBIT => SUMMAND(118) );-- Begin partial product 2-- Begin decoder block 3DEC_2:DECODER -- Decoder of multiplier operand port map ( INA => OPB(3),INB => OPB(4),INC => OPB(5), TWOPOS => INT_MULTIPLIER(8),TWONEG => INT_MULTIPLIER(9),ONEPOS => INT_MULTIPLIER(10),ONENEG => INT_MULTIPLIER(11) );-- End decoder block 3-- Begin partial product 3PPL_2:PP_LOW port map ( INA => OPA(0),INB => INV_MULTIPLICAND(0), TWONEG => INT_MULTIPLIER(9),ONEPOS => INT_MULTIPLIER(10),ONENEG => INT_MULTIPLIER(11), PPBIT => SUMMAND(10) );RGATE_2:R_GATE port map ( INA => OPB(3),INB => OPB(4),INC => OPB(5), PPBIT => SUMMAND(11) );PPM_34:PP_MIDDLE port map ( INA => OPA(0),INB => INV_MULTIPLICAND(0), INC => OPA(1),IND => INV_MULTIPLICAND(1), TWOPOS => INT_MULTIPLIER(8),TWONEG => INT_MULTIPLIER(9),ONEPOS => INT_MULTIPLIER(10),ONENEG => INT_MULTIPLIER(11), PPBIT => SUMMAND(14) );PPM_35:PP_MIDDLE port map ( INA => OPA(1),INB => INV_MULTIPLICAND(1), INC => OPA(2),IND => INV_MULTIPLICAND(2), TWOPOS => INT_MULTIPLIER(8),TWONEG => INT_MULTIPLIER(9),ONEPOS => INT_MULTIPLIER(10),ONENEG => INT_MULTIPLIER(11), PPBIT => SUMMAND(17) );PPM_36:PP_MIDDLE port map ( INA => OPA(2),INB => INV_MULTIPLICAND(2), INC => OPA(3),IND => INV_MULTIPLICAND(3), TWOPOS => INT_MULTIPLIER(8),TWONEG => INT_MULTIPLIER(9),ONEPOS => INT_MULTIPLIER(10),ONENEG => INT_MULTIPLIER(11), PPBIT => SUMMAND(22) );PPM_37:PP_MIDDLE port map ( INA => OPA(3),INB => INV_MULTIPLICAND(3), INC => OPA(4),IND => INV_MULTIPLICAND(4), TWOPOS => INT_MULTIPLIER(8),TWONEG => INT_MULTIPLIER(9),ONEPOS => INT_MULTIPLIER(10),ONENEG => INT_MULTIPLIER(11), PPBIT => SUMMAND(26) );PPM_38:PP_MIDDLE port map ( INA => OPA(4),INB => INV_MULTIPLICAND(4), INC => OPA(5),IND => INV_MULTIPLICAND(5), TWOPOS => INT_MULTIPLIER(8),TWONEG => INT_MULTIPLIER(9),ONEPOS => INT_MULTIPLIER(10),ONENEG => INT_MULTIPLIER(11), PPBIT => SUMMAND(32) );PPM_39:PP_MIDDLE port map ( INA => OPA(5),INB => INV_MULTIPLICAND(5), INC => OPA(6),IND => INV_MULTIPLICAND(6), TWOPOS => INT_MULTIPLIER(8),TWONEG => INT_MULTIPLIER(9),ONEPOS => INT_MULTIPLIER(10),ONENEG => INT_MULTIPLIER(11), PPBIT => SUMMAND(37) );PPM_40:PP_MIDDLE port map ( INA => OPA(6),INB => INV_MULTIPLICAND(6), INC => OPA(7),IND => INV_MULTIPLICAND(7), TWOPOS => INT_MULTIPLIER(8),TWONEG => INT_MULTIPLIER(9),ONEPOS => INT_MULTIPLIER(10),ONENEG => INT_MULTIPLIER(11), PPBIT => SUMMAND(44) );PPM_41:PP_MIDDLE port map ( INA => OPA(7),INB => INV_MULTIPLICAND(7), INC => OPA(8),IND => INV_MULTIPLICAND(8), TWOPOS => INT_MULTIPLIER(8),TWONEG => INT_MULTIPLIER(9),ONEPOS => INT_MULTIPLIER(10),ONENEG => INT_MULTIPLIER(11), PPBIT => SUMMAND(50) );PPM_42:PP_MIDDLE port map ( INA => OPA(8),INB => INV_MULTIPLICAND(8), INC => OPA(9),IND => INV_MULTIPLICAND(9), TWOPOS => INT_MULTIPLIER(8),TWONEG => INT_MULTIPLIER(9),ONEPOS => INT_MULTIPLIER(10),ONENEG => INT_MULTIPLIER(11), PPBIT => SUMMAND(58) );PPM_43:PP_MIDDLE port map ( INA => OPA(9),INB => INV_MULTIPLICAND(9), INC => OPA(10),IND => INV_MULTIPLICAND(10), TWOPOS => INT_MULTIPLIER(8),TWONEG => INT_MULTIPLIER(9),ONEPOS => INT_MULTIPLIER(10),ONENEG => INT_MULTIPLIER(11), PPBIT => SUMMAND(65) );PPM_44:PP_MIDDLE port map ( INA => OPA(10),INB => INV_MULTIPLICAND(10), INC => OPA(11),IND => INV_MULTIPLICAND(11), TWOPOS => INT_MULTIPLIER(8),TWONEG => INT_MULTIPLIER(9),ONEPOS => INT_MULTIPLIER(10),ONENEG => INT_MULTIPLIER(11), PPBIT => SUMMAND(74) );PPM_45:PP_MIDDLE port map ( INA => OPA(11),INB => INV_MULTIPLICAND(11), INC => OPA(12),IND => INV_MULTIPLICAND(12), TWOPOS => INT_MULTIPLIER(8),TWONEG => INT_MULTIPLIER(9),ONEPOS => INT_MULTIPLIER(10),ONENEG => INT_MULTIPLIER(11), PPBIT => SUMMAND(82) );PPM_46:PP_MIDDLE port map ( INA => OPA(12),INB => INV_MULTIPLICAND(12), INC => OPA(13),IND => INV_MULTIPLICAND(13), TWOPOS => INT_MULTIPLIER(8),TWONEG => INT_MULTIPLIER(9),ONEPOS => INT_MULTIPLIER(10),ONENEG => INT_MULTIPLIER(11), PPBIT => SUMMAND(92) );PPM_47:PP_MIDDLE port map ( INA => OPA(13),INB => INV_MULTIPLICAND(13), INC => OPA(14),IND => INV_MULTIPLICAND(14), TWOPOS => INT_MULTIPLIER(8),TWONEG => INT_MULTIPLIER(9),ONEPOS => INT_MULTIPLIER(10),ONENEG => INT_MULTIPLIER(11), PPBIT => SUMMAND(102) );PPM_48:PP_MIDDLE port map ( INA => OPA(14),INB => INV_MULTIPLICAND(14), INC => OPA(15),IND => INV_MULTIPLICAND(15), TWOPOS => INT_MULTIPLIER(8),TWONEG => INT_MULTIPLIER(9),ONEPOS => INT_MULTIPLIER(10),ONENEG => INT_MULTIPLIER(11), PPBIT => SUMMAND(111) );PPM_49:PP_MIDDLE port map ( INA => OPA(15),INB => INV_MULTIPLICAND(15), INC => OPA(16),IND
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