spl162001.h

GPL162001的UART模組demo程式

	{
		UInt16	Reserve1	: 4;
		UInt16	ASADC	    :12;
	} B;
} P_ASADC_Data_DEF;

typedef union   // TP_Ctrl register
{
	UInt16	W;
	struct
	{
		UInt16	DBTSEL		: 2;
		UInt16	Reserve1	: 2;
		UInt16	DBEN	    : 1;
		UInt16	Reserve2	: 6;
		UInt16	TMOD	    : 1;
		UInt16	TPST	    : 1;
		UInt16	TPEN	    : 1;
		UInt16	TPIEN	    : 1;
		UInt16	TPIF_C	    : 1;
	} B;
} P_TP_Ctrl_DEF;
#define ADC_Setup_Reg			((volatile P_ADC_Setup_DEF *)(P_ADC_Setup))
#define MADC_Ctrl_Reg			((volatile P_MADC_Ctrl_DEF *)(P_MADC_Ctrl))
#define MADC_Data_Reg			((volatile P_MADC_Data_DEF *)(P_MADC_Data))
#define ASADC_Ctrl_Reg			((volatile P_ASADC_Ctrl_DEF *)(P_ASADC_Ctrl))
#define ASADC_Data_Reg			((volatile P_ASADC_Data_DEF *)(P_ASADC_Data))
#define TP_Ctrl_Reg				((volatile P_TP_Ctrl_DEF *)(P_TP_Ctrl))

/*****************************************************************************/
/* Interrupt registers										           		 */
/*****************************************************************************/
typedef union   // INT_Status1 register
{
	UInt16	W;
	struct
	{
		UInt16	EXTAIF_C	: 1;
		UInt16	EXTBIFC		: 1;
		UInt16	DMA		    : 1;
		UInt16	USB			: 1;
		UInt16	AUDAIF	    : 1;
		UInt16	AUDBIF	    : 1;
		UInt16	SPBIF	    : 1;
		UInt16	ASIF	    : 1;
		UInt16	TPIF	    : 1;
		UInt16	FPIF		: 1;
		UInt16	SPIIF	    : 1;
		UInt16	UTIRIF		: 1;
		UInt16	SBHFIF	    : 1;
		UInt16	SBFIF	    : 1;
		UInt16	ADCRIF	    : 1;
		UInt16	KEYIF_C	    : 1;
	} B;
} P_INT_Status1_DEF;

typedef union   // INT_Status2 register
{
	UInt16	W;
	struct
	{
		UInt16	HMSIF		: 1;
		UInt16	ALMIF		: 1;
		UInt16	SCHIF	    : 1;
		UInt16	ST			: 1;
		UInt16	NAND	    : 1;
		UInt16	I2C		    : 1;
		UInt16	SD		    : 1;
		UInt16	Reserve1    : 1;
		UInt16	TMBAIF	    : 1;
		UInt16	TMBBIF		: 1;
		UInt16	TMBCIF	    : 1;
		UInt16	KSIF		: 1;
		UInt16	TMAIF	    : 1;
		UInt16	TMBIF	    : 1;
		UInt16	TMCIF	    : 1;
		UInt16	TMDIF	    : 1;
	} B;
} P_INT_Status2_DEF;

typedef union   // INT_Priority1 register
{
	UInt16	W;
	struct
	{
		UInt16	EXTAIP		: 1;
		UInt16	EXTBIP		: 1;
		UInt16	DMAIP	    : 1;
		UInt16	USBIP		: 1;
		UInt16	AUDAIP	    : 1;
		UInt16	AUDBIP	    : 1;
		UInt16	SPBIP	    : 1;
		UInt16	ASPIP	    : 1;
		UInt16	TPIP	    : 1;
		UInt16	FPIP		: 1;
		UInt16	SPIIP	    : 1;
		UInt16	UTIRIP		: 1;
		UInt16	SBHFIP	    : 1;
		UInt16	SBFIP	    : 1;
		UInt16	ADCRIP	    : 1;
		UInt16	KEYIP	    : 1;
	} B;
} P_INT_Priority1_DEF;

typedef union   // INT_Priority2 register
{
	UInt16	W;
	struct
	{
		UInt16	Reserve1	: 1;
		UInt16	ST			: 1;
		UInt16	NAND	    : 1;
		UInt16	I2C			: 1;
		UInt16	SD		    : 1;
		UInt16	Reserve2    : 1;
		UInt16	KSIP	    : 1;
		UInt16	TMAIP	    : 1;
		UInt16	TMBIP	    : 1;
		UInt16	TMCIP		: 1;
		UInt16	TMDIP	    : 1;
	} B;
} P_INT_Priority2_DEF;

typedef union   // MINT_Ctrl register
{
	UInt16	W;
	struct
	{
		UInt16	EXTAIEN		: 1;
		UInt16	EXTBIEN		: 1;
		UInt16	Reserve1    : 1;
		UInt16	STIEN		: 1;
		UInt16	EXTAIS	    : 1;
		UInt16	EXTBIS	    : 1;
		UInt16	Reserve2    : 9;
		UInt16	KEYIEN	    : 1;
	} B;
} P_MINT_Ctrl_DEF;
#define INT_Status1_Reg			((volatile P_INT_Status1_DEF *)(P_INT_Status1))
#define INT_Status2_Reg			((volatile P_INT_Status2_DEF *)(P_INT_Status2))
#define INT_Priority1_Reg		((volatile P_INT_Priority1_DEF *)(P_INT_Priority1))
#define INT_Priority2_Reg		((volatile P_INT_Priority2_DEF *)(P_INT_Priority2))
#define MINT_Ctrl_Reg		    ((volatile P_MINT_Ctrl_DEF *)(P_MINT_Ctrl))

/*****************************************************************************/
/* Audio output registers									        		 */
/*****************************************************************************/
typedef union   // CHA_Ctrl register
{
	UInt16	W;
	struct
	{
		UInt16	Reserve1	:12;
		UInt16	VREFEN		: 1;
		UInt16	CHAEN	    : 1;
		UInt16	FEMIEN		: 1;
		UInt16	FEMIF_C	    : 1;
	} B;
} P_CHA_Ctrl_DEF;

typedef union   // CHB_Ctrl register
{
	UInt16	W;
	struct
	{
		UInt16	Reserve1	:10;
		UInt16	MONO		: 1;
		UInt16	CHACFG	    : 1;
		UInt16	FEMIEN		: 1;
		UInt16	FEMIF_C	    : 1;
	} B;
} P_CHB_Ctrl_DEF;

typedef union   // CHA_Data register
{
	UInt16	W;
	struct
	{
		UInt16	CHADATA 	:16;
	} B;
} P_CHA_Data_DEF;

typedef union   // CHB_Data register
{
	UInt16	W;
	struct
	{
		UInt16	CHBDATA 	:16;
	} B;
} P_CHB_Data_DEF;

typedef union   // CHX_FIFO register (X=A,B)
{
	UInt16	W;
	struct
	{
		UInt16	CHXFINX 	:4;
		UInt16	CHXFEILV 	:4;
		UInt16	FRST	 	:4;
		UInt16	Reserve1	:5;
		UInt16	FUDN		:1;
		UInt16	FFUL		:1;
	} B;
} P_CHX_FIFO_DEF;
#define CHA_Ctrl_Reg					   ((volatile P_CHA_Ctrl_DEF *)(P_CHA_Ctrl))
#define CHB_Ctrl_Reg					   ((volatile P_CHB_Ctrl_DEF *)(P_CHB_Ctrl))
#define CHA_Data_Reg					   ((volatile P_CHA_Data_DEF *)(P_CHA_Data))
#define CHB_Data_Reg					   ((volatile P_CHB_Data_DEF *)(P_CHB_Data))
#define CHB_Data_Reg					   ((volatile P_CHB_Data_DEF *)(P_CHB_Data))
#define CHA_FIFO_Reg					   ((volatile P_CHX_FIFO_DEF *)(P_CHA_FIFO))
#define CHB_FIFO_Reg					   ((volatile P_CHX_FIFO_DEF *)(P_CHB_FIFO))

/*****************************************************************************/
/* UART/IrDA registers									        			 */	
/*****************************************************************************/
typedef union   // UARTIrDA_Data register
{
	UInt16	W;
	struct
	{
		UInt16	UARTDATA 	: 8;
		UInt16	Reserve1	: 8;
	} B;
} P_UARTIrDA_Data_DEF;

typedef union   // UART_RXStatus register
{
	UInt16	W;
	struct
	{
		UInt16	FE			: 1;
		UInt16	PE		 	: 1;
		UInt16	BE		 	: 1;
		UInt16	OE			: 1;
		UInt16	Reserve1	:12;
	} B;
} P_UART_RXStatus_DEF;

typedef union   // UARTIrDA_Ctrl register
{
	UInt16	W;
	struct
	{
		UInt16	SB			: 1;
		UInt16	PEN		 	: 1;
		UInt16	PSEL	 	: 1;
		UInt16	SBSEL		: 1;
		UInt16	FEN			: 1;
		UInt16	WLSEL		: 2;
		UInt16	Reserve1 	: 1;
		UInt16	WKUEN	 	: 1;
		UInt16	MEN			: 1;
		UInt16	SLT			: 1;
		UInt16	MSIE		: 1;
		UInt16	UEN			: 1;
		UInt16	RTIE		: 1;
		UInt16	TXIE		: 1;
		UInt16	RXIE		: 1;
	} B;
} P_UARTIrDA_Ctrl_DEF;

typedef union   // UARTIrDA_BaudRate register
{
	UInt16	W;
	struct
	{
		UInt16	BAUD_SEL	: 4;
		UInt16	UCLK_SEL 	: 2;
		UInt16	TWT		 	: 4;
		UInt16	Reserve1	: 6;
	} B;
} P_UARTIrDA_BaudRate_DEF;

typedef union   // UARTIrDA_Status register
{
	UInt16	W;
	struct
	{
		UInt16	CTS			: 1;
		UInt16	DSR		 	: 1;
		UInt16	DCD		 	: 1;
		UInt16	BY			: 1;
		UInt16	RXEF		: 1;
		UInt16	TXFF	 	: 1;
		UInt16	RXFF	 	: 1;
		UInt16	TXEF		: 1;
		UInt16	Reserve1	: 4;
		UInt16	MSIF	 	: 1;
		UInt16	RTIF	 	: 1;
		UInt16	TXIF		: 1;
		UInt16	RXIF		: 1;
	} B;
} P_UARTIrDA_Status_DEF;

typedef union   // IrDA_Ctrl register
{
	UInt16	W;
	struct
	{
		UInt16	RXLT		: 8;
		UInt16	ILP		 	: 1;
		UInt16	IEN		 	: 1;
		UInt16	RPOL		: 1;
		UInt16	TPOL		: 1;
		UInt16	TXLT	 	: 4;
	} B;
} P_IrDA_Ctrl_DEF;
#define UARTIrDA_Data_Reg				   ((volatile P_UARTIrDA_Data_DEF *)(P_UARTIrDA_Data))
#define UART_RXStatus_Reg				   ((volatile P_UART_RXStatus_DEF *)(P_UART_RXStatus))
#define UARTIrDA_Ctrl_Reg				   ((volatile P_UARTIrDA_Ctrl_DEF *)(P_UARTIrDA_Ctrl))
#define UARTIrDA_BaudRate_Reg			   ((volatile P_UARTIrDA_BaudRate_DEF *)(P_UARTIrDA_BaudRate))
#define UARTIrDA_Status_Reg			       ((volatile P_UARTIrDA_Status_DEF *)(P_UARTIrDA_Status))
#define IrDA_Ctrl_Reg			      	   ((volatile P_IrDA_Ctrl_DEF *)(P_IrDA_Ctrl))

//========================================================================================
// End of include file
//========================================================================================


#endif