📄 spl162001.h
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/*****************************************************************************/
typedef union // BodyID register definition
{
UInt16 W;
struct
{
UInt16 BodyID : 16;
} B;
} P_BodyID_DEF;
typedef union // CLK_Ctrl0 register definition
{
UInt16 W;
struct
{
UInt16 System_Bus : 1;
UInt16 Memory : 1;
UInt16 GPIO : 1;
UInt16 Interrupt : 1;
UInt16 Time_Base : 1;
UInt16 Timer_ABCD : 1;
UInt16 DAC : 1;
UInt16 Uart : 1;
UInt16 RTC : 1;
UInt16 SPI : 1;
UInt16 Analog : 1;
UInt16 LCD : 1;
UInt16 Sensor : 1;
UInt16 SP_Bus : 1;
UInt16 Timer_EF : 1;
UInt16 SD_MMC : 1;
} B;
} P_CLK_Ctrl0_DEF;
typedef union // CLK_Ctrl1 register definition
{
UInt16 W;
struct
{
UInt16 Reserve1 : 1;
UInt16 USB_Host : 1;
UInt16 USB_Device : 1;
UInt16 IIC : 1;
UInt16 DMA : 1;
UInt16 EPP : 1;
UInt16 NF_Boot : 1;
UInt16 SRAM0 : 1;
UInt16 IIS_DAC : 1;
UInt16 Key_Scan : 1;
UInt16 Reserve2 : 4;
UInt16 System_Control : 2;
} B;
} P_CLK_Ctrl1_DEF;
typedef union // Reset_Flag register definition
{
UInt16 W;
struct
{
UInt16 LVR : 1;
UInt16 Reserve1 : 1;
UInt16 MPE : 1;
UInt16 WDE : 1;
UInt16 WDG : 1;
UInt16 Reserve2 :11;
} B;
} P_Reset_Flag_DEF;
typedef union // Clock_Ctrl register definition
{
UInt16 W;
struct
{
UInt16 CLKDIV : 3;
UInt16 Reserve1 : 6;
UInt16 KCEN : 1;
UInt16 C32KOFF : 1;
UInt16 Reserve2 : 1;
UInt16 WEAK : 1;
UInt16 Reserve3 : 1;
UInt16 C32K : 1;
UInt16 FAST : 1;
} B;
} P_Clock_Ctrl_DEF;
typedef union // LVR_Ctrl register definition
{
UInt16 W;
struct
{
UInt16 Reserve1 : 1;
UInt16 LVROFF : 1;
UInt16 Reserve2 :14;
} B;
} P_LVR_Ctrl_DEF;
typedef union // Watchdog_Ctrl register definition
{
UInt16 W;
struct
{
UInt16 WDGPD : 3;
UInt16 Reserve1 :11;
UInt16 WDGS : 1;
UInt16 WDGEN : 1;
} B;
} P_Watchdog_Ctrl_DEF;
typedef union // Watchdog_Clear register definition
{
UInt16 W;
struct
{
UInt16 WDGC : 16;
} B;
} P_Watchdog_Clear_DEF;
typedef union // WAIT register definition
{
UInt16 W;
struct
{
UInt16 HALT : 16;
} B;
} P_WAIT_DEF;
typedef union // HALT register definition
{
UInt16 W;
struct
{
UInt16 HALT : 16;
} B;
} P_HALT_DEF;
typedef union // Power_State register definition
{
UInt16 W;
struct
{
UInt16 State : 3;
UInt16 Reserve1 :13;
} B;
} P_Power_State_DEF;
#define BodyID_Reg ((volatile P_BodyID_DEF *)(P_BodyID))
#define CLK_Ctrl0_Reg ((volatile P_CLK_Ctrl0_DEF *)(P_CLK_Ctrl0))
#define CLK_Ctrl1_Reg ((volatile P_CLK_Ctrl1_DEF *)(P_CLK_Ctrl1))
#define Reset_Flag_Reg ((volatile P_Reset_Flag_DEF *)(P_Reset_Flag))
#define Clock_Ctrl_Reg ((volatile P_Clock_Ctrl_DEF *)(P_Clock_Ctrl))
#define LVR_Ctrl_Reg ((volatile P_LVR_Ctrl_DEF *)(P_LVR_Ctrl))
#define Watchdog_Ctrl_Reg ((volatile P_Watchdog_Ctrl_DEF *)(P_Watchdog_Ctrl))
#define Watchdog_Clear_Reg ((volatile P_Watchdog_Clear_DEF *)(P_Watchdog_Clear))
#define WAIT_Reg ((volatile P_WAIT_DEF *)(P_WAIT))
#define HALT_Reg ((volatile P_HALT_DEF *)(P_HALT))
#define Power_State_Reg ((volatile P_Power_State_DEF *)(P_Power_State))
/*****************************************************************************/
/* I/O ports registers */
/*****************************************************************************/
typedef union // IOA, IOC registers definition
{
UInt16 W;
struct
{
UInt16 bit0 : 1;
UInt16 bit1 : 1;
UInt16 bit2 : 1;
UInt16 bit3 : 1;
UInt16 bit4 : 1;
UInt16 bit5 : 1;
UInt16 bit6 : 1;
UInt16 bit7 : 1;
UInt16 bit8 : 1;
UInt16 bit9 : 1;
UInt16 bit10 : 1;
UInt16 bit11 : 1;
UInt16 bit12 : 1;
UInt16 bit13 : 1;
UInt16 bit14 : 1;
UInt16 bit15 : 1;
} B;
} GEN_REG_DEF;
typedef union // IOB registers definition
{
UInt16 W;
struct
{
UInt16 bit0 : 1;
UInt16 bit1 : 1;
UInt16 bit2 : 1;
UInt16 bit3 : 1;
UInt16 bit4 : 1;
UInt16 bit5 : 1;
UInt16 bit6 : 1;
UInt16 bit7 : 1;
UInt16 bit8 : 1;
UInt16 bit9 : 1;
UInt16 bit10 : 1;
UInt16 bit11 : 1;
UInt16 Reserve1 : 4;
} B;
} P_IOB_DEF;
typedef union // IOD, IOE registers definition
{
UInt16 W;
struct
{
UInt16 bit0 : 1;
UInt16 bit1 : 1;
UInt16 bit2 : 1;
UInt16 bit3 : 1;
UInt16 bit4 : 1;
UInt16 bit5 : 1;
UInt16 bit6 : 1;
UInt16 bit7 : 1;
UInt16 bit8 : 1;
UInt16 bit9 : 1;
UInt16 bit10 : 1;
UInt16 bit11 : 1;
UInt16 bit12 : 1;
UInt16 Reserve1 : 3;
} B;
} GEN1_REG_DEF;
#define IOA_Data_Reg ((volatile GEN_REG_DEF *)(P_IOA_Data))
#define IOA_Buffer_Reg ((volatile GEN_REG_DEF *)(P_IOA_Buffer))
#define IOA_Dir_Reg ((volatile GEN_REG_DEF *)(P_IOA_Dir))
#define IOA_Attrib_Reg ((volatile GEN_REG_DEF *)(P_IOA_Attrib))
#define IOA_Latch_Reg ((volatile GEN_REG_DEF *)(P_IOA_Latch))
#define IOB_Data_Reg ((volatile P_IOB_DEF *)(P_IOB_Data))
#define IOB_Buffer_Reg ((volatile P_IOB_DEF *)(P_IOB_Buffer))
#define IOB_Dir_Reg ((volatile P_IOB_DEF *)(P_IOB_Dir))
#define IOB_Attrib_Reg ((volatile P_IOB_DEF *)(P_IOB_Attrib))
#define IOB_Latch_Reg ((volatile P_IOB_DEF *)(P_IOB_Latch))
#define IOC_Data_Reg ((volatile GEN_REG_DEF *)(P_IOC_Data))
#define IOC_Buffer_Reg ((volatile GEN_REG_DEF *)(P_IOC_Buffer))
#define IOC_Dir_Reg ((volatile GEN_REG_DEF *)(P_IOC_Dir))
#define IOC_Attrib_Reg ((volatile GEN_REG_DEF *)(P_IOC_Attrib))
#define IOC_Latch_Reg ((volatile GEN_REG_DEF *)(P_IOC_Latch))
#define IOD_Data_Reg ((volatile GEN1_REG_DEF *)(P_IOD_Data))
#define IOD_Buffer_Reg ((volatile GEN1_REG_DEF *)(P_IOD_Buffer))
#define IOD_Dir_Reg ((volatile GEN1_REG_DEF *)(P_IOD_Dir))
#define IOD_Attrib_Reg ((volatile GEN1_REG_DEF *)(P_IOD_Attrib))
#define IOD_Latch_Reg ((volatile GEN1_REG_DEF *)(P_IOD_Latch))
#define IOE_Data_Reg ((volatile GEN1_REG_DEF *)(P_IOE_Data))
#define IOE_Buffer_Reg ((volatile GEN1_REG_DEF *)(P_IOE_Buffer))
#define IOE_Dir_Reg ((volatile GEN1_REG_DEF *)(P_IOE_Dir))
#define IOE_Attrib_Reg ((volatile GEN1_REG_DEF *)(P_IOE_Attrib))
#define IOE_Latch_Reg ((volatile GEN1_REG_DEF *)(P_IOE_Latch))
/*****************************************************************************/
/* Timer/Counter registers */
/*****************************************************************************/
typedef union // TimerX_Ctrl registers definition (X=A,B,C,D,E,F)
{
UInt16 W;
struct
{
UInt16 SRCASEL : 4;
UInt16 SRCBSEL : 3;
UInt16 Reserve1 : 1;
UInt16 EXTBSEL : 2;
UInt16 EXTASEL : 2;
UInt16 Reserve2 : 1;
UInt16 TMXEN : 1;
UInt16 TMXIE : 1;
UInt16 TMXIF_C : 1;
} B;
} P_TimerX_Ctrl_DEF;
typedef union // TimerX_CCP_Ctrl registers definition (X=A,B)
{
UInt16 W;
struct
{
UInt16 PWMXSEL : 2;
UInt16 Reserve1 : 2;
UInt16 CMPXSEL : 2;
UInt16 Reserve2 : 2;
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