modelsim_work.lib

I2C IP

[PRIM_DFFE]
A/PRIM_DFFE=22|d:/quartus/bin/../eda/sim_lib/stratix_atoms.v|31|1*897165
B/PRIM_DFFE=3*1744683
R=d:/quartus/bin/../eda/sim_lib/stratix_atoms.v|31

[and1]
A/and1=22|d:/quartus/bin/../eda/sim_lib/stratix_atoms.v|222|1*910600
B/and1=3*1746918
D/and1=4*19470
R=d:/quartus/bin/../eda/sim_lib/stratix_atoms.v|222

[and16]
A/and16=22|d:/quartus/bin/../eda/sim_lib/stratix_atoms.v|235|1*912355
B/and16=3*1747004
D/and16=4*19609
R=d:/quartus/bin/../eda/sim_lib/stratix_atoms.v|235

[b17mux21]
A/b17mux21=22|d:/quartus/bin/../eda/sim_lib/stratix_atoms.v|275|1*917884
B/b17mux21=3*1748589
R=d:/quartus/bin/../eda/sim_lib/stratix_atoms.v|275

[b5mux21]
A/b5mux21=22|d:/quartus/bin/../eda/sim_lib/stratix_atoms.v|296|1*921700
B/b5mux21=3*1750614
R=d:/quartus/bin/../eda/sim_lib/stratix_atoms.v|296

[bmux21]
A/bmux21=22|d:/quartus/bin/../eda/sim_lib/stratix_atoms.v|264|1*915929
B/bmux21=3*1747091
R=d:/quartus/bin/../eda/sim_lib/stratix_atoms.v|264

[dffe]
A/dffe=22|d:/quartus/bin/../eda/sim_lib/stratix_atoms.v|103|1*900168
B/dffe=3*1744887
D/dffe=4*17609
R=d:/quartus/bin/../eda/sim_lib/stratix_atoms.v|103

[i2c]
A/i2c=22|i2c.vo|37|1*1432166
B/i2c=3*3448346
R=i2c.vo|37

[latch]
A/latch=22|d:/quartus/bin/../eda/sim_lib/stratix_atoms.v|146|1*904323
B/latch=3*1745746
D/latch=4*18586
R=d:/quartus/bin/../eda/sim_lib/stratix_atoms.v|146

[m_cntr]
A/m_cntr=22|d:/quartus/bin/../eda/sim_lib/stratix_atoms.v|5144|1*1284521
B/m_cntr=3*2539138
R=d:/quartus/bin/../eda/sim_lib/stratix_atoms.v|5144

[mux21]
A/mux21=22|d:/quartus/bin/../eda/sim_lib/stratix_atoms.v|199|1*907818
B/mux21=3*1746442
D/mux21=4*19180
R=d:/quartus/bin/../eda/sim_lib/stratix_atoms.v|199

[n_cntr]
A/n_cntr=22|d:/quartus/bin/../eda/sim_lib/stratix_atoms.v|5220|1*1287537
B/n_cntr=3*2542488
R=d:/quartus/bin/../eda/sim_lib/stratix_atoms.v|5220

[nmux21]
A/nmux21=22|d:/quartus/bin/../eda/sim_lib/stratix_atoms.v|286|1*919847
B/nmux21=3*1750089
R=d:/quartus/bin/../eda/sim_lib/stratix_atoms.v|286

[pll_reg]
A/pll_reg=22|d:/quartus/bin/../eda/sim_lib/stratix_atoms.v|5402|1*1293939
B/pll_reg=3*2556329
R=d:/quartus/bin/../eda/sim_lib/stratix_atoms.v|5402

[scale_cntr]
A/scale_cntr=22|d:/quartus/bin/../eda/sim_lib/stratix_atoms.v|5296|1*1290428
B/scale_cntr=3*2545914
R=d:/quartus/bin/../eda/sim_lib/stratix_atoms.v|5296

[stratix_asynch_io]
A/stratix_asynch_io=22|d:/quartus/bin/../eda/sim_lib/stratix_atoms.v|860|1*952382
B/stratix_asynch_io=3*1821846
D/stratix_asynch_io=4*24117
R=d:/quartus/bin/../eda/sim_lib/stratix_atoms.v|860

[stratix_asynch_lcell]
A/stratix_asynch_lcell=22|d:/quartus/bin/../eda/sim_lib/stratix_atoms.v|322|1*923654
B/stratix_asynch_lcell=3*1752113
D/stratix_asynch_lcell=4*19750
R=d:/quartus/bin/../eda/sim_lib/stratix_atoms.v|322

[stratix_crcblock]
A/stratix_crcblock=22|d:/quartus/bin/../eda/sim_lib/stratix_atoms.v|9026|1*1425324
B/stratix_crcblock=3*3421416
R=d:/quartus/bin/../eda/sim_lib/stratix_atoms.v|9026

[stratix_dll]
A/stratix_dll=22|d:/quartus/bin/../eda/sim_lib/stratix_atoms.v|8733|1*1417654
B/stratix_dll=3*3385829
R=d:/quartus/bin/../eda/sim_lib/stratix_atoms.v|8733

[stratix_io]
A/stratix_io=22|d:/quartus/bin/../eda/sim_lib/stratix_atoms.v|1128|1*965129
B/stratix_io=3*1844944
R=d:/quartus/bin/../eda/sim_lib/stratix_atoms.v|1128

[stratix_io_register]
A/stratix_io_register=22|d:/quartus/bin/../eda/sim_lib/stratix_atoms.v|1024|1*958691
B/stratix_io_register=3*1832556
D/stratix_io_register=4*24758
R=d:/quartus/bin/../eda/sim_lib/stratix_atoms.v|1024

[stratix_jtag]
A/stratix_jtag=22|d:/quartus/bin/../eda/sim_lib/stratix_atoms.v|9002|1*1422433
B/stratix_jtag=3*3421205
R=d:/quartus/bin/../eda/sim_lib/stratix_atoms.v|9002

[stratix_lcell]
A/stratix_lcell=22|d:/quartus/bin/../eda/sim_lib/stratix_atoms.v|801|1*945708
B/stratix_lcell=3*1817149
R=d:/quartus/bin/../eda/sim_lib/stratix_atoms.v|801

[stratix_lcell_register]
A/stratix_lcell_register=22|d:/quartus/bin/../eda/sim_lib/stratix_atoms.v|670|1*936578
B/stratix_lcell_register=3*1805950
D/stratix_lcell_register=4*22480
R=d:/quartus/bin/../eda/sim_lib/stratix_atoms.v|670

[stratix_lvds_receiver]
A/stratix_lvds_receiver=22|d:/quartus/bin/../eda/sim_lib/stratix_atoms.v|4990|1*1277209
B/stratix_lvds_receiver=3*2527708
R=d:/quartus/bin/../eda/sim_lib/stratix_atoms.v|4990

[stratix_lvds_rx_parallel_register]
A/stratix_lvds_rx_parallel_register=22|d:/quartus/bin/../eda/sim_lib/stratix_atoms.v|4899|1*1268604
B/stratix_lvds_rx_parallel_register=3*2524531
D/stratix_lvds_rx_parallel_register=4*33630
R=d:/quartus/bin/../eda/sim_lib/stratix_atoms.v|4899

[stratix_lvds_transmitter]
A/stratix_lvds_transmitter=22|d:/quartus/bin/../eda/sim_lib/stratix_atoms.v|4743|1*1261396
B/stratix_lvds_transmitter=3*2507714
R=d:/quartus/bin/../eda/sim_lib/stratix_atoms.v|4743

[stratix_lvds_tx_out_block]
A/stratix_lvds_tx_out_block=22|d:/quartus/bin/../eda/sim_lib/stratix_atoms.v|4665|1*1257184
B/stratix_lvds_tx_out_block=3*2501325
D/stratix_lvds_tx_out_block=4*33233
R=d:/quartus/bin/../eda/sim_lib/stratix_atoms.v|4665

[stratix_lvds_tx_parallel_register]
A/stratix_lvds_tx_parallel_register=22|d:/quartus/bin/../eda/sim_lib/stratix_atoms.v|4560|1*1246418
B/stratix_lvds_tx_parallel_register=3*2498148
D/stratix_lvds_tx_parallel_register=4*30991
R=d:/quartus/bin/../eda/sim_lib/stratix_atoms.v|4560

[stratix_mac_mult]
A/stratix_mac_mult=22|d:/quartus/bin/../eda/sim_lib/stratix_atoms.v|1287|1*977799
B/stratix_mac_mult=3*1866147
R=d:/quartus/bin/../eda/sim_lib/stratix_atoms.v|1287

[stratix_mac_mult_internal]
A/stratix_mac_mult_internal=22|d:/quartus/bin/../eda/sim_lib/stratix_atoms.v|1440|1*1019468
B/stratix_mac_mult_internal=3*1920576
D/stratix_mac_mult_internal=4*26654
R=d:/quartus/bin/../eda/sim_lib/stratix_atoms.v|1440

[stratix_mac_out]
A/stratix_mac_out=22|d:/quartus/bin/../eda/sim_lib/stratix_atoms.v|1601|1*1039448
B/stratix_mac_out=3*1939282
R=d:/quartus/bin/../eda/sim_lib/stratix_atoms.v|1601

[stratix_mac_out_internal]
A/stratix_mac_out_internal=22|d:/quartus/bin/../eda/sim_lib/stratix_atoms.v|1888|1*1072607
B/stratix_mac_out_internal=3*2038834
D/stratix_mac_out_internal=4*27255
R=d:/quartus/bin/../eda/sim_lib/stratix_atoms.v|1888

[stratix_mac_register]
A/stratix_mac_register=22|d:/quartus/bin/../eda/sim_lib/stratix_atoms.v|2199|1*995480
B/stratix_mac_register=3*1916532
D/stratix_mac_register=4*25593
R=d:/quartus/bin/../eda/sim_lib/stratix_atoms.v|2199

[stratix_pll]
A/stratix_pll=22|d:/quartus/bin/../eda/sim_lib/stratix_atoms.v|5463|1*1296040
B/stratix_pll=3*2557724
D/stratix_pll=4*35142
R=d:/quartus/bin/../eda/sim_lib/stratix_atoms.v|5463

[stratix_ram_block]
A/stratix_ram_block=22|d:/quartus/bin/../eda/sim_lib/stratix_atoms.v|4011|1*1199460
B/stratix_ram_block=3*2398238
R=d:/quartus/bin/../eda/sim_lib/stratix_atoms.v|4011

[stratix_ram_clear]
A/stratix_ram_clear=22|d:/quartus/bin/../eda/sim_lib/stratix_atoms.v|2889|1*1138879
B/stratix_ram_clear=3*2145784
R=d:/quartus/bin/../eda/sim_lib/stratix_atoms.v|2889

[stratix_ram_internal]
A/stratix_ram_internal=22|d:/quartus/bin/../eda/sim_lib/stratix_atoms.v|2917|1*1140892
B/stratix_ram_internal=3*2146432
D/stratix_ram_internal=4*29988
R=d:/quartus/bin/../eda/sim_lib/stratix_atoms.v|2917

[stratix_ram_register]
A/stratix_ram_register=22|d:/quartus/bin/../eda/sim_lib/stratix_atoms.v|2423|1*1092863
B/stratix_ram_register=3*2133363
D/stratix_ram_register=4*28614
R=d:/quartus/bin/../eda/sim_lib/stratix_atoms.v|2423

[stratix_rublock]
A/stratix_rublock=22|d:/quartus/bin/../eda/sim_lib/stratix_atoms.v|9052|1*1427380
B/stratix_rublock=3*3421514
R=d:/quartus/bin/../eda/sim_lib/stratix_atoms.v|9052

[~A]
ModifyID=510
Version=73

[~MFT]
0=81|0modelsim_work.mgf|66974|0
1=123|1modelsim_work.mgf|1432166|897165
3=123|3modelsim_work.mgf|3448346|1744683
4=53|4modelsim_work.mgf|35142|17609

[~U]
PRIM_DFFE=12|0*33248||32
and1=12|0*34225|
and16=12|0*34364||16
b17mux21=12|0*34729||16
b5mux21=12|0*35139||16
bmux21=12|0*34518||16
dffe=12|0*33557|
i2c=12|0*66974||16
latch=12|0*33810||16
m_cntr=12|0*53941|
mux21=12|0*34035|
n_cntr=12|0*54272|
nmux21=12|0*34946||16
pll_reg=12|0*55053|
scale_cntr=12|0*54603|
stratix_asynch_io=12|0*38245|
stratix_asynch_lcell=12|0*35350|
stratix_crcblock=12|0*65098||16
stratix_dll=12|0*64136||16
stratix_io=12|0*39319||16
stratix_io_register=12|0*38834|
stratix_jtag=12|0*64438||16
stratix_lcell=12|0*37023||16
stratix_lcell_register=12|0*36320|
stratix_lvds_receiver=12|0*53492||16
stratix_lvds_rx_parallel_register=12|0*53074|
stratix_lvds_transmitter=12|0*52573||16
stratix_lvds_tx_out_block=12|0*52141|
stratix_lvds_tx_parallel_register=12|0*51723|
stratix_mac_mult=12|0*40871||16
stratix_mac_mult_internal=12|0*42441|
stratix_mac_out=12|0*42951||16
stratix_mac_out_internal=12|0*44872|
stratix_mac_register=12|0*42041|
stratix_pll=12|0*55314||16
stratix_ram_block=12|0*48753||16
stratix_ram_clear=12|0*46711|
stratix_ram_internal=12|0*46916|
stratix_ram_register=12|0*46043|
stratix_rublock=12|0*65428||16