📄 lcd.map.qmsg
字号:
{ "Warning" "WVRFX_L2_VDB_DRIVERLESS_OUTPUT_PORT" "LEDR\[9\] LCD.v(14) " "Warning (10034): Output port \"LEDR\[9\]\" at LCD.v(14) has no driver" { } { { "LCD.v" "" { Text "D:/PROGRAMING/fpga/LCD/LCD.v" 14 0 0 } } } 0 10034 "Output port \"%1!s!\" at %2!s! has no driver" 0 0 "" 0}
{ "Warning" "WVRFX_L2_VDB_DRIVERLESS_OUTPUT_PORT" "LEDR\[8\] LCD.v(14) " "Warning (10034): Output port \"LEDR\[8\]\" at LCD.v(14) has no driver" { } { { "LCD.v" "" { Text "D:/PROGRAMING/fpga/LCD/LCD.v" 14 0 0 } } } 0 10034 "Output port \"%1!s!\" at %2!s! has no driver" 0 0 "" 0}
{ "Warning" "WVRFX_L2_VDB_DRIVERLESS_OUTPUT_PORT" "LEDR\[7\] LCD.v(14) " "Warning (10034): Output port \"LEDR\[7\]\" at LCD.v(14) has no driver" { } { { "LCD.v" "" { Text "D:/PROGRAMING/fpga/LCD/LCD.v" 14 0 0 } } } 0 10034 "Output port \"%1!s!\" at %2!s! has no driver" 0 0 "" 0}
{ "Warning" "WVRFX_L2_VDB_DRIVERLESS_OUTPUT_PORT" "LEDR\[6\] LCD.v(14) " "Warning (10034): Output port \"LEDR\[6\]\" at LCD.v(14) has no driver" { } { { "LCD.v" "" { Text "D:/PROGRAMING/fpga/LCD/LCD.v" 14 0 0 } } } 0 10034 "Output port \"%1!s!\" at %2!s! has no driver" 0 0 "" 0}
{ "Warning" "WVRFX_L2_VDB_DRIVERLESS_OUTPUT_PORT" "LEDR\[5\] LCD.v(14) " "Warning (10034): Output port \"LEDR\[5\]\" at LCD.v(14) has no driver" { } { { "LCD.v" "" { Text "D:/PROGRAMING/fpga/LCD/LCD.v" 14 0 0 } } } 0 10034 "Output port \"%1!s!\" at %2!s! has no driver" 0 0 "" 0}
{ "Warning" "WVRFX_L2_VDB_DRIVERLESS_OUTPUT_PORT" "LEDR\[4\] LCD.v(14) " "Warning (10034): Output port \"LEDR\[4\]\" at LCD.v(14) has no driver" { } { { "LCD.v" "" { Text "D:/PROGRAMING/fpga/LCD/LCD.v" 14 0 0 } } } 0 10034 "Output port \"%1!s!\" at %2!s! has no driver" 0 0 "" 0}
{ "Warning" "WVRFX_L2_VDB_DRIVERLESS_OUTPUT_PORT" "LEDR\[3\] LCD.v(14) " "Warning (10034): Output port \"LEDR\[3\]\" at LCD.v(14) has no driver" { } { { "LCD.v" "" { Text "D:/PROGRAMING/fpga/LCD/LCD.v" 14 0 0 } } } 0 10034 "Output port \"%1!s!\" at %2!s! has no driver" 0 0 "" 0}
{ "Warning" "WVRFX_L2_VDB_DRIVERLESS_OUTPUT_PORT" "LEDR\[2\] LCD.v(14) " "Warning (10034): Output port \"LEDR\[2\]\" at LCD.v(14) has no driver" { } { { "LCD.v" "" { Text "D:/PROGRAMING/fpga/LCD/LCD.v" 14 0 0 } } } 0 10034 "Output port \"%1!s!\" at %2!s! has no driver" 0 0 "" 0}
{ "Warning" "WVRFX_L2_VDB_DRIVERLESS_OUTPUT_PORT" "LEDR\[1\] LCD.v(14) " "Warning (10034): Output port \"LEDR\[1\]\" at LCD.v(14) has no driver" { } { { "LCD.v" "" { Text "D:/PROGRAMING/fpga/LCD/LCD.v" 14 0 0 } } } 0 10034 "Output port \"%1!s!\" at %2!s! has no driver" 0 0 "" 0}
{ "Warning" "WVRFX_L2_VDB_DRIVERLESS_OUTPUT_PORT" "LEDR\[0\] LCD.v(14) " "Warning (10034): Output port \"LEDR\[0\]\" at LCD.v(14) has no driver" { } { { "LCD.v" "" { Text "D:/PROGRAMING/fpga/LCD/LCD.v" 14 0 0 } } } 0 10034 "Output port \"%1!s!\" at %2!s! has no driver" 0 0 "" 0}
{ "Info" "IOPT_MLS_DUP_REG_INFO_HDR" "" "Info: Duplicate registers merged to single register" { { "Info" "IOPT_MLS_DUP_REG_INFO" "CountEnd\[8\] CountEnd\[0\] " "Info: Duplicate register \"CountEnd\[8\]\" merged to single register \"CountEnd\[0\]\"" { } { { "LCD.v" "" { Text "D:/PROGRAMING/fpga/LCD/LCD.v" 63 -1 0 } } } 0 0 "Duplicate register \"%1!s!\" merged to single register \"%2!s!\"" 0 0 "" 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "CountEnd\[9\] CountEnd\[0\] " "Info: Duplicate register \"CountEnd\[9\]\" merged to single register \"CountEnd\[0\]\"" { } { { "LCD.v" "" { Text "D:/PROGRAMING/fpga/LCD/LCD.v" 63 -1 0 } } } 0 0 "Duplicate register \"%1!s!\" merged to single register \"%2!s!\"" 0 0 "" 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "CountEnd\[10\] CountEnd\[0\] " "Info: Duplicate register \"CountEnd\[10\]\" merged to single register \"CountEnd\[0\]\"" { } { { "LCD.v" "" { Text "D:/PROGRAMING/fpga/LCD/LCD.v" 63 -1 0 } } } 0 0 "Duplicate register \"%1!s!\" merged to single register \"%2!s!\"" 0 0 "" 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "CountEnd\[1\] CountEnd\[0\] " "Info: Duplicate register \"CountEnd\[1\]\" merged to single register \"CountEnd\[0\]\"" { } { { "LCD.v" "" { Text "D:/PROGRAMING/fpga/LCD/LCD.v" 63 -1 0 } } } 0 0 "Duplicate register \"%1!s!\" merged to single register \"%2!s!\"" 0 0 "" 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "CountEnd\[11\] CountEnd\[0\] " "Info: Duplicate register \"CountEnd\[11\]\" merged to single register \"CountEnd\[0\]\"" { } { { "LCD.v" "" { Text "D:/PROGRAMING/fpga/LCD/LCD.v" 63 -1 0 } } } 0 0 "Duplicate register \"%1!s!\" merged to single register \"%2!s!\"" 0 0 "" 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "CountEnd\[12\] CountEnd\[0\] " "Info: Duplicate register \"CountEnd\[12\]\" merged to single register \"CountEnd\[0\]\"" { } { { "LCD.v" "" { Text "D:/PROGRAMING/fpga/LCD/LCD.v" 63 -1 0 } } } 0 0 "Duplicate register \"%1!s!\" merged to single register \"%2!s!\"" 0 0 "" 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "CountEnd\[2\] CountEnd\[0\] " "Info: Duplicate register \"CountEnd\[2\]\" merged to single register \"CountEnd\[0\]\"" { } { { "LCD.v" "" { Text "D:/PROGRAMING/fpga/LCD/LCD.v" 63 -1 0 } } } 0 0 "Duplicate register \"%1!s!\" merged to single register \"%2!s!\"" 0 0 "" 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "CountEnd\[13\] CountEnd\[0\] " "Info: Duplicate register \"CountEnd\[13\]\" merged to single register \"CountEnd\[0\]\"" { } { { "LCD.v" "" { Text "D:/PROGRAMING/fpga/LCD/LCD.v" 63 -1 0 } } } 0 0 "Duplicate register \"%1!s!\" merged to single register \"%2!s!\"" 0 0 "" 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "CountEnd\[14\] CountEnd\[0\] " "Info: Duplicate register \"CountEnd\[14\]\" merged to single register \"CountEnd\[0\]\"" { } { { "LCD.v" "" { Text "D:/PROGRAMING/fpga/LCD/LCD.v" 63 -1 0 } } } 0 0 "Duplicate register \"%1!s!\" merged to single register \"%2!s!\"" 0 0 "" 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "CountEnd\[3\] CountEnd\[0\] " "Info: Duplicate register \"CountEnd\[3\]\" merged to single register \"CountEnd\[0\]\"" { } { { "LCD.v" "" { Text "D:/PROGRAMING/fpga/LCD/LCD.v" 63 -1 0 } } } 0 0 "Duplicate register \"%1!s!\" merged to single register \"%2!s!\"" 0 0 "" 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "CountEnd\[15\] CountEnd\[0\] " "Info: Duplicate register \"CountEnd\[15\]\" merged to single register \"CountEnd\[0\]\"" { } { { "LCD.v" "" { Text "D:/PROGRAMING/fpga/LCD/LCD.v" 63 -1 0 } } } 0 0 "Duplicate register \"%1!s!\" merged to single register \"%2!s!\"" 0 0 "" 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "CountEnd\[16\] CountEnd\[0\] " "Info: Duplicate register \"CountEnd\[16\]\" merged to single register \"CountEnd\[0\]\"" { } { { "LCD.v" "" { Text "D:/PROGRAMING/fpga/LCD/LCD.v" 63 -1 0 } } } 0 0 "Duplicate register \"%1!s!\" merged to single register \"%2!s!\"" 0 0 "" 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "CountEnd\[17\] CountEnd\[0\] " "Info: Duplicate register \"CountEnd\[17\]\" merged to single register \"CountEnd\[0\]\"" { } { { "LCD.v" "" { Text "D:/PROGRAMING/fpga/LCD/LCD.v" 63 -1 0 } } } 0 0 "Duplicate register \"%1!s!\" merged to single register \"%2!s!\"" 0 0 "" 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "CountEnd\[5\] CountEnd\[0\] " "Info: Duplicate register \"CountEnd\[5\]\" merged to single register \"CountEnd\[0\]\"" { } { { "LCD.v" "" { Text "D:/PROGRAMING/fpga/LCD/LCD.v" 63 -1 0 } } } 0 0 "Duplicate register \"%1!s!\" merged to single register \"%2!s!\"" 0 0 "" 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "CountEnd\[19\] CountEnd\[0\] " "Info: Duplicate register \"CountEnd\[19\]\" merged to single register \"CountEnd\[0\]\"" { } { { "LCD.v" "" { Text "D:/PROGRAMING/fpga/LCD/LCD.v" 63 -1 0 } } } 0 0 "Duplicate register \"%1!s!\" merged to single register \"%2!s!\"" 0 0 "" 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "CountEnd\[6\] CountEnd\[0\] " "Info: Duplicate register \"CountEnd\[6\]\" merged to single register \"CountEnd\[0\]\"" { } { { "LCD.v" "" { Text "D:/PROGRAMING/fpga/LCD/LCD.v" 63 -1 0 } } } 0 0 "Duplicate register \"%1!s!\" merged to single register \"%2!s!\"" 0 0 "" 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "CountEnd\[7\] CountEnd\[0\] " "Info: Duplicate register \"CountEnd\[7\]\" merged to single register \"CountEnd\[0\]\"" { } { { "LCD.v" "" { Text "D:/PROGRAMING/fpga/LCD/LCD.v" 63 -1 0 } } } 0 0 "Duplicate register \"%1!s!\" merged to single register \"%2!s!\"" 0 0 "" 0} } { } 0 0 "Duplicate registers merged to single register" 0 0 "" 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "Index\[2\] data_in GND " "Warning (14130): Reduced register \"Index\[2\]\" with stuck data_in port to stuck value GND" { } { { "LCD.v" "" { Text "D:/PROGRAMING/fpga/LCD/LCD.v" 63 -1 0 } } } 0 14130 "Reduced register \"%1!s!\" with stuck %2!s! port to stuck value %3!s!" 0 0 "" 0}
{ "Warning" "WOPT_MLS_ENABLED_OE" "" "Warning: TRI or OPNDRN buffers permanently enabled" { { "Warning" "WOPT_MLS_NODE_NAME" "LCD_DATA\[0\]~0 " "Warning: Node \"LCD_DATA\[0\]~0\"" { } { { "LCD.v" "" { Text "D:/PROGRAMING/fpga/LCD/LCD.v" 18 -1 0 } } } 0 0 "Node \"%1!s!\"" 0 0 "" 0} { "Warning" "WOPT_MLS_NODE_NAME" "LCD_DATA\[1\]~1 " "Warning: Node \"LCD_DATA\[1\]~1\"" { } { { "LCD.v" "" { Text "D:/PROGRAMING/fpga/LCD/LCD.v" 18 -1 0 } } } 0 0 "Node \"%1!s!\"" 0 0 "" 0} { "Warning" "WOPT_MLS_NODE_NAME" "LCD_DATA\[2\]~2 " "Warning: Node \"LCD_DATA\[2\]~2\"" { } { { "LCD.v" "" { Text "D:/PROGRAMING/fpga/LCD/LCD.v" 18 -1 0 } } } 0 0 "Node \"%1!s!\"" 0 0 "" 0} { "Warning" "WOPT_MLS_NODE_NAME" "LCD_DATA\[3\]~3 " "Warning: Node \"LCD_DATA\[3\]~3\"" { } { { "LCD.v" "" { Text "D:/PROGRAMING/fpga/LCD/LCD.v" 18 -1 0 } } } 0 0 "Node \"%1!s!\"" 0 0 "" 0} { "Warning" "WOPT_MLS_NODE_NAME" "LCD_DATA\[4\]~4 " "Warning: Node \"LCD_DATA\[4\]~4\"" { } { { "LCD.v" "" { Text "D:/PROGRAMING/fpga/LCD/LCD.v" 18 -1 0 } } } 0 0 "Node \"%1!s!\"" 0 0 "" 0} { "Warning" "WOPT_MLS_NODE_NAME" "LCD_DATA\[5\]~5 " "Warning: Node \"LCD_DATA\[5\]~5\"" { } { { "LCD.v" "" { Text "D:/PROGRAMING/fpga/LCD/LCD.v" 18 -1 0 } } } 0 0 "Node \"%1!s!\"" 0 0 "" 0} { "Warning" "WOPT_MLS_NODE_NAME" "LCD_DATA\[6\]~6 " "Warning: Node \"LCD_DATA\[6\]~6\"" { } { { "LCD.v" "" { Text "D:/PROGRAMING/fpga/LCD/LCD.v" 18 -1 0 } } } 0 0 "Node \"%1!s!\"" 0 0 "" 0} { "Warning" "WOPT_MLS_NODE_NAME" "LCD_DATA\[7\]~7 " "Warning: Node \"LCD_DATA\[7\]~7\"" { } { { "LCD.v" "" { Text "D:/PROGRAMING/fpga/LCD/LCD.v" 18 -1 0 } } } 0 0 "Node \"%1!s!\"" 0 0 "" 0} } { } 0 0 "TRI or OPNDRN buffers permanently enabled" 0 0 "" 0}
{ "Warning" "WOPT_MLS_STUCK_PIN_HDR" "" "Warning: Output pins are stuck at VCC or GND" { { "Warning" "WOPT_MLS_STUCK_PIN" "LEDR\[0\] GND " "Warning (13410): Pin \"LEDR\[0\]\" stuck at GND" { } { { "LCD.v" "" { Text "D:/PROGRAMING/fpga/LCD/LCD.v" 14 -1 0 } } } 0 13410 "Pin \"%1!s!\" stuck at %2!s!" 0 0 "" 0} { "Warning" "WOPT_MLS_STUCK_PIN" "LEDR\[1\] GND " "Warning (13410): Pin \"LEDR\[1\]\" stuck at GND" { } { { "LCD.v" "" { Text "D:/PROGRAMING/fpga/LCD/LCD.v" 14 -1 0 } } } 0 13410 "Pin \"%1!s!\" stuck at %2!s!" 0 0 "" 0} { "Warning" "WOPT_MLS_STUCK_PIN" "LEDR\[2\] GND " "Warning (13410): Pin \"LEDR\[2\]\" stuck at GND" { } { { "LCD.v" "" { Text "D:/PROGRAMING/fpga/LCD/LCD.v" 14 -1 0 } } } 0 13410 "Pin \"%1!s!\" stuck at %2!s!" 0 0 "" 0} { "Warning" "WOPT_MLS_STUCK_PIN" "LEDR\[3\] GND " "Warning (13410): Pin \"LEDR\[3\]\" stuck at GND" { } { { "LCD.v" "" { Text "D:/PROGRAMING/fpga/LCD/LCD.v" 14 -1 0 } } } 0 13410 "Pin \"%1!s!\" stuck at %2!s!" 0 0 "" 0} { "Warning" "WOPT_MLS_STUCK_PIN" "LEDR\[4\] GND " "Warning (13410): Pin \"LEDR\[4\]\" stuck at GND" { } { { "LCD.v" "" { Text "D:/PROGRAMING/fpga/LCD/LCD.v" 14 -1 0 } } } 0 13410 "Pin \"%1!s!\" stuck at %2!s!" 0 0 "" 0} { "Warning" "WOPT_MLS_STUCK_PIN" "LEDR\[5\] GND " "Warning (13410): Pin \"LEDR\[5\]\" stuck at GND" { } { { "LCD.v" "" { Text "D:/PROGRAMING/fpga/LCD/LCD.v" 14 -1 0 } } } 0 13410 "Pin \"%1!s!\" stuck at %2!s!" 0 0 "" 0} { "Warning" "WOPT_MLS_STUCK_PIN" "LEDR\[6\] GND " "Warning (13410): Pin \"LEDR\[6\]\" stuck at GND" { } { { "LCD.v" "" { Text "D:/PROGRAMING/fpga/LCD/LCD.v" 14 -1 0 } } } 0 13410 "Pin \"%1!s!\" stuck at %2!s!" 0 0 "" 0} { "Warning" "WOPT_MLS_STUCK_PIN" "LEDR\[7\] GND " "Warning (13410): Pin \"LEDR\[7\]\" stuck at GND" { } { { "LCD.v" "" { Text "D:/PROGRAMING/fpga/LCD/LCD.v" 14 -1 0 } } } 0 13410 "Pin \"%1!s!\" stuck at %2!s!" 0 0 "" 0} { "Warning" "WOPT_MLS_STUCK_PIN" "LEDR\[8\] GND " "Warning (13410): Pin \"LEDR\[8\]\" stuck at GND" { } { { "LCD.v" "" { Text "D:/PROGRAMING/fpga/LCD/LCD.v" 14 -1 0 } } } 0 13410 "Pin \"%1!s!\" stuck at %2!s!" 0 0 "" 0} { "Warning" "WOPT_MLS_STUCK_PIN" "LEDR\[9\] GND " "Warning (13410): Pin \"LEDR\[9\]\" stuck at GND" { } { { "LCD.v" "" { Text "D:/PROGRAMING/fpga/LCD/LCD.v" 14 -1 0 } } } 0 13410 "Pin \"%1!s!\" stuck at %2!s!" 0 0 "" 0} { "Warning" "WOPT_MLS_STUCK_PIN" "LEDR\[10\] GND " "Warning (13410): Pin \"LEDR\[10\]\" stuck at GND" { } { { "LCD.v" "" { Text "D:/PROGRAMING/fpga/LCD/LCD.v" 14 -1 0 } } } 0 13410 "Pin \"%1!s!\" stuck at %2!s!" 0 0 "" 0} { "Warning" "WOPT_MLS_STUCK_PIN" "LEDR\[11\] GND " "Warning (13410): Pin \"LEDR\[11\]\" stuck at GND" { } { { "LCD.v" "" { Text "D:/PROGRAMING/fpga/LCD/LCD.v" 14 -1 0 } } } 0 13410 "Pin \"%1!s!\" stuck at %2!s!" 0 0 "" 0} { "Warning" "WOPT_MLS_STUCK_PIN" "LEDR\[12\] GND " "Warning (13410): Pin \"LEDR\[12\]\" stuck at GND" { } { { "LCD.v" "" { Text "D:/PROGRAMING/fpga/LCD/LCD.v" 14 -1 0 } } } 0 13410 "Pin \"%1!s!\" stuck at %2!s!" 0 0 "" 0} { "Warning" "WOPT_MLS_STUCK_PIN" "LEDR\[13\] GND " "Warning (13410): Pin \"LEDR\[13\]\" stuck at GND" { } { { "LCD.v" "" { Text "D:/PROGRAMING/fpga/LCD/LCD.v" 14 -1 0 } } } 0 13410 "Pin \"%1!s!\" stuck at %2!s!" 0 0 "" 0} { "Warning" "WOPT_MLS_STUCK_PIN" "LEDR\[14\] GND " "Warning (13410): Pin \"LEDR\[14\]\" stuck at GND" { } { { "LCD.v" "" { Text "D:/PROGRAMING/fpga/LCD/LCD.v" 14 -1 0 } } } 0 13410 "Pin \"%1!s!\" stuck at %2!s!" 0 0 "" 0} { "Warning" "WOPT_MLS_STUCK_PIN" "LEDR\[15\] GND " "Warning (13410): Pin \"LEDR\[15\]\" stuck at GND" { } { { "LCD.v" "" { Text "D:/PROGRAMING/fpga/LCD/LCD.v" 14 -1 0 } } } 0 13410 "Pin \"%1!s!\" stuck at %2!s!" 0 0 "" 0} { "Warning" "WOPT_MLS_STUCK_PIN" "LEDR\[16\] GND " "Warning (13410): Pin \"LEDR\[16\]\" stuck at GND" { } { { "LCD.v" "" { Text "D:/PROGRAMING/fpga/LCD/LCD.v" 14 -1 0 } } } 0 13410 "Pin \"%1!s!\" stuck at %2!s!" 0 0 "" 0} { "Warning" "WOPT_MLS_STUCK_PIN" "LEDR\[17\] GND " "Warning (13410): Pin \"LEDR\[17\]\" stuck at GND" { } { { "LCD.v" "" { Text "D:/PROGRAMING/fpga/LCD/LCD.v" 14 -1 0 } } } 0 13410 "Pin \"%1!s!\" stuck at %2!s!" 0 0 "" 0} { "Warning" "WOPT_MLS_STUCK_PIN" "LCD_ON VCC " "Warning (13410): Pin \"LCD_ON\" stuck at VCC" { } { { "LCD.v" "" { Text "D:/PROGRAMING/fpga/LCD/LCD.v" 16 -1 0 } } } 0 13410 "Pin \"%1!s!\" stuck at %2!s!" 0 0 "" 0} { "Warning" "WOPT_MLS_STUCK_PIN" "LCD_BLON GND " "Warning (13410): Pin \"LCD_BLON\" stuck at GND" { } { { "LCD.v" "" { Text "D:/PROGRAMING/fpga/LCD/LCD.v" 16 -1 0 } } } 0 13410 "Pin \"%1!s!\" stuck at %2!s!" 0 0 "" 0} { "Warning" "WOPT_MLS_STUCK_PIN" "LCD_RW GND " "Warning (13410): Pin \"LCD_RW\" stuck at GND" { } { { "LCD.v" "" { Text "D:/PROGRAMING/fpga/LCD/LCD.v" 17 -1 0 } } } 0 13410 "Pin \"%1!s!\" stuck at %2!s!" 0 0 "" 0} } { } 0 0 "Output pins are stuck at VCC or GND" 0 0 "" 0}
{ "Warning" "WCUT_CUT_UNNECESSARY_INPUT_PIN_HDR" "18 " "Warning: Design contains 18 input pin(s) that do not drive logic" { { "Warning" "WCUT_CUT_UNNECESSARY_INPUT_PIN" "SW\[0\] " "Warning (15610): No output dependent on input pin \"SW\[0\]\"" { } { { "LCD.v" "" { Text "D:/PROGRAMING/fpga/LCD/LCD.v" 13 -1 0 } } } 0 15610 "No output dependent on input pin \"%1!s!\"" 0 0 "" 0} { "Warning" "WCUT_CUT_UNNECESSARY_INPUT_PIN" "SW\[1\] " "Warning (15610): No output dependent on input pin \"SW\[1\]\"" { } { { "LCD.v" "" { Text "D:/PROGRAMING/fpga/LCD/LCD.v" 13 -1 0 } } } 0 15610 "No output dependent on input pin \"%1!s!\"" 0 0 "" 0} { "Warning" "WCUT_CUT_UNNECESSARY_INPUT_PIN" "SW\[2\] " "Warning (15610): No output dependent on input pin \"SW\[2\]\"" { } { { "LCD.v" "" { Text "D:/PROGRAMING/fpga/LCD/LCD.v" 13 -1 0 } } } 0 15610 "No output dependent on input pin \"%1!s!\"" 0 0 "" 0} { "Warning" "WCUT_CUT_UNNECESSARY_INPUT_PIN" "SW\[3\] " "Warning (15610): No output dependent on input pin \"SW\[3\]\"" { } { { "LCD.v" "" { Text "D:/PROGRAMING/fpga/LCD/LCD.v" 13 -1 0 } } } 0 15610 "No output dependent on input pin \"%1!s!\"" 0 0 "" 0} { "Warning" "WCUT_CUT_UNNECESSARY_INPUT_PIN" "SW\[4\] " "Warning (15610): No output dependent on input pin \"SW\[4\]\"" { } { { "LCD.v" "" { Text "D:/PROGRAMING/fpga/LCD/LCD.v" 13 -1 0 } } } 0 15610 "No output dependent on input pin \"%1!s!\"" 0 0 "" 0} { "Warning" "WCUT_CUT_UNNECESSARY_INPUT_PIN" "SW\[5\] " "Warning (15610): No output dependent on input pin \"SW\[5\]\"" { } { { "LCD.v" "" { Text "D:/PROGRAMING/fpga/LCD/LCD.v" 13 -1 0 } } } 0 15610 "No output dependent on input pin \"%1!s!\"" 0 0 "" 0} { "Warning" "WCUT_CUT_UNNECESSARY_INPUT_PIN" "SW\[6\] " "Warning (15610): No output dependent on input pin \"SW\[6\]\"" { } { { "LCD.v" "" { Text "D:/PROGRAMING/fpga/LCD/LCD.v" 13 -1 0 } } } 0 15610 "No output dependent on input pin \"%1!s!\"" 0 0 "" 0} { "Warning" "WCUT_CUT_UNNECESSARY_INPUT_PIN" "SW\[7\] " "Warning (15610): No output dependent on input pin \"SW\[7\]\"" { } { { "LCD.v" "" { Text "D:/PROGRAMING/fpga/LCD/LCD.v" 13 -1 0 } } } 0 15610 "No output dependent on input pin \"%1!s!\"" 0 0 "" 0} { "Warning" "WCUT_CUT_UNNECESSARY_INPUT_PIN" "SW\[8\] " "Warning (15610): No output dependent on input pin \"SW\[8\]\"" { } { { "LCD.v" "" { Text "D:/PROGRAMING/fpga/LCD/LCD.v" 13 -1 0 } } } 0 15610 "No output dependent on input pin \"%1!s!\"" 0 0 "" 0} { "Warning" "WCUT_CUT_UNNECESSARY_INPUT_PIN" "SW\[9\] " "Warning (15610): No output dependent on input pin \"SW\[9\]\"" { } { { "LCD.v" "" { Text "D:/PROGRAMING/fpga/LCD/LCD.v" 13 -1 0 } } } 0 15610 "No output dependent on input pin \"%1!s!\"" 0 0 "" 0} { "Warning" "WCUT_CUT_UNNECESSARY_INPUT_PIN" "SW\[10\] " "Warning (15610): No output dependent on input pin \"SW\[10\]\"" { } { { "LCD.v" "" { Text "D:/PROGRAMING/fpga/LCD/LCD.v" 13 -1 0 } } } 0 15610 "No output dependent on input pin \"%1!s!\"" 0 0 "" 0} { "Warning" "WCUT_CUT_UNNECESSARY_INPUT_PIN" "SW\[11\] " "Warning (15610): No output dependent on input pin \"SW\[11\]\"" { } { { "LCD.v" "" { Text "D:/PROGRAMING/fpga/LCD/LCD.v" 13 -1 0 } } } 0 15610 "No output dependent on input pin \"%1!s!\"" 0 0 "" 0} { "Warning" "WCUT_CUT_UNNECESSARY_INPUT_PIN" "SW\[12\] " "Warning (15610): No output dependent on input pin \"SW\[12\]\"" { } { { "LCD.v" "" { Text "D:/PROGRAMING/fpga/LCD/LCD.v" 13 -1 0 } } } 0 15610 "No output dependent on input pin \"%1!s!\"" 0 0 "" 0} { "Warning" "WCUT_CUT_UNNECESSARY_INPUT_PIN" "SW\[13\] " "Warning (15610): No output dependent on input pin \"SW\[13\]\"" { } { { "LCD.v" "" { Text "D:/PROGRAMING/fpga/LCD/LCD.v" 13 -1 0 } } } 0 15610 "No output dependent on input pin \"%1!s!\"" 0 0 "" 0} { "Warning" "WCUT_CUT_UNNECESSARY_INPUT_PIN" "SW\[14\] " "Warning (15610): No output dependent on input pin \"SW\[14\]\"" { } { { "LCD.v" "" { Text "D:/PROGRAMING/fpga/LCD/LCD.v" 13 -1 0 } } } 0 15610 "No output dependent on input pin \"%1!s!\"" 0 0 "" 0} { "Warning" "WCUT_CUT_UNNECESSARY_INPUT_PIN" "SW\[15\] " "Warning (15610): No output dependent on input pin \"SW\[15\]\"" { } { { "LCD.v" "" { Text "D:/PROGRAMING/fpga/LCD/LCD.v" 13 -1 0 } } } 0 15610 "No output dependent on input pin \"%1!s!\"" 0 0 "" 0} { "Warning" "WCUT_CUT_UNNECESSARY_INPUT_PIN" "SW\[16\] " "Warning (15610): No output dependent on input pin \"SW\[16\]\"" { } { { "LCD.v" "" { Text "D:/PROGRAMING/fpga/LCD/LCD.v" 13 -1 0 } } } 0 15610 "No output dependent on input pin \"%1!s!\"" 0 0 "" 0} { "Warning" "WCUT_CUT_UNNECESSARY_INPUT_PIN" "SW\[17\] " "Warning (15610): No output dependent on input pin \"SW\[17\]\"" { } { { "LCD.v" "" { Text "D:/PROGRAMING/fpga/LCD/LCD.v" 13 -1 0 } } } 0 15610 "No output dependent on input pin \"%1!s!\"" 0 0 "" 0} } { } 0 0 "Design contains %1!d! input pin(s) that do not drive logic" 0 0 "" 0}
{ "Info" "ICUT_CUT_TM_SUMMARY" "146 " "Info: Implemented 146 device resources after synthesis - the final resource count might be different" { { "Info" "ICUT_CUT_TM_IPINS" "19 " "Info: Implemented 19 input pins" { } { } 0 0 "Implemented %1!d! input pins" 0 0 "" 0} { "Info" "ICUT_CUT_TM_OPINS" "23 " "Info: Implemented 23 output pins" { } { } 0 0 "Implemented %1!d! output pins" 0 0 "" 0} { "Info" "ICUT_CUT_TM_BIDIRS" "8 " "Info: Implemented 8 bidirectional pins" { } { } 0 0 "Implemented %1!d! bidirectional pins" 0 0 "" 0} { "Info" "ICUT_CUT_TM_LCELLS" "96 " "Info: Implemented 96 logic cells" { } { } 0 0 "Implemented %1!d! logic cells" 0 0 "" 0} } { } 0 0 "Implemented %1!d! device resources after synthesis - the final resource count might be different" 0 0 "" 0}
{ "Info" "IQEXE_ERROR_COUNT" "Analysis & Synthesis 0 s 75 s Quartus II " "Info: Quartus II Analysis & Synthesis was successful. 0 errors, 75 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "143 " "Info: Allocated 143 megabytes of memory during processing" { } { } 0 0 "Allocated %1!s! megabytes of memory during processing" 0 0 "" 0} { "Info" "IQEXE_END_BANNER_TIME" "Sun Jul 27 11:35:06 2008 " "Info: Processing ended: Sun Jul 27 11:35:06 2008" { } { } 0 0 "Processing ended: %1!s!" 0 0 "" 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:06 " "Info: Elapsed time: 00:00:06" { } { } 0 0 "Elapsed time: %1!s!" 0 0 "" 0} } { } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "" 0}
⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -