📄 sanjiaobo.rpt
字号:
Page 1
ispDesignEXPERT 8.3 - Device Utilization Chart Sat Dec 22 17:12:22 2007
--------------------------------------------------------------------------------
Module : 'sanjiaobo'
--------------------------------------------------------------------------------
Input files:
ABEL PLA file : sanjiaobo.tt3
Device library : P20V8R.dev
Output files:
Report file : sanjiaobo.rpt
Programmer load file : sanjiaobo.jed
--------------------------------------------------------------------------------
Page 2
ispDesignEXPERT 8.3 - Device Utilization Chart Sat Dec 22 17:12:22 2007
P20V8R Programmed Logic:
--------------------------------------------------------------------------------
Q5.D = ( Q5.Q & !Q4.Q & Q3.Q & Q2.Q & Q1.Q & Q0.Q & control
# Q5.Q & Q4.Q & Q3.Q & Q2.Q & Q1.Q & !Q0.Q & !control );
" ISTYPE 'INVERT'
Q5.C = ( CP );
Q4.D = ( Q5.Q & Q4.Q & !Q3.Q & Q2.Q & Q1.Q & Q0.Q & control
# !Q5.Q & Q4.Q & Q3.Q & Q2.Q & Q1.Q & Q0.Q & !control );
" ISTYPE 'INVERT'
Q4.C = ( CP );
Q3.D = ( Q5.Q & Q4.Q & Q3.Q & !Q2.Q & Q1.Q & Q0.Q & control
# Q5.Q & !Q4.Q & Q3.Q & Q2.Q & Q1.Q & Q0.Q & !control );
" ISTYPE 'INVERT'
Q3.C = ( CP );
Q2.D = ( Q5.Q & Q4.Q & Q3.Q & Q2.Q & !Q1.Q & Q0.Q & control
# Q5.Q & Q4.Q & !Q3.Q & Q2.Q & Q1.Q & Q0.Q & !control );
" ISTYPE 'INVERT'
Q2.C = ( CP );
Q1.D = ( Q5.Q & Q4.Q & Q3.Q & Q2.Q & Q1.Q & !Q0.Q & control
# Q5.Q & Q4.Q & Q3.Q & !Q2.Q & Q1.Q & Q0.Q & !control );
" ISTYPE 'INVERT'
Q1.C = ( CP );
Q0.D = ( Q4.Q & Q3.Q & Q2.Q & Q1.Q & Q0.Q & control
# Q5.Q & Q4.Q & Q3.Q & Q2.Q & Q0.Q & !control ); " ISTYPE 'INVERT'
Q0.C = ( CP );
Page 3
ispDesignEXPERT 8.3 - Device Utilization Chart Sat Dec 22 17:12:22 2007
P20V8R Chip Diagram:
--------------------------------------------------------------------------------
P20V8R
+---------\ /---------+
| \ / |
| ----- |
CP | 1 24 | Vcc
| |
control | 2 23 |
| |
| 3 22 |
| |
| 4 21 |
| |
| 5 20 | !Q0
| |
| 6 19 | !Q1
| |
| 7 18 | !Q2
| |
| 8 17 | !Q3
| |
| 9 16 | !Q4
| |
| 10 15 | !Q5
| |
| 11 14 |
| |
GND | 12 13 |
| |
| |
`---------------------------'
SIGNATURE: N/A
Page 4
ispDesignEXPERT 8.3 - Device Utilization Chart Sat Dec 22 17:12:22 2007
P20V8R Resource Allocations:
--------------------------------------------------------------------------------
Device | Resource | Design |
Resources | Available | Requirement | Unused
======================|===========|=============|==============
| | |
Input Pins: | | |
| | |
Input: | 14 | 2 | 12 ( 85 %)
| | |
Output Pins: | | |
| | |
In/Out: | 8 | 6 | 2 ( 25 %)
Output: | - | - | -
| | |
Buried Nodes: | | |
| | |
Input Reg: | - | - | -
Pin Reg: | 8 | 6 | 2 ( 25 %)
Buried Reg: | - | - | -
Page 5
ispDesignEXPERT 8.3 - Device Utilization Chart Sat Dec 22 17:12:22 2007
P20V8R Product Terms Distribution:
--------------------------------------------------------------------------------
Signal | Pin | Terms | Terms | Terms
Name | Assigned | Used | Max | Unused
=========================================|==========|=======|=======|=======
Q5.D | 15 | 2 | 8 | 6
Q4.D | 16 | 2 | 8 | 6
Q3.D | 17 | 2 | 8 | 6
Q2.D | 18 | 2 | 8 | 6
Q1.D | 19 | 2 | 8 | 6
Q0.D | 20 | 2 | 8 | 6
==== List of Inputs/Feedbacks ====
Signal Name | Pin | Pin Type
=========================================|==========|=========
CP | 1 | CLK
control | 2 | INPUT
Page 6
ispDesignEXPERT 8.3 - Device Utilization Chart Sat Dec 22 17:12:22 2007
P20V8R Unused Resources:
--------------------------------------------------------------------------------
Pin | Pin | Product | Flip-flop
Number | Type | Terms | Type
=======|========|=============|==========
3 | INPUT | - | -
4 | INPUT | - | -
5 | INPUT | - | -
6 | INPUT | - | -
7 | INPUT | - | -
8 | INPUT | - | -
9 | INPUT | - | -
10 | INPUT | - | -
11 | INPUT | - | -
14 | INPUT | - | -
21 | BIDIR | NORMAL 7 | D
22 | BIDIR | NORMAL 7 | D
23 | INPUT | - | -
⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -