📄 73x_tim.c
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/******************** (C) COPYRIGHT 2005 STMicroelectronics ********************
* File Name : 73x_tim.c
* Author : MCD Application Team
* Date First Issued : 09/27/2005 : V1.0
* Description : This file provides all the TIM software functions.
**********************************************************************************
* History:
* 09/27/2005 : V1.0
**********************************************************************************
* THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS WITH
* CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, INDIRECT
* OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT
* OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION
* CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
*********************************************************************************/
/* Standard include ----------------------------------------------------------*/
#include "73x_tim.h"
#include "73x_cfg.h"
/* Include of other module interface headers ---------------------------------*/
/* Local includes ------------------------------------------------------------*/
/* Private typedef -----------------------------------------------------------*/
/* Private define ------------------------------------------------------------*/
/* Private macro -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
/* Private function prototypes -----------------------------------------------*/
/* Interface functions -------------------------------------------------------*/
/* Private functions ---------------------------------------------------------*/
/*******************************************************************************
* Function Name : TIM_DeInit
* Description : Initializes TIM peripheral control and registers to their
* : default reset values.
* Input : TIMx: where x can be from 0 to 9 to select the TIM peripheral.
* Output : None
* Return : None
*******************************************************************************/
void TIM_DeInit(TIM_TypeDef *TIMx)
{
if( TIMx == TIM0)
{
CFG_PeripheralClockConfig(CFG_CLK_TIM0,DISABLE);
CFG_PeripheralClockConfig(CFG_CLK_TIM0,ENABLE);
}
else if ( TIMx == TIM1)
{
CFG_PeripheralClockConfig(CFG_CLK_TIM1,DISABLE);
CFG_PeripheralClockConfig(CFG_CLK_TIM1,ENABLE);
}
else if ( TIMx == TIM2)
{
CFG_PeripheralClockConfig(CFG_CLK_TIM2,DISABLE);
CFG_PeripheralClockConfig(CFG_CLK_TIM2,ENABLE);
}
else if ( TIMx == TIM3)
{
CFG_PeripheralClockConfig(CFG_CLK_TIM3,DISABLE);
CFG_PeripheralClockConfig(CFG_CLK_TIM3,ENABLE);
}
else if ( TIMx == TIM4)
{
CFG_PeripheralClockConfig(CFG_CLK_TIM4,DISABLE);
CFG_PeripheralClockConfig(CFG_CLK_TIM4,ENABLE);
}
else if ( TIMx == TIM5)
{
CFG_PeripheralClockConfig(CFG_CLK_TIM5,DISABLE);
CFG_PeripheralClockConfig(CFG_CLK_TIM5,ENABLE);
}
else if ( TIMx == TIM6)
{
CFG_PeripheralClockConfig(CFG_CLK_TIM6,DISABLE);
CFG_PeripheralClockConfig(CFG_CLK_TIM6,ENABLE);
}
else if ( TIMx == TIM7)
{
CFG_PeripheralClockConfig(CFG_CLK_TIM7,DISABLE);
CFG_PeripheralClockConfig(CFG_CLK_TIM7,ENABLE);
}
else if ( TIMx == TIM8)
{
CFG_PeripheralClockConfig(CFG_CLK_TIM8,DISABLE);
CFG_PeripheralClockConfig(CFG_CLK_TIM8,ENABLE);
}
else if ( TIMx == TIM9)
{
CFG_PeripheralClockConfig(CFG_CLK_TIM9,DISABLE);
CFG_PeripheralClockConfig(CFG_CLK_TIM9,ENABLE);
}
}
/******************************************************************************
* Function Name : TIM_StructInit
* Description : Fills in a TIM_InitTypeDef structure with the reset value of
* each parameter.
* Input : TIM_InitStruct : pointer to a TIM_InitTypeDef structure
which will be initialized.
* Output : None
* Return : None.
******************************************************************************/
void TIM_StructInit(TIM_InitTypeDef *TIM_InitStruct)
{
TIM_InitStruct->TIM_Mode = 0x0000;
TIM_InitStruct->TIM_OCA_Modes = 0x0000;
TIM_InitStruct->TIM_OCB_Modes = 0x0000;
TIM_InitStruct->TIM_Clock_Source = 0x0000;
TIM_InitStruct->TIM_Clock_Edge = 0x0000;
TIM_InitStruct->TIM_INPUT_Edge = 0x0000;
TIM_InitStruct->TIM_ICAPA_Modes = 0x0000;
TIM_InitStruct->TIM_ICAPB_Modes = 0x0000;
TIM_InitStruct->TIM_Prescaler = 0x0000;
TIM_InitStruct->TIM_Pulse_Level_A = 0x0000;
TIM_InitStruct->TIM_Pulse_Level_B = 0x0000;
TIM_InitStruct->TIM_Period_Level = 0x0000;
TIM_InitStruct->TIM_Pulse_Length_A = 0x0000;
TIM_InitStruct->TIM_Pulse_Length_B = 0x0000;
TIM_InitStruct->TIM_Full_Period = 0x0000;
}
/******************************************************************************
* Function Name : TIM_Init
* Description : Initializes TIM peripheral according to the specified
* parameters in the TIM_InitTypeDef structure.
* Input : - TIMx: where x can be 0, 1 or 9 to select the TIM peripheral.
* - TIM_InitStruct: pointer to a TIM_InitTypeDef structure that
contains the configuration information for the specified TIM
peripheral.
* Output : None
* Return : None
******************************************************************************/
void TIM_Init(TIM_TypeDef *TIMx, TIM_InitTypeDef *TIM_InitStruct)
{
if (TIM_InitStruct->TIM_Clock_Source == TIM_CLK_INTERNAL)
{
TIMx->CR1 &= TIM_ECK_DISABLE_Mask;
}
else
{
if (TIM_InitStruct->TIM_Clock_Source & 0x8000)
{
TIMx->CR1 |= TIM_ECK_ENABLE_Mask;
CFG->TIMSR = (CFG->TIMSR & 0x0000)|TIM_ICAP_NONE;
}
else
{
TIMx->CR1 |= TIM_ECK_ENABLE_Mask;
CFG->TIMSR = (CFG->TIMSR & 0x0000)|TIM_InitStruct->TIM_Clock_Source;
}
if (TIM_InitStruct->TIM_Clock_Edge == TIM_Rising)
{
TIMx->CR1 |= TIM_EXEDG_ENABLE_Mask;
}
else
{
TIMx->CR1 &= TIM_EXEDG_DISABLE_Mask;
}
}
TIMx->CR2 =( TIMx->CR2 & 0xFF00 )|TIM_InitStruct->TIM_Prescaler ;
switch ( TIM_InitStruct->TIM_Mode)
{
/*********************************PWM Input mode *************************/
case TIM_PWMI:
{
/* Set the PWMI Bit */
TIMx->CR1 |= TIM_PWMI_Mask;
/* Set the first edge Level */
if ( TIM_InitStruct->TIM_ICAPA_Modes == TIM_Rising)
{
TIMx->CR1 |= TIM_IEDGA_ENABLE_Mask;
}
else
{
TIMx->CR1 &= TIM_IEDGA_DISABLE_Mask;
}
/* Set the Second edge Level ( Opposit of the first level ) */
if ( TIM_InitStruct->TIM_ICAPA_Modes == TIM_Falling)
{
TIMx->CR1 |= TIM_IEDGB_ENABLE_Mask;
}
else
{
TIMx->CR1 &= TIM_IEDGB_DISABLE_Mask;
}
}
break;
/*********************************Output compare channel A **************/
case TIM_OCM_CHANNELA:
{
if (TIM_InitStruct->TIM_Pulse_Level_A == TIM_High)
{
TIMx->CR1 |= TIM_OLVLA_Set_Mask;
}
else
{
TIMx->CR1 &= TIM_OLVLA_Reset_Mask;
}
TIMx->OCAR = TIM_InitStruct->TIM_Pulse_Length_A;
if (TIM_InitStruct->TIM_OCA_Modes == TIM_Timing)
{
TIMx->CR1 &= TIM_OCA_DISABLE_Mask;
}
else
{
TIMx->CR1 |= TIM_OCA_ENABLE_Mask;
}
}
break;
/*********************************Output compare channel B***************/
case TIM_OCM_CHANNELB:
{
if (TIM_InitStruct->TIM_Pulse_Level_B == TIM_High)
{
TIMx->CR1 |= TIM_OLVLB_Set_Mask;
}
else
{
TIMx->CR1 &= TIM_OLVLB_Reset_Mask;
}
TIMx->OCBR = TIM_InitStruct->TIM_Pulse_Length_B;
if (TIM_InitStruct->TIM_OCB_Modes == TIM_Timing)
{
TIMx->CR1 &= TIM_OCB_DISABLE_Mask;
}
else
{
TIMx->CR1 |= TIM_OCB_ENABLE_Mask;
}
}
break;
/*********************************Output compare channel A et B************/
case TIM_OCM_CHANNELAB:
{
TIMx->OCBR = TIM_InitStruct->TIM_Pulse_Length_B;
TIMx->OCAR = TIM_InitStruct->TIM_Pulse_Length_A;
if (TIM_InitStruct->TIM_OCB_Modes == TIM_Timing)
{
TIMx->CR1 &= TIM_OCB_DISABLE_Mask;
}
else
{
TIMx->CR1 |= TIM_OCB_ENABLE_Mask;
}
if (TIM_InitStruct->TIM_OCA_Modes == TIM_Timing)
{
TIMx->CR1 &= TIM_OCA_DISABLE_Mask;
}
else
{
TIMx->CR1 |= TIM_OCA_ENABLE_Mask;
}
if (TIM_InitStruct->TIM_Pulse_Level_A== TIM_High)
{
TIMx->CR1 |= TIM_OLVLA_Set_Mask;
}
else
{
TIMx->CR1 &= TIM_OLVLA_Reset_Mask;
}
if (TIM_InitStruct->TIM_Pulse_Level_B== TIM_High)
{
TIMx->CR1 |= TIM_OLVLB_Set_Mask;
}
else
{
TIMx->CR1 &= TIM_OLVLB_Reset_Mask;
}
}
break;
/*********************************PWM mode*************************/
case TIM_PWM:
{
/* Set the Level During the pulse */
if ( TIM_InitStruct->TIM_Pulse_Level_A == TIM_High)
{
TIMx->CR1|= TIM_OLVLB_Set_Mask;
}
else
{
TIMx->CR1 &= TIM_OLVLB_Reset_Mask;
}
/* Set the Level after After the pulse */
if (TIM_InitStruct->TIM_Period_Level == TIM_High)
{
TIMx->CR1 |= TIM_OLVLA_Set_Mask;
}
else
{
TIMx->CR1 &= TIM_OLVLA_Reset_Mask;
}
/* Set the OCAE */
TIMx->CR1 |= TIM_OCA_ENABLE_Mask;
/* Set the PWM Bit */
TIMx->CR1 |= TIM_PWM_Mask;
/* Set the Duty Cycle value */
if ( TIM_InitStruct->TIM_Pulse_Length_A < 5 )
{
TIM_InitStruct->TIM_Pulse_Length_A = 4;
}
TIMx->OCAR = TIM_InitStruct->TIM_Pulse_Length_A - 4;
/* Set the Full Period */
TIMx->OCBR = TIM_InitStruct->TIM_Full_Period - 4;
}
break;
/*************************************One pulse mode******************/
case TIM_OPM:
{
/* Set the Level During the pulse */
if (TIM_InitStruct->TIM_Pulse_Level_A == TIM_High)
TIMx->CR1 |= TIM_OLVLB_Set_Mask;
/* Set the Level after the pulse */
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