bspatamx27.cpp

mx27 f14v2 源代码。包括ADS板上诸多驱动的源码。

//------------------------------------------------------------------------------
//
//  Copyright (C) 2006, Freescale Semiconductor, Inc. All Rights Reserved.
//  THIS SOURCE CODE, AND ITS USE AND DISTRIBUTION, IS SUBJECT TO THE TERMS
//  AND CONDITIONS OF THE APPLICABLE LICENSE AGREEMENT 
//
//------------------------------------------------------------------------------
//
//  File:  BSPatamx27.cpp
//
//  Provides BSP-specific configuration routines for ATA module.
//
//------------------------------------------------------------------------------

#include <windows.h>

#include "bsp.h"
#include "ata_time.h"


//------------------------------------------------------------------------------
// External Variables
//------------------------------------------------------------------------------

//------------------------------------------------------------------------------
// Global Variables
//------------------------------------------------------------------------------
PCSP_PBC_REGS g_pPBC;

//------------------------------------------------------------------------------
// Defines
//------------------------------------------------------------------------------

//------------------------------------------------------------------------------
// Types
//------------------------------------------------------------------------------

//------------------------------------------------------------------------------
// Local Variables
//------------------------------------------------------------------------------

//------------------------------------------------------------------------------
// Local Functions
//------------------------------------------------------------------------------

//------------------------------------------------------------------------------
//
//      Function:  BSPATApbcmapping
//
//           This function memory map the PBC registers for ATA.
//
//      Parameters:
//           phyAddr : PBC physical address
//      Returns:
//           TRUE if success; FALSE if failure.
//
//------------------------------------------------------------------------------

BOOL BSPATApbcmapping(PHYSICAL_ADDRESS *phyAddr)
{
    BOOL bRet=TRUE;
    
    phyAddr->QuadPart = BSP_BASE_REG_PA_PBC_BASE;
    g_pPBC = (PCSP_PBC_REGS) MmMapIoSpace(*phyAddr, sizeof(CSP_PBC_REGS), FALSE);
    if (g_pPBC == NULL)
    {
        DEBUGMSG(1, (TEXT("CMX27Disk: MmMapIoSpace failed!\r\n")));
        bRet=FALSE;
    }
    
    return bRet;
}

//------------------------------------------------------------------------------
//
//       Function:  BSPATAIOMUXConfig
//
//             This function makes the DDK call to configure the IOMUX
//             pins required for the ATA.
//
//      Parameters:
//             void
//      Returns:
//             TRUE if success; FALSE if failure.
//
//------------------------------------------------------------------------------

BOOL BSPATAIOMUXConfig(void)
{
    PHYSICAL_ADDRESS phyAddr;
    BOOL bRet = FALSE;
    DDK_GPIO_CFG  cfg;

    // Call the BSP function to map the PBC registers
    if(!BSPATApbcmapping(&phyAddr))
    {
        DEBUGMSG(1, (TEXT(" BSPATAIOMUXConfig PCSP_PBC_REGS MmMapIoSpace failed!\r\n")));
        goto exit;
    }
        
    // ATA IOMUX settings

    //Clear ATA_EN and ATA_SEL in CPLD regs
    OUTREG16(&g_pPBC->BCTRL2_CLEAR, CSP_BITFMASK(PBC_BCTRL2_ATA_FEC_EN));
    OUTREG16(&g_pPBC->BCTRL2_CLEAR, CSP_BITFMASK(PBC_BCTRL2_ATA_FEC_SEL));
    OUTREG16(&g_pPBC->BCTRL2_CLEAR, CSP_BITFMASK(PBC_BCTRL2_ATA_EN));

    DDK_GPIO_SET_CONFIG(cfg, ATAD1);
    bRet = DDKGpioEnable(&cfg);
    if(bRet == FALSE)
    {
        DEBUGMSG(1, (TEXT("NfcHwInit: Enable ATAD1 GPIO failed.\r\n")));
        goto exit;
    }
    DDK_GPIO_SET_CONFIG(cfg, ATAD2);
    bRet = DDKGpioEnable(&cfg);
    if(bRet == FALSE)
    {
        DEBUGMSG(1, (TEXT("NfcHwInit: Enable ATAD2 GPIO failed.\r\n")));
        goto exit;
    }
    DDK_GPIO_SET_CONFIG(cfg, ATAC);
    bRet = DDKGpioEnable(&cfg);
    if(bRet == FALSE)
    {
        DEBUGMSG(1, (TEXT("NfcHwInit: Enable ATAC GPIO failed.\r\n")));
        goto exit;
    }      

    bRet = TRUE;

exit:
    return bRet;
}

//------------------------------------------------------------------------------
//
//     Function: BSPATAEnableClock
//
//            This function enable/disable ATA clock
//
//     Parameters:
//            bEnable
//            [in]    TRUE if ATA Clock is to be enabled. FALSE if ATA Clock is
//                  to be disabled.
//
//     Returns:
//            TRUE if successfully performed the required action.
//
//------------------------------------------------------------------------------

BOOL BSPATAEnableClock(BOOL bEnable)
{
    if (bEnable)
        return DDKClockSetGatingMode(DDK_CLOCK_GATE_INDEX_HCLK_ATA, DDK_CLOCK_GATE_MODE_ENABLE);
    else
        return DDKClockSetGatingMode(DDK_CLOCK_GATE_INDEX_HCLK_ATA, DDK_CLOCK_GATE_MODE_DISABLE);
}

//------------------------------------------------------------------------------
//
//     Function: BSPATADMAchanAlloc
//
//            This function query the ATA module DMA channel for TX and RX
//
//     Parameters:
//            DmaReqTx: DMA channel for Write
//            DmaReqRx: DMA channel for Read
//     Returns:
//            return TRUE.
//
//------------------------------------------------------------------------------

BOOL BSPATADMAChanAlloc(UINT8 *pDmaReqTx, UINT8 *pDmaReqRx)
{
    (*pDmaReqTx) = BSP_DMAC_CH_ATA_TX ; 
    (*pDmaReqRx) = BSP_DMAC_CH_ATA_RX ; 
    
    return TRUE;
}