nandchip.inc

来自「mx27 f14v2 源代码。包括ADS板上诸多驱动的源码。」· INC 代码 · 共 53 行

;------------------------------------------------------------------------------
;
; Copyright (C) 2006-2007, Freescale Semiconductor, Inc. All Rights Reserved.
; THIS SOURCE CODE, AND ITS USE AND DISTRIBUTION, IS SUBJECT TO THE TERMS
; AND CONDITIONS OF THE APPLICABLE LICENSE AGREEMENT
;
;------------------------------------------------------------------------------
;
; File:  nandchip.inc
;
; Contains definitions for XLDR access of the Samsung K9K1G08U0B NAND
; flash or Samsung K9F1G08U0A NAND flash memory device.
;
;------------------------------------------------------------------------------
    IF :LNOT: LARGE_PAGE_NAND
NAND_BLOCK_CNT          EQU     (8192)      ; 8192 blocks
NAND_PAGE_CNT           EQU     (32)        ; Each Block has 32 Pages
NAND_PAGE_SIZE          EQU     (512)       ; Each Page has 512 Bytes
NAND_BLOCK_SIZE_LSH     EQU     (14)        ; 512*32 => 2^9 * 2^5 => 2^14
NAND_BLOCK_SIZE         EQU     (1 << NAND_BLOCK_SIZE_LSH)
NAND_BBI_OFFSET         EQU     5           ; Bad block info spare offset
NAND_BUS_WIDTH          EQU     8           ; 8-bit bus

NAND_ADDR_CYCLE2_LSH    EQU     9           ; A[16:9]
NAND_ADDR_CYCLE3_LSH    EQU     17          ; A[24:17]
NAND_ADDR_CYCLE4_LSH    EQU     25          ; A[26:25]
    ELSE
NAND_BLOCK_CNT          EQU     (1024)      ; 1024 blocks
NAND_PAGE_CNT           EQU     (64)        ; Each Block has 64 Pages
NAND_PAGE_SIZE          EQU     (2048)      ; Each Page has 2048 Bytes
NAND_BLOCK_SIZE_LSH     EQU     (17)        ; 2048*64 => 2^11 * 2^6 => 2^17
NAND_BLOCK_SIZE         EQU     (1 << NAND_BLOCK_SIZE_LSH)
NAND_BBI_OFFSET         EQU     5           ; Bad block info spare offset
NAND_BUS_WIDTH          EQU     8           ; 8-bit bus

NAND_ADDR_CYCLE2_LSH    EQU     0           ; A[???:???]
NAND_ADDR_CYCLE3_LSH    EQU     11          ; A[12:19]
NAND_ADDR_CYCLE4_LSH    EQU     19          ; A[20:27]
    ENDIF

CMD_READID              EQU     0x90        ; Read ID
CMD_READ                EQU     0x00        ; Read data field
CMD_READ2CYCLE          EQU     0x30        ; Read CMD second cycle
CMD_READ2               EQU     0x50        ; Read spare field
CMD_RESET               EQU     0xFF        ; Reset
CMD_ERASE               EQU     0x60        ; Erase setup
CMD_ERASE2              EQU     0xD0        ; Erase 
CMD_WRITE               EQU     0x80        ; Sequential data input
CMD_WRITE2              EQU     0x10        ; Program
CMD_STATUS              EQU     0x70        ; Read status

    END