oal_iomux.h

来自「mx27 f14v2 源代码。包括ADS板上诸多驱动的源码。」· C头文件 代码 · 共 126 行

//
// Copyright (c) Microsoft Corporation.  All rights reserved.
//
//
// Use of this source code is subject to the terms of the Microsoft end-user
// license agreement (EULA) under which you licensed this SOFTWARE PRODUCT.
// If you did not accept the terms of the EULA, you are not authorized to use
// this source code. For a copy of the EULA, please see the LICENSE.RTF on your
// install media.
//
//------------------------------------------------------------------------------
//
// Copyright (C) 2004-2006, Freescale Semiconductor, Inc. All Rights Reserved.
// THIS SOURCE CODE, AND ITS USE AND DISTRIBUTION, IS SUBJECT TO THE TERMS
// AND CONDITIONS OF THE APPLICABLE LICENSE AGREEMENT
//
//------------------------------------------------------------------------------
//
// File: oal_iomux.h
//
// This header file defines the custom IOMUX OAL module. This module implements
// function used to configure and manage the SoC IOMUX.
//
//------------------------------------------------------------------------------
#ifndef __OAL_IOMUX_H__
#define __OAL_IOMUX_H__

#if __cplusplus
extern "C" {
#endif

//------------------------------------------------------------------------------
// Defines
//
// Primary pin function
#define OAL_IOMUX_PRI_PIN(pGPIO, port, pin) \
    do { \
        CLRREG32(&pGPIO->PORT[port].GIUS,   GPIO_PIN_MASK(pin)); \
        CLRREG32(&pGPIO->PORT[port].GPR,    GPIO_PIN_MASK(pin)); \
        SETREG32(&pGPIO->PORT[port].PUEN,   GPIO_PIN_MASK(pin)); \
    } while (0)

#define OAL_IOMUX_PRI_PINS(pGPIO, port, pinmask) \
    do { \
        CLRREG32(&pGPIO->PORT[port].GIUS,   pinmask); \
        CLRREG32(&pGPIO->PORT[port].GPR,    pinmask); \
        SETREG32(&pGPIO->PORT[port].PUEN,   pinmask); \
    } while (0)

// Alternate pin function
#define OAL_IOMUX_ALT_PIN(pGPIO, port, pin) \
    do { \
        CLRREG32(&pGPIO->PORT[port].GIUS,   GPIO_PIN_MASK(pin)); \
        SETREG32(&pGPIO->PORT[port].GPR,    GPIO_PIN_MASK(pin)); \
        SETREG32(&pGPIO->PORT[port].PUEN,   GPIO_PIN_MASK(pin)); \
    } while (0)

#define OAL_IOMUX_ALT_PINS(pGPIO, port, pinmask) \
    do { \
        CLRREG32(&pGPIO->PORT[port].GIUS,   pinmask); \
        SETREG32(&pGPIO->PORT[port].GPR,    pinmask); \
        SETREG32(&pGPIO->PORT[port].PUEN,   pinmask); \
    } while (0)


// Module input pin function
#define OAL_IOMUX_MIN_PIN(pGPIO, port, pin, dest) \
    do { \
        SETREG32(&pGPIO->PORT[port].GIUS,   GPIO_PIN_MASK(pin)); \
        CLRREG32(&pGPIO->PORT[port].DDIR,   GPIO_PIN_MASK(pin)); \
        SETREG32(&pGPIO->PORT[port].PUEN,   GPIO_PIN_MASK(pin)); \
        CLRREG32(&pGPIO->PORT[port].ICONFA1 + (dest << 1) + (pin >> 4), \
            GPIO_PIN_2BITS_MASK(pin)); \
    } while (0)

// Module output pin function
#define OAL_IOMUX_MOUT_PIN(pGPIO, port, pin, src) \
    do { \
        SETREG32(&pGPIO->PORT[port].GIUS,   GPIO_PIN_MASK(pin)); \
        SETREG32(&pGPIO->PORT[port].DDIR,   GPIO_PIN_MASK(pin)); \
        SETREG32(&pGPIO->PORT[port].PUEN,   GPIO_PIN_MASK(pin)); \
        INSREG32(&pGPIO->PORT[port].OCR1 + (pin >> 4), \
            GPIO_PIN_2BITS_MASK(pin), GPIO_PIN_2BITS_VAL(pin, src)); \
    } while (0)

// Simple IO pin function just is:
// OAL_IOMUX_MOUT_PIN(pGPIO, port, pin, GPIO_OUTPUT_SOURCE_DATA)

// INTR pin function
// Pullup enabled if interrupt is negative level/edge 
// triggered and pullup disabled otherwise.
#define OAL_IOMUX_INTR_PIN(pGPIO, port, pin, type) \
    do { \
        SETREG32(&pGPIO->PORT[port].GIUS,   GPIO_PIN_MASK(pin)); \
        CLRREG32(&pGPIO->PORT[port].DDIR,   GPIO_PIN_MASK(pin)); \
        CLRREG32(&pGPIO->PORT[port].IMR,    GPIO_PIN_MASK(pin)); \
        SETREG32(&pGPIO->PORT[port].ISR,    GPIO_PIN_MASK(pin)); \
        INSREG32(&pGPIO->PORT[port].ICR1 + (pin >> 4), \
            GPIO_PIN_2BITS_MASK(pin), GPIO_PIN_2BITS_VAL(pin, type)); \
        if ((type == GPIO_INT_TYPE_NEGEDGE) || (type == GPIO_INT_TYPE_NEGLEVEL)) \
            SETREG32(&pGPIO->PORT[port].PUEN, GPIO_PIN_MASK(pin)); \
        else \
            CLRREG32(&pGPIO->PORT[port].PUEN, GPIO_PIN_MASK(pin)); \
    } while (0)

// Disable any pin by configuring it as input and pullup
#define OAL_IOMUX_DISABLE_PIN(pGPIO, port, pin) \
    do { \
        CLRREG32(&pGPIO->PORT[port].DDIR,    GPIO_PIN_MASK(pin)); \
        SETREG32(&pGPIO->PORT[port].PUEN,    GPIO_PIN_MASK(pin)); \
    } while (0)

// Disable any pins by configuring them as input and pullup
#define OAL_IOMUX_DISABLE_PINS(pGPIO, port, pinmask) \
    do { \
        CLRREG32(&pGPIO->PORT[port].DDIR,    pinmask); \
        SETREG32(&pGPIO->PORT[port].PUEN,    pinmask); \
    } while (0)

#if __cplusplus
}
#endif

#endif // __OAL_IOMUX_H__