📄 gpif1.lst
字号:
220 1
221 1 IFCONFIG = 0xCE;
222 1 // IFCLKSRC=1 , FIFOs executes on internal clk source
223 1 // xMHz=1 , 48MHz internal clk rate
224 1 // IFCLKOE=0 , Don't drive IFCLK pin signal at 48MHz
225 1 // IFCLKPOL=0 , Don't invert IFCLK pin signal from internal clk
226 1 // ASYNC=1 , master samples asynchronous
227 1 // GSTATE=1 , Drive GPIF states out on PORTE[2:0], debug WF
228 1 // IFCFG[1:0]=10, FX2 in GPIF master mode
229 1
230 1 GPIFABORT = 0xFF; // abort any waveforms pending
231 1
232 1 GPIFREADYCFG = InitData[ 0 ];
233 1 GPIFCTLCFG = InitData[ 1 ];
234 1 GPIFIDLECS = InitData[ 2 ];
235 1 GPIFIDLECTL = InitData[ 3 ];
236 1 GPIFWFSELECT = InitData[ 5 ];
237 1 GPIFREADYSTAT = InitData[ 6 ];
238 1
239 1 // use dual autopointer feature...
240 1 AUTOPTRSETUP = 0x07; // inc both pointers,
241 1 // ...warning: this introduces pdata hole(s)
C51 COMPILER V6.12 GPIF1 05/22/2007 13:08:21 PAGE 5
242 1 // ...at E67B (XAUTODAT1) and E67C (XAUTODAT2)
243 1
244 1 // source
245 1 APTR1H = MSB( &WaveData );
246 1 APTR1L = LSB( &WaveData );
247 1
248 1 // destination
249 1 AUTOPTRH2 = 0xE4;
250 1 AUTOPTRL2 = 0x00;
251 1
252 1 // transfer
253 1 for ( i = 0x00; i < 128; i++ )
254 1 {
255 2 EXTAUTODAT2 = EXTAUTODAT1;
256 2 }
257 1
258 1 // Configure GPIF Address pins, output initial value,
259 1 PORTCCFG = 0xFF; // [7:0] as alt. func. GPIFADR[7:0]
260 1 OEC = 0xFF; // and as outputs
261 1 PORTECFG |= 0x80; // [8] as alt. func. GPIFADR[8]
262 1 OEE |= 0x80; // and as output
263 1
264 1 // ...OR... tri-state GPIFADR[8:0] pins
265 1 // PORTCCFG = 0x00; // [7:0] as port I/O
266 1 // OEC = 0x00; // and as inputs
267 1 // PORTECFG &= 0x7F; // [8] as port I/O
268 1 // OEE &= 0x7F; // and as input
269 1
270 1 // GPIF address pins update when GPIFADRH/L written
271 1 SYNCDELAY; //
272 1 GPIFADRH = 0x00; // bits[7:1] always 0
273 1 SYNCDELAY; //
274 1 GPIFADRL = 0x00; // point to PERIPHERAL address 0x0000
275 1 }
276
277 #define TESTING_GPIF // NOTE: Comment this line out for frameworks based firmware
278 // See the example GPIF Tool Utility under Application
279 // Reference Material for more advanced development info
280 #ifdef TESTING_GPIF
281 // TODO: You may add additional code below.
282
283 void OtherInit( void )
284 { // interface initialization
285 1 // ...see TD_Init( );
286 1 }
287
288 // Set Address GPIFADR[8:0] to PERIPHERAL
289 void Peripheral_SetAddress( WORD gaddr )
290 {
291 1 SYNCDELAY; //
292 1 GPIFADRH = gaddr >> 8;
293 1 SYNCDELAY; //
294 1 GPIFADRL = ( BYTE )gaddr; // setup GPIF address
295 1 }
296
297 // Set EP2GPIF Transaction Count
298 void Peripheral_SetEP2GPIFTC( WORD xfrcnt )
299 {
300 1 SYNCDELAY; //
301 1 EP2GPIFTCH = xfrcnt >> 8; // setup transaction count
302 1 SYNCDELAY; //
303 1 EP2GPIFTCL = ( BYTE )xfrcnt;
C51 COMPILER V6.12 GPIF1 05/22/2007 13:08:21 PAGE 6
304 1 }
305
306 // Set EP4GPIF Transaction Count
307 void Peripheral_SetEP4GPIFTC( WORD xfrcnt )
308 {
309 1 SYNCDELAY; //
310 1 EP4GPIFTCH = xfrcnt >> 8; // setup transaction count
311 1 SYNCDELAY; //
312 1 EP4GPIFTCL = ( BYTE )xfrcnt;
313 1 }
314
315 // Set EP6GPIF Transaction Count
316 void Peripheral_SetEP6GPIFTC( WORD xfrcnt )
317 {
318 1 SYNCDELAY; //
319 1 EP6GPIFTCH = xfrcnt >> 8; // setup transaction count
320 1 SYNCDELAY; //
321 1 EP6GPIFTCL = ( BYTE )xfrcnt;
322 1 }
323
324 // Set EP8GPIF Transaction Count
325 void Peripheral_SetEP8GPIFTC( WORD xfrcnt )
326 {
327 1 SYNCDELAY; //
328 1 EP8GPIFTCH = xfrcnt >> 8; // setup transaction count
329 1 SYNCDELAY; //
330 1 EP8GPIFTCL = ( BYTE )xfrcnt;
331 1 }
332
333 #define GPIF_FLGSELPF 0
334 #define GPIF_FLGSELEF 1
335 #define GPIF_FLGSELFF 2
336
337 // Set EP2GPIF Decision Point FIFO Flag Select (PF, EF, FF)
338 void SetEP2GPIFFLGSEL( WORD DP_FIFOFlag )
339 {
340 1 EP2GPIFFLGSEL = DP_FIFOFlag;
341 1 }
342
343 // Set EP4GPIF Decision Point FIFO Flag Select (PF, EF, FF)
344 void SetEP4GPIFFLGSEL( WORD DP_FIFOFlag )
345 {
346 1 EP4GPIFFLGSEL = DP_FIFOFlag;
347 1 }
348
349 // Set EP6GPIF Decision Point FIFO Flag Select (PF, EF, FF)
350 void SetEP6GPIFFLGSEL( WORD DP_FIFOFlag )
351 {
352 1 EP6GPIFFLGSEL = DP_FIFOFlag;
353 1 }
354
355 // Set EP8GPIF Decision Point FIFO Flag Select (PF, EF, FF)
356 void SetEP8GPIFFLGSEL( WORD DP_FIFOFlag )
357 {
358 1 EP8GPIFFLGSEL = DP_FIFOFlag;
359 1 }
360
361 // Set EP2GPIF Programmable Flag STOP, overrides Transaction Count
362 void SetEP2GPIFPFSTOP( void )
363 {
364 1 EP2GPIFPFSTOP = 0x01;
365 1 }
C51 COMPILER V6.12 GPIF1 05/22/2007 13:08:21 PAGE 7
366
367 // Set EP4GPIF Programmable Flag STOP, overrides Transaction Count
368 void SetEP4GPIFPFSTOP( void )
369 {
370 1 EP4GPIFPFSTOP = 0x01;
371 1 }
372
373 // Set EP6GPIF Programmable Flag STOP, overrides Transaction Count
374 void SetEP6GPIFPFSTOP( void )
375 {
376 1 EP6GPIFPFSTOP = 0x01;
377 1 }
378
379 // Set EP8GPIF Programmable Flag STOP, overrides Transaction Count
380 void SetEP8GPIFPFSTOP( void )
381 {
382 1 EP8GPIFPFSTOP = 0x01;
383 1 }
384
385 // write single byte to PERIPHERAL, using GPIF
386 void Peripheral_SingleByteWrite( BYTE gdata )
387 {
388 1 while( !( GPIFTRIG & 0x80 ) ) // poll GPIFTRIG.7 Done bit
389 1 {
390 2 ;
391 2 }
392 1
393 1 XGPIFSGLDATLX = gdata; // trigger GPIF
394 1 // ...single byte write transaction
395 1 }
396
397 // write single word to PERIPHERAL, using GPIF
398 void Peripheral_SingleWordWrite( WORD gdata )
399 {
400 1 while( !( GPIFTRIG & 0x80 ) ) // poll GPIFTRIG.7 Done bit
401 1 {
402 2 ;
403 2 }
404 1
405 1 // using register(s) in XDATA space
406 1 XGPIFSGLDATH = gdata >> 8;
407 1 XGPIFSGLDATLX = gdata; // trigger GPIF
408 1 // ...single word write transaction
409 1 }
410
411 // read single byte from PERIPHERAL, using GPIF
412 void Peripheral_SingleByteRead( BYTE xdata *gdata )
413 {
414 1 static BYTE g_data = 0x00;
415 1
416 1 while( !( GPIFTRIG & 0x80 ) ) // poll GPIFTRIG.7 Done bit
417 1 {
418 2 ;
419 2 }
420 1
421 1 // using register(s) in XDATA space, dummy read
422 1 g_data = XGPIFSGLDATLX; // trigger GPIF
423 1 // ...single byte read transaction
424 1 while( !( GPIFTRIG & 0x80 ) ) // poll GPIFTRIG.7 Done bit
425 1 {
426 2 ;
427 2 }
C51 COMPILER V6.12 GPIF1 05/22/2007 13:08:21 PAGE 8
428 1
429 1 // using register(s) in XDATA space,
430 1 *gdata = XGPIFSGLDATLNOX; // ...GPIF reads byte from PERIPHERAL
431 1 }
432
433 // read single word from PERIPHERAL, using GPIF
434 void Peripheral_SingleWordRead( WORD xdata *gdata )
435 {
436 1 BYTE g_data = 0x00;
437 1
438 1 while( !( GPIFTRIG & 0x80 ) ) // poll GPIFTRIG.7 Done bit
439 1 {
440 2 ;
441 2 }
442 1
443 1 // using register(s) in XDATA space, dummy read
444 1 g_data = XGPIFSGLDATLX; // trigger GPIF
445 1 // ...single word read transaction
⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -