📄 g711.ucx.c
字号:
0x0001c000,
0x38000380,
0x00700000,
0x00000090,
0x00e0000e,
0x0001c002,
0x3800001c,
0x00038000,
0x00000700,
0x00000000,
// Instruction 72
0x1c000380,
0x1c000000,
0x0001c000,
0x38000380,
0x00700000,
0x3a000700,
0x00e00101,
0x0001c000,
0x3800001c,
0x00038000,
0x00000700,
0x00000000,
// Instruction 73
0x1c000380,
0x1c000000,
0x0001c000,
0x05800380,
0x00700004,
0x00000700,
0x00e0000e,
0xc001c002,
0x38000202,
0x00038000,
0x00000700,
0x00000000,
// Instruction 74
0x1c000380,
0x1c000000,
0x0001c000,
0x38000380,
0x00700000,
0x00000700,
0x00e0000e,
0x4001c000,
0x38370202,
0x00038000,
0x00000700,
0x00000000,
// Instruction 75
0x1c000380,
0x1c000000,
0x0001c000,
0x38000380,
0x00700000,
0x00000700,
0x00e0000e,
0x0001c000,
0x3800001c,
0x00038000,
0x00000700,
0x00000000,
// Instruction 76
0x1c000380,
0x1c000000,
0x0001c000,
0x03000380,
0x00700000,
0x00000700,
0x00e0000e,
0x0001c000,
0x3800001c,
0x00038000,
0x00000700,
0x00000000,
// Instruction 77
0x1c780380,
0x1c000d70,
0x0001c000,
0x38008380,
0x0070d000,
0x00000700,
0x00e0000e,
0x0001c000,
0x3800001c,
0x00038000,
0x00000700,
0x00000000,
// Instruction 78
0x1c000380,
0x1c000000,
0x0001c000,
0x38000380,
0x00700000,
0x00000700,
0x00e0000e,
0x4001c000,
0x38000003,
0x00038000,
0x00000700,
0x00000000,
// Instruction 79
0x1c000380,
0x1c000000,
0x0001c000,
0x38000380,
0x00700000,
0x00000700,
0x00e0000e,
0x0001c000,
0x383d001c,
0x00038000,
0x00000700,
0x00000000,
// Instruction 80
0x1c000380,
0x1c000000,
0x0001c000,
0x38000380,
0x00700000,
0x00000700,
0x00e0000e,
0x0001c000,
0x3800001c,
0x00038000,
0x00000700,
0x00000000,
// Instruction 81
0x1c000380,
0x1c000000,
0x0001c000,
0x38000380,
0x00700000,
0x00000700,
0x00e0000e,
0x0001c000,
0x3800001c,
0x00038000,
0x00000700,
0x00081c00,
// Instruction 82
0x1c000382,
0x1c000000,
0x0001c000,
0x38000380,
0x00700000,
0x00000700,
0x00e0000e,
0x0001c000,
0x3800001c,
0x00038000,
0x00000700,
0x00000000
};
#ifdef UCODE_INFO_IL_WRAPPER
extern void g711_decode_stream(
ci_stream instream,
i_scalar _instream_jb,
o_stream outstream,
i_scalar count
);
void g711_decode_stream_wrapper(
SPI_STREAM_T* instream,
SPI_STREAM_T* outstream,
unsigned int count
)
{
unsigned int _instream_jb[1];
*_instream_jb = instream->length;
g711_decode_stream(instream, _instream_jb, outstream, &count);
}
#endif
#ifdef UCODE_INFO_WRAPPER
#include "spi_kernel_wrappers.h"
extern void g711_decode_stream(
ci_stream instream,
i_scalar _instream_jb,
o_stream outstream,
i_scalar count
);
void g711_decode_stream_wrapper(struct sc_kernel_t_struct* il_kernel, struct stream_cmd_struct* scmd, int* stream_arg_rec_lengths) {
static SPI_STREAM_TYPE_E stream_arg_types[] = {STREAM_COND_IN, STREAM_SEQ_OUT};
static SC_SCALAR_TYPE_E scalar_arg_types[] = {SC_SCALAR_COND_IN, SC_SCALAR_IN};
sc_kernel_wrapper_pre(il_kernel, scmd, "g711_decode_stream",
2, stream_arg_types, stream_arg_rec_lengths,
2, scalar_arg_types);
if (_g_il_kernels) {
sc_kernel_wrapper_pre_il(il_kernel);
g711_decode_stream(&il_kernel->stream_args[0], &il_kernel->scalar_args[0].value,
&il_kernel->stream_args[1], &il_kernel->scalar_args[1].value);
sc_kernel_wrapper_post_il(il_kernel);
}
}
#endif
#ifdef UCODE_INFO_REG_INFO
<?xml version="1.0" encoding="ISO-8859-1" ?>
<Reg>
<Instr index="0" regs="26 0 _instream_jb 26 1 count "/>
<Instr index="1" regs="26 1 count "/>
<Instr index="2" regs="25 0 _s1 0 0 _v9 5 0 _v10 6 0 _v13 2 0 _v17 7 0 _v15 7 0 _v15 8 0 _v22 "/>
<Instr index="3" regs="25 0 _s3 6 0 _v13 7 0 _v15 8 0 _v22 9 0 _v25 26 0 _s3 "/>
<Instr index="4" regs="27 1 _gs13 6 0 _v13 7 0 _v15 8 0 _v22 9 0 _v25 26 0 _s3 "/>
<Instr index="5" regs="27 1 _gs13 26 1 _gs15 19 0 _v11 6 0 _v13 5 0 _v16 7 0 _v15 8 0 _v22 9 0 _v25 26 0 _s3 "/>
<Instr index="6" regs="27 1 _gs13 26 1 _gs15 25 0 _s5 6 0 _v13 5 0 _v16 7 0 _v15 8 0 _v22 9 0 _v25 26 0 _s3 "/>
<Instr index="7" regs="27 1 _gs13 26 1 _gs15 6 0 _v13 5 0 _v16 7 0 _v15 8 0 _v22 9 0 _v25 26 0 _s3 "/>
<Instr index="8" regs="27 1 _gs13 26 1 _gs15 25 1 _gs10 6 0 _v13 5 0 _v16 7 0 _v15 8 0 _v22 9 0 _v25 26 0 _s3 "/>
<Instr index="9" regs="27 1 _gs13 26 1 _gs15 25 1 _gs10 6 0 _v13 5 0 _v16 7 0 _v15 8 0 _v22 9 0 _v25 26 0 _s3 25 0 _s28 "/>
<Instr index="10" regs="27 1 _gs13 26 1 _gs15 25 1 _gs10 6 0 _v13 5 0 _v16 7 0 _v15 8 0 _v22 9 0 _v25 26 0 _s30 "/>
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<Instr index="13" regs="27 1 _gs13 26 1 _gs15 25 1 _gs10 7 0 _v15 9 0 _v25 "/>
<Instr index="14" regs="27 1 _gs13 26 1 _gs15 25 1 _gs10 7 0 _v15 5 0 _v14 9 0 _v25 27 0 _s29 "/>
<Instr index="15" regs="27 1 _gs13 26 1 _gs15 25 1 _gs10 2 0 _v18 7 0 _v15 5 0 _v14 4 0 _v23 9 0 _v25 27 0 _s29 "/>
<Instr index="16" regs="27 1 _gs13 26 1 _gs15 25 1 _gs10 5 0 _v14 27 0 _s29 "/>
<Instr index="17" regs="27 1 _gs13 26 1 _gs15 25 1 _gs10 5 0 _v14 0 0 _v24 27 0 _s29 "/>
<Instr index="18" regs="27 1 _gs13 26 1 _gs15 25 1 _gs10 0 0 _v19 5 0 _v14 "/>
<Instr index="19" regs="27 1 _gs13 26 1 _gs15 25 1 _gs10 24 0 _gv14 "/>
<Instr index="20" regs="27 1 _gs13 26 1 _gs15 25 1 _gs10 0 0 _v20 24 0 _gv14 "/>
<Instr index="21" regs="27 1 _gs13 26 1 _gs15 25 1 _gs10 24 0 _gv14 "/>
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<Instr index="45" regs="25 1 _gs10 19 0 _gv11 24 0 _gv14 27 1 _gs13 0 0 _gv12 6 0 _v15 7 0 _v17 8 0 _v19 9 0 _v22 1 1 _v25 2 1 _v27 3 1 _v30 23 1 _v31 4 0 _v23 9 1 _v21 5 1 _v36 0 1 _v38 22 2 _v30 0 1 _v38 4 0 _v23 6 1 _v45 3 1 _v30 4 0 _v23 26 1 _gs15 27 0 _s61 "/>
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<Instr index="53" regs="25 1 _gs10 19 0 _gv11 24 0 _gv14 27 1 _gs13 0 0 _gv12 2 1 _v27 3 1 _v30 23 1 _v31 4 0 _v23 9 1 _v21 5 1 _v36 0 1 _v38 22 2 _v30 0 1 _v38 4 0 _v23 1 0 _v23 6 0 _v47 26 1 _gs15 27 0 _s61 "/>
<Instr index="54" regs="25 1 _gs10 19 0 _gv11 24 0 _gv14 27 1 _gs13 0 0 _gv12 2 1 _v27 3 1 _v30 22 1 _v26 23 1 _v31 4 0 _v23 6 0 _v26 9 1 _v21 5 1 _v36 0 1 _v38 22 2 _v30 4 0 _v23 10 0 _v51 26 1 _gs15 14 0 _v52 27 0 _s61 "/>
<Instr index="55" regs="25 1 _gs10 19 0 _gv11 24 0 _gv14 27 1 _gs13 0 0 _gv12 7 0 _v24 2 1 _v27 3 1 _v30 4 0 _v23 6 0 _v26 9 1 _v21 5 1 _v36 5 0 _v24 0 1 _v38 22 2 _v30 1 0 _v24 6 1 _v38 10 0 _v51 14 1 _v48 26 1 _gs15 14 0 _v52 27 0 _s61 "/>
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<Instr index="57" regs="25 1 _gs10 19 0 _gv11 24 0 _gv14 27 1 _gs13 0 0 _gv12 3 1 _v30 4 0 _v23 1 0 _v32 6 0 _v26 9 1 _v21 5 1 _v36 22 2 _v30 14 0 _v51 14 1 _v48 26 1 _gs15 13 0 _v52 27 0 _s61 "/>
<Instr index="58" regs="25 1 _gs10 19 0 _gv11 24 0 _gv14 27 1 _gs13 0 0 _gv12 8 0 _v28 3 1 _v30 4 0 _v23 1 0 _v32 6 0 _v26 9 1 _v21 5 1 _v36 23 0 _v39 22 2 _v30 7 0 _v41 4 0 _v23 14 1 _v48 26 1 _gs15 27 0 _s61 "/>
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<Instr index="60" regs="25 1 _gs10 19 0 _gv11 24 0 _gv14 27 1 _gs13 0 0 _gv12 4 0 _v23 9 0 _v29 1 0 _v32 6 0 _v26 9 1 _v21 5 1 _v36 7 0 _v41 3 0 _v23 8 0 _v40 14 1 _v48 26 1 _gs15 27 0 _s61 "/>
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<Instr index="62" regs="25 1 _gs10 19 0 _gv11 24 0 _gv14 27 1 _gs13 0 0 _gv12 11 0 _v33 1 0 _v32 6 0 _v26 9 1 _v21 5 1 _v36 7 0 _v41 13 0 _v43 14 1 _v48 26 1 _gs15 27 0 _s61 "/>
<Instr index="63" regs="25 1 _gs10 19 0 _gv11 24 0 _gv14 27 1 _gs13 0 0 _gv12 9 1 _v21 5 1 _v36 7 0 _v41 13 0 _v43 13 1 _v51 14 1 _v48 26 1 _gs15 12 0 _v52 27 0 _s61 "/>
<Instr index="64" regs="25 1 _gs10 19 0 _gv11 24 0 _gv14 27 1 _gs13 0 0 _gv12 4 0 _v34 9 1 _v21 5 1 _v36 7 0 _v41 13 0 _v43 14 1 _v48 26 1 _gs15 27 0 _s61 "/>
<Instr index="65" regs="25 1 _gs10 19 0 _gv11 24 0 _gv14 27 1 _gs13 0 0 _gv12 5 1 _v36 7 0 _v41 13 0 _v43 1 0 _v51 14 1 _v48 26 1 _gs15 12 0 _v52 27 0 _s61 "/>
<Instr index="66" regs="25 1 _gs10 19 0 _gv11 24 0 _gv14 27 1 _gs13 0 0 _gv12 5 1 _v36 7 0 _v41 13 0 _v43 1 0 _v51 14 1 _v48 26 1 _gs15 27 0 _s61 "/>
<Instr index="67" regs="25 1 _gs10 19 0 _gv11 24 0 _gv14 27 1 _gs13 0 0 _gv12 0 1 _v35 5 1 _v36 7 0 _v41 13 0 _v43 1 0 _v51 14 1 _v48 26 1 _gs15 12 0 _v52 27 0 _s61 "/>
<Instr index="68" regs="25 1 _gs10 19 0 _gv11 24 0 _gv14 27 1 _gs13 0 0 _gv12 7 0 _v41 13 0 _v43 1 0 _v51 14 1 _v48 26 1 _gs15 27 0 _s61 "/>
<Instr index="69" regs="25 1 _gs10 19 0 _gv11 24 0 _gv14 27 1 _gs13 0 0 _gv12 2 0 _v37 7 0 _v41 13 0 _v43 8 0 _v37 1 0 _v51 14 1 _v48 26 1 _gs15 12 0 _v52 27 0 _s61 "/>
<Instr index="70" regs="25 1 _gs10 19 0 _gv11 24 0 _gv14 27 1 _gs13 0 0 _gv12 13 0 _v43 8 0 _v37 1 0 _v51 14 1 _v48 26 1 _gs15 27 0 _s61 "/>
<Instr index="71" regs="25 1 _gs10 19 0 _gv11 24 0 _gv14 27 1 _gs13 0 0 _gv12 13 0 _v43 8 0 _v37 1 0 _v51 14 1 _v48 26 1 _gs15 12 0 _v52 27 0 _s61 "/>
<Instr index="72" regs="25 1 _gs10 19 0 _gv11 24 0 _gv14 27 1 _gs13 0 0 _gv12 13 0 _v43 3 0 _v42 8 0 _v37 1 0 _v51 14 1 _v48 26 1 _gs15 27 0 _s61 "/>
<Instr index="73" regs="25 1 _gs10 19 0 _gv11 24 0 _gv14 27 1 _gs13 0 0 _gv12 1 0 _v51 14 1 _v48 26 1 _gs15 12 0 _v52 27 0 _s61 "/>
<Instr index="74" regs="25 1 _gs10 19 0 _gv11 24 0 _gv14 27 1 _gs13 0 0 _gv12 1 0 _v51 6 0 _v44 14 1 _v48 9 0 _v44 26 1 _gs15 27 0 _s61 "/>
<Instr index="75" regs="25 1 _gs10 19 0 _gv11 24 0 _gv14 27 1 _gs13 0 0 _gv12 14 1 _v48 9 0 _v44 26 1 _gs15 6 0 _v52 27 0 _s61 "/>
<Instr index="76" regs="25 1 _gs10 19 0 _gv11 24 0 _gv14 27 1 _gs13 0 0 _gv12 14 1 _v48 9 0 _v44 26 1 _gs15 6 0 _v52 27 0 _s61 "/>
<Instr index="77" regs="25 1 _gs10 19 0 _gv11 24 0 _gv14 27 1 _gs13 0 0 _gv12 14 1 _v48 4 0 _v50 9 0 _v44 26 1 _gs15 6 0 _v52 27 0 _s61 "/>
<Instr index="78" regs="25 1 _gs10 19 0 _gv11 24 0 _gv14 27 1 _gs13 0 0 _gv12 26 1 _gs15 6 0 _v52 "/>
<Instr index="79" regs="25 1 _gs10 19 0 _gv11 24 0 _gv14 27 1 _gs13 0 0 _gv12 26 1 _gs15 1 0 _v49 6 0 _v52 "/>
<Instr index="80" regs="25 1 _gs10 19 0 _gv11 24 0 _gv14 27 1 _gs13 0 0 _gv12 26 1 _gs15 "/>
<Instr index="81" regs="25 1 _gs10 19 0 _gv11 24 0 _gv14 27 1 _gs13 0 0 _gv12 26 1 _gs15 "/>
<Instr index="82" regs=""/>
</Reg>
#endif
#ifdef UCODE_INFO_VIZ_INFO
/* #SCHEDVIZ_VERSION=2.0 */
/* #FUS=U0 Q0 U1 Q1 U2 Q2 U3 Q3 U4 Q4 COM CON S0 S1 S2 S3 S4 S5 S6 S7 SI BRU UC */
/* #BLOCKS="imin=0, imax=21, smax=0, depth=0" "imin=22, imax=81, smax=0, depth=1" "imin=82, imax=82, smax=0, depth=0" */
/* #DEPTYPES=normal */
/* begin op labels */
i0u22x0 [label="b=0, i=0/1, u=22, t=0, l=69, ord=0\nUC\n( _s1[UC.A[0] ] ) =\nPASSB( _instream_jb[UC.B[0] ] )",style=filled, color=wheat1];
i0u0x6 [label="b=0, i=0/1, u=0, t=6, l=83, ord=0\nU0\n( _v9[U0.A[0] ] ) =\nLIMMLV( )",style=filled, color=wheat1];
i0u2x7 [label="b=0, i=0/1, u=2, t=7, l=85, ord=0\nU1\n( _v10[U0.B[0] ] ) =\nLIMMLV( )",style=filled, color=wheat1];
i0u4x10 [label="b=0, i=0/1, u=4, t=10, l=91, ord=0\nU2\n( _v13[U1.B[0] ] ) =\nLIMMLV( )",style=filled, color=wheat1];
i0u6x12 [label="b=0, i=0/1, u=6, t=12, l=95, ord=0\nU3\n( _v15[U2.B[0] U2.B[0] ] ) =\nLIMMLV( )",style=filled, color=wheat1];
i0u8x13 [label="b=0, i=0/1, u=8, t=13, l=97, ord=0\nU4\n( _v17[U2.A[0] ] ) =\nLIMMLV( )",style=filled, color=wheat1];
i0u10x19 [label="b=0, i=0/1, u=10, t=19, l=109, ord=0\nCOM\n( _v22[U3.B[0] ] ) =\nLIMMLV( )",style=filled, color=wheat1];
i1u22x2 [label="b=0, i=1/2, u=22, t=2, l=73, ord=0\nUC\n( _s3[UC.A[0] UC.B[0] ] ) =\nPASSB( count[UC.B[1] ] )",style=filled, color=wheat1];
i1u0x21 [label="b=0, i=1/2, u=0, t=21, l=113, ord=0\nU0\n( _v25[U4.B[0] ] ) =\nLIMMLV( )",style=filled, color=wheat1];
i2u22x1 [label="b=0, i=2/3, u=22, t=1, l=71, ord=0\nUC\n( _gs13[UC.C[1] ] ) =\nPASSA( _s1[UC.A[0] ] )",style=filled, color=wheat1];
i2u0x8 [label="b=0, i=2/4, u=0, t=8, l=87, ord=0\nU0\n( _v11[SI.I[0] ] ) =\nADDI32V( _v9[U0.A[0] ], _v10[U0.B[0] ] )",style=filled, color=wheat1];
i2u4x14 [label="b=0, i=2/4, u=4, t=14, l=99, ord=0\nU2\n( _v16[U0.B[0] ] ) =\nSUBI32V( _v17[U2.A[0] ], _v15[U2.B[0] ] )",style=filled, color=wheat1];
i3u22x3 [label="b=0, i=3/4, u=22, t=3, l=75, ord=0\nUC\n( _gs15[UC.B[1] ] ) =\nPASSA( _s3[UC.A[0] ] )",style=filled, color=wheat1];
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