mftphy2500.h

2500驱动

#define max_channr      0xFF
#define CRC_OK              0x80
#define RSSI                0
#define L_QI                 1
#define BYTES_IN_RXFIFO     0x7F
#define FIRSTCHAN       71//104//71
#define WRITE_BURST     0x40
#define READ_SINGLE     0x80
#define READ_BURST      0xC0
//sbit Tick=P1^6; 
//-------------------------------------------------------------------------------------------------------
// RF_SETTINGS is a data structure which contains all relevant CCxxx0 registers
typedef enum S_RF_SETTINGS{
     FSCTRL1,   // Frequency synthesizer control.
     FSCTRL0,   // Frequency synthesizer control.
     FREQ2,     // Frequency control word, high uchar.
     FREQ1,     // Frequency control word, middle uchar.
     FREQ0,     // Frequency control word, low uchar.
     MDMCFG4,   // Modem configuration.
     MDMCFG3,   // Modem configuration.
     MDMCFG2,   // Modem configuration.
     MDMCFG1,   // Modem configuration.
     MDMCFG0,   // Modem configuration.
     CHANNR,    // Channel number.
     DEVIATN,   // Modem deviation setting (when FSK modulation is enabled).
     FREND1,    // Front end RX configuration.
     FREND0,    // Front end RX configuration.
     MCSM0,     // Main Radio Control State Machine configuration.
     FOCCFG,    // Frequency Offset Compensation Configuration.
     BSCFG,    // Bit synchronization Configuration.
     AGCCTRL2,  // AGC control.
   AGCCTRL1,  // AGC control.
     AGCCTRL0,  // AGC control.
     FSCAL3,    // Frequency synthesizer calibration.
     FSCAL2,    // Frequency synthesizer calibration.
   FSCAL1,    // Frequency synthesizer calibration.
     FSCAL0,    // Frequency synthesizer calibration.
     FSTEST,    // Frequency synthesizer calibration control
     TEST2,     // Various test settings.
     TEST1,     // Various test settings.
     TEST0,     // Various test settings.
     IOCFG2,    // GDO2 output pin configuration
     IOCFG0,    // GDO0 output pin configuration
     PKTCTRL1,  // Packet automation control.
     PKTCTRL0,  // Packet automation control.
     ADDR,      // Device address.
     PKTLEN,    // Packet length.
} RF_SETTINGS;
extern uchar halRfReceivePacket(uchar *rxBuffer, uchar *rssi);

extern void halRfSendPacket(uchar *txBuffer, uchar size) ;

extern void halRfWriteRfSettings(void);

extern uchar halSpiReadReg(uchar addr) ;

extern uchar halSpiReadStatus(uchar addr) ;

extern void halSpiStrobe(uchar strobe) ;


extern void POWER_UP_RESET_CC0(void);

extern void halSpiWriteBurstReg(uchar addr, uchar  *buffer, uchar count);

//-------------------------------------------------------------------------------------------------------
extern void halSpiWriteReg(uchar addr, uchar value);
extern void halSpiReadBurstReg(unsigned char addr, unsigned char *buffer, unsigned char count) ;

extern void RESET_CCxxx0(void);