rbwcfg_c.c

在ccs中调试DSP外部存储sdram的反色代码

/*   Do *not* directly modify this file.  It was    */
/*   generated by the Configuration Tool; any  */
/*   changes risk being overwritten.                */

/* INPUT rBW.cdb */

/*  Include Header File  */
#include "rBWcfg.h"


#ifdef __cplusplus
#pragma CODE_SECTION(".text:CSL_cfgInit")
#else
#pragma CODE_SECTION(CSL_cfgInit,".text:CSL_cfgInit")
#endif


#ifdef __cplusplus
#pragma FUNC_EXT_CALLED()
#else
#pragma FUNC_EXT_CALLED(CSL_cfgInit)
#endif

/*  Config Structures */
EMIFA_Config MT48 = {
    0x00022024,        /*  Global Control Reg. (GBLCTL)   */
    0xFFFFFFD3,        /*  CE0 Space Control Reg. (CECTL0)   */
    0xFFFFFF03,        /*  CE1 Space Control Reg. (CECTL1)   */
    0xFFFFFF03,        /*  CE2 Space Control Reg. (CECTL2)   */
    0xFFFFFF03,        /*  CE3 Space Control Reg. (CECTL3)   */
    0x63116000,        /*  SDRAM Control Reg.(SDCTL)   */
    0x005DC30E,        /*  SDRAM Timing Reg.(SDTIM)   */
    0x00054529,        /*  SDRAM Extended Reg.(SDEXT)   */
    0x00000037,        /*  CE0 Space Secondary Control Reg. (CESEC0)  */
    0x00000062,        /*  CE1 Space Secondary Control Reg. (CESEC1)  */
    0x00000062,        /*  CE2 Space Secondary Control Reg. (CESEC2)  */
    0x00000062         /*  CE3 Space Secondary Control Reg. (CESEC3)  */
};

/*  Handles  */

/*
 *  ======== CSL_cfgInit() ========  
 */
void CSL_cfgInit()
{
}