📄 lcd_main.lst
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534 1 stGUD1.INPUT_SOURCE = (stGUD1.INPUT_SOURCE & 0xf8) | SOURCE_VGA;
535 1 #endif
536 1
537 1 #if (TV_CHIP == TV_NONE)
538 1 if (SOURCE_TV == (stGUD1.INPUT_SOURCE & 0x07))
539 1 stGUD1.INPUT_SOURCE = (stGUD1.INPUT_SOURCE & 0xf8) | SOURCE_VGA;
540 1 #endif
541 1
542 1 // Because internal ADC power state will not affect VGA mode detection,
543 1 // we always turn off ADC when source changed, and turn it on again only
544 1 // when a valid VGA mode is going to display.
545 1 PowerDown_ADC();
546 1
547 1 switch (stGUD1.INPUT_SOURCE & 0x07)
548 1 {
549 2 case SOURCE_VGA:
C51 COMPILER V7.50 LCD_MAIN 07/28/2008 16:10:53 PAGE 10
550 2 #if (VIDEO_CHIP == TW_9905 )
PowerDown_VDC();
#endif
553 2 #if (VIDEO_CHIP == VDC_SAA7114 || VIDEO_CHIP == VDC_SAA7115 )
I2CWrite(V_DISABLE); // VIDEO DISABLE
I2CWrite(V_NOWORK); // VIDEO No Work
PowerDown_VDC();
#endif
558 2 // Set user's ADC gain and offset settings
559 2 SetADC_GainOffset();
560 2 ucInputSrc = SOURCE_VGA;
561 2 ucSync_Type = SYNC_SS;
562 2 RTDCodeW(VGA_INI_SS);
563 2 break;
564 2
565 2 case SOURCE_AV:
566 2 #if (VIDEO_CHIP == TW_9905 )
PowerUp_VDC();
Delay_Xms(10);
Reset_TW9905();
Delay_Xms(10);
I2CWrite_TW990X(0x03,0x82);
I2CWrite_TW990X(0x08,0x12);
I2CWrite_TW990X(0x09,0xf4);
I2CWrite_TW990X(0x0b,0xd0);
I2CWrite_TW990X(0x19,0x58);
I2CWrite_TW990X(0x55,0x10);
Delay_Xms(10);
I2CWrite_TW990X(0x02,0x40);//0100 0000 for AV
Delay_Xms(10);
ucInputSrc = SOURCE_AV;
RTDCodeW(VIDEO_INI);
#endif
584 2 #if (VIDEO_CHIP == VDC_SAA7114 || VIDEO_CHIP == VDC_SAA7115 )
PowerUp_VDC();
Delay_Xms(10);
I2CWrite(V_ENABLE); // VIDEO ENABLE
I2CWrite(VIDEO_ALL);
I2CWrite(AV_DETECT); // VIDEO Detect(AV)
ucInputSrc = SOURCE_AV;
RTDCodeW(VIDEO_INI);
I2CRead(ADDR_VIDEO, 0x1f, 0x01);
#endif
594 2 LoadVDC_Color();
595 2 break;
596 2
597 2 case SOURCE_TV:
598 2 bTVFlag = 1;
599 2 #if (VIDEO_CHIP == TW_9905 )
PowerUp_VDC();
Delay_Xms(10);
bTUNER_PD = 0;
Reset_TW9905();
Delay_Xms(10);
I2CWrite_TW990X(0x03,0x82);
I2CWrite_TW990X(0x08,0x12);
I2CWrite_TW990X(0x09,0xf4);
I2CWrite_TW990X(0x0b,0xd0);
I2CWrite_TW990X(0x19,0x58);
I2CWrite_TW990X(0x55,0x10);
I2CWrite_TW990X(0x1c,0x07);
C51 COMPILER V7.50 LCD_MAIN 07/28/2008 16:10:53 PAGE 11
Delay_Xms(10);
I2CWrite_TW990X(0x02,0x48);//0100 1000 for TV
Delay_Xms(10);
ucInputSrc = SOURCE_TV;
#if (TV_CHIP != TV_NONE)
Set_TV_Channel(1);
#endif
RTDCodeW(VIDEO_INI);
#endif
621 2 #if (VIDEO_CHIP == VDC_SAA7114 || VIDEO_CHIP == VDC_SAA7115 )
PowerUp_VDC();
Delay_Xms(10);
I2CWrite(V_ENABLE); // VIDEO ENABLE
I2CWrite(VIDEO_ALL);
I2CWrite(AV_DETECT); // VIDEO Detect(AV)
ucInputSrc = SOURCE_TV;
#if (TV_CHIP != TV_NONE)
Set_TV_Channel(1);
#endif
I2CWrite(TV_SOURCE_SEL);
I2CWrite(TV_SCAN_GAIN);
RTDCodeW(VIDEO_INI);
I2CRead(ADDR_VIDEO, 0x1f, 0x01);
#endif
636 2 LoadVDC_Color();
637 2 break;
638 2
639 2 case SOURCE_SV:
640 2 #if (VIDEO_CHIP == TW_9905 )
PowerUp_VDC();
Delay_Xms(10);
Reset_TW9905();
Delay_Xms(10);
I2CWrite_TW990X(0x03,0x82);
I2CWrite_TW990X(0x08,0x12);
I2CWrite_TW990X(0x09,0xf4);
I2CWrite_TW990X(0x0b,0xd0);
I2CWrite_TW990X(0x19,0x58);
I2CWrite_TW990X(0x55,0x10);
Delay_Xms(10);
I2CWrite_TW990X(0x02,0x54);//0101 0100 for SV
ucInputSrc = SOURCE_SV;
RTDCodeW(VIDEO_INI);
#endif
656 2 #if (VIDEO_CHIP == VDC_SAA7114 || VIDEO_CHIP == VDC_SAA7115 )
PowerUp_VDC();
Delay_Xms(10);
I2CWrite(V_ENABLE); // VIDEO ENABLE
I2CWrite(VIDEO_ALL);
I2CWrite(SV_DETECT); // VIDEO Detect(SV)
ucInputSrc = SOURCE_SV;
RTDCodeW(VIDEO_INI);
I2CRead(ADDR_VIDEO, 0x1f, 0x01);
#endif
666 2 LoadVDC_Color();
667 2 break;
668 2
669 2 case SOURCE_YUV:
670 2 PowerUp_VDC();
671 2 Delay_Xms(10);
672 2 I2CWrite(V_ENABLE); // VIDEO ENABLE
673 2 I2CWrite(VIDEO_ALL);
C51 COMPILER V7.50 LCD_MAIN 07/28/2008 16:10:53 PAGE 12
674 2 I2CWrite(VIDEO_YUV);
675 2
676 2 I2CWrite(YUV_DETECT); // VIDEO Detect(YUV)
677 2
678 2 ucInputSrc = SOURCE_YUV;
679 2 RTDCodeW(VIDEO_INI);
680 2 // I2CRead(ADDR_VIDEO, 0x1f, 0x01);
681 2 break;
682 2 }
683 1
684 1 #if (AUDIO_TYPE != AUDIO_NONE)
SetVolume();
#endif
687 1 }
688 #endif
689
690 void Free_Background(void) // Force to FreeRun & Background
691 {
692 1 RTDCodeW(FreeV); // Switch to free-running mode
693 1
694 1 if (PANEL_OFF == bPANEL_PWR)
695 1 {
696 2 RTDSetByte(VDIS_SIGINV_21, 0x00); // DHS, DVS, DEN, DCLK MUST NOT be inverted.
697 2 RTDSetBit(VDIS_CTRL_20, 0xfd, 0x01); // DHS, DVS, DEN, DCLK and data are clamped to 0
698 2 }
699 1
700 1 RTDSetBit(VGIP_CTRL_04, 0xfe, 0x00); // Stop sampling input pixels
701 1
702 1 // Blue background when input source is TV signal.
703 1 RTDSetBit(VDIS_SIGINV_21, 0x0f, SOURCE_TV == (stGUD1.INPUT_SOURCE & 0x07) ? 0x10 : 0x00);
704 1 }
705
706 /////////////////////////////////////////////////////////
707 //------------------- Mode Detector -----------------//
708 /////////////////////////////////////////////////////////
709 void Mode_Detector(void)
710 {
711 1 switch (stGUD1.INPUT_SOURCE & 0x07)
712 1 {
713 2 case SOURCE_VGA :
714 2 // Save previous values of ucMode_Curr, bHpole_Curr and bVpole_Curr
715 2 bHpole_Prev = bHpole_Curr;
716 2 bVpole_Prev = bVpole_Curr;
717 2
718 2 if ((MODE_NOSIGNAL == ucMode_Curr) || (MODE_NOSUPPORT == ucMode_Curr))
719 2 Detect_VGA_Mode();
720 2 else
721 2 Check_VGA_Mode();
722 2 break;
723 2
724 2 #if(TV_CHIP != TV_NONE)
case SOURCE_TV :
if ((MODE_NOSIGNAL == ucMode_Curr) || (MODE_NOSUPPORT == ucMode_Curr))
Detect_TV_Mode(); // Set default polarity
else
Check_TV_Mode(); // Set polarity after measure
break;
#endif
732 2
733 2 default :
734 2 if ((MODE_NOSIGNAL == ucMode_Curr) || (MODE_NOSUPPORT == ucMode_Curr))
735 2 Detect_Video_Mode(); // Set default polarity
C51 COMPILER V7.50 LCD_MAIN 07/28/2008 16:10:53 PAGE 13
736 2 else
737 2 Check_Video_Mode(); // Set polarity after measure
738 2 break;
739 2 }
740 1
741 1 Measure_Mode(); // Measure mode-timing
742 1 }
743
744 void Measure_Mode(void)
745 {
746 1 switch (stGUD1.INPUT_SOURCE & 0x07)
747 1 {
748 2 case SOURCE_VGA :
749 2 RTDSetByte(SYNC_POR_4C, (SYNC_SS == ucSync_Type) ? 0x02 : 0x32);
750 2 break;
751 2 default :
752 2 RTDSetByte(SYNC_POR_4C, 0x02);
753 2 break;
754 2 }
755 1 }
756
757 /////////////////////////////////////////////////////////
758 //------------------ Detect VGA Mode ----------------//
759 /////////////////////////////////////////////////////////
760 void Detect_VGA_Mode(void)
761 {
762 1 unsigned char ucMode_Temp, m;
763 1 unsigned int usHS_Pulse;
764 1
765 1 RTDRead(SYNC_POR_4C, 0x09, Y_INC);
766 1
767 1 if (Data[0] & 0x02)
768 1 {
769 2 // Reset Sync Processor when sync signal timeout
770 2 RTDSetByte(SYNC_POR_4C, 0x20);
771 2
772 2 // Treat sync signal timeout as no signal
773 2 ucMode_Temp = MODE_NOSIGNAL;
774 2 }
775 1 else
776 1 {
777 2
778 2 ucMode_Temp = (Data[8] & 0xe0 ) >> 5;
779 2
780 2 if(ucMode_Temp == 0 || ucMode_Temp >=4) //Test which edge of Hsync to latch Vsync will be safe
781 2 RTDSetBit(MEAS_VS_HI_54,0xf7,0x08); //Use positive edge of Hsync to latch Vsync
782 2 else
783 2 RTDSetBit(MEAS_VS_HI_54,0xf7,0x00); //Use negtive edge of Hsync to latch Vsync
784 2
785 2
786 2 usStdHS = usHsync; // Save previous usHsync in usStdHS
787 2 usStdVS = usVsync; // Save previous usVsync in usStdVS
788 2
789 2 bVpole_Curr = (bit)(Data[0] & 0x08); // Save current usVsync polarity
790 2 bHpole_Curr = (bit)(Data[0] & 0x04); // Save current usHsync polarity
791 2
792 2 Data[7] = Data[5];
793 2 Data[6] = Data[6] & 0x0f;
794 2 Data[5] = Data[3];
795 2 Data[4] = Data[4] & 0x87;
796 2 Data[3] = Data[1];
797 2 Data[2] = Data[2] & 0x8f;
C51 COMPILER V7.50 LCD_MAIN 07/28/2008 16:10:53 PAGE 14
798 2
799 2 usHsync = ((unsigned int *)Data)[1]; // Current HSYNC timing
800 2 usVsync = ((unsigned int *)Data)[2]; // Current VSYNC timing
801 2 usHS_Pulse = ((unsigned int *)Data)[3]; // Current HSYNC pulse width
802 2
803 2 // Calculate Vertical Refresh Rate
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