📄 lcd_main.lst
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RTDSetByte(VDIS_SIGINV_21, 0x00); // DHS, DVS, DEN, DCLK MUST NOT be inverted.
RTDSetBit(VDIS_CTRL_20, 0xfd, 0x21); // DHS, DVS, DEN, DCLK and data are clamped to 0
RTDSetBit(DIS_TIMING0_3A, 0xff, 0x20); // Force display timing enable
RTDSetBit(DIS_TIMING0_3A, 0xdf, 0x00); // Stop forcing
_nop_(); _nop_(); _nop_(); _nop_(); _nop_(); _nop_(); _nop_(); _nop_();
RTDSetBit(VDIS_CTRL_20, 0xfe, 0x00); // Stop display timing
RTDSetByte(HOSTCTRL_02, 0x42); // Put RTD2020 back into power-saving mode
RTDSetByte(DPLL_CTRL_D0, 0x10); // Disable DPLL
RTDCodeW(RTD_DDC_TABLE);
RTDCodeW(RTD_IO_INI);
PowerDown_VDC();
PowerDown_LVDS();
IE = 0x00; // Disable all interrupts
TMOD = 0x11; // Program Timer0 & Timer1 to Mode#1
TR0 = 0; // Stop Timer0
TF0 = 0; // Clear Timer0 Overflow Bit
TL0 = TIME0_COUNTER_LBYTE; // Load Timer0 low-byte (for 20ms)
TH0 = TIME0_COUNTER_HBYTE; // Load Timer0 high-byte (for 20ms)
TR1 = 0; // Stop Timer1
TF1 = 0; // Clear Timer1 Overflow Bit
TL1 = TIME1_COUNTER_LBYTE; // Load Timer1 low-byte (for 1ms)
TH1 = TIME1_COUNTER_HBYTE; // Load Timer1 hifh-byte (for 1ms)
IE = 0x8a; // Enable interrupts of Timer0 and Timer1
// Check and initial EEPROM if necessary
Delay_Xms(10);
Check_EEPROM();
Delay_Xms(10);
// Turn timer0 on. Let's go ~~~
TR0 = 1;
#else // For external MCU
C51 COMPILER V7.50 LCD_MAIN 07/28/2008 16:10:53 PAGE 6
302 1
303 1 bLIGHT_PWR = LIGHT_OFF;
304 1 bPANEL_PWR = PANEL_OFF;
305 1
306 1 IE = 0x00; // Disable all interrupts
307 1 TMOD = 0x11; // Program Timer0 & Timer1 to Mode#1
308 1 TR0 = 0; // Stop Timer0
309 1 TF0 = 0; // Clear Timer0 Overflow Bit
310 1 TL0 = TIME0_COUNTER_LBYTE; // Load Timer0 low-byte (for 20ms)
311 1 TH0 = TIME0_COUNTER_HBYTE; // Load Timer0 high-byte (for 20ms)
312 1 TR1 = 0; // Stop Timer1
313 1 TF1 = 0; // Clear Timer1 Overflow Bit
314 1 TL1 = TIME1_COUNTER_LBYTE; // Load Timer1 low-byte (for 1ms)
315 1 TH1 = TIME1_COUNTER_HBYTE; // Load Timer1 hifh-byte (for 1ms)
316 1 IE = 0x8a; // Enable interrupts of Timer0 and Timer1
317 1
318 1 M512_PadMode0=0x00; //p6 not use for ad
319 1 M512_PadMode1=0xff; //p5 not use for da
320 1 M512_PadMode2=0x80; //p3.01 iic , p5.67 normal
321 1 #if(BOARD_TYPE != TTL_M02C)
322 1 M512_PadMode3=0x60; //p5.012347 input p5.56 output
323 1 M512_PadMode4=0xbe; //p6.06 input p6.123457 output
324 1 #else
M512_PadMode3=0x0f; //p5.0123 output p5.4567 input
M512_PadMode4=0x03; //p6.01 output p6.234567 input
#endif
328 1 M512_PadMode5=0x00; //p1 8051 standard IO
329 1 M512_PadMode6=0x00; //p7.6 not for clko
330 1 M512_PadMode7=0x00; //p7.6, p7.7 input
331 1
332 1
333 1 RTDSetBit(HOSTCTRL_02,0xfb,0x00); // RTD turn on
334 1
335 1 bRTD_RST = 0;
336 1 Delay_Xms(10);
337 1 do
338 1 {
339 2 // Wait for reset complete
340 2 bRTD_RST = 1;
341 2 Delay_Xms(2);
342 2 }
343 1 while (!bRTD_RST);
344 1
345 1 RTDCodeW(RTD_PWUP_INI);
346 1
347 1 RTDSetByte(HOSTCTRL_02, 0x40); // Wake RTD up
348 1 RTDSetByte(DPLL_CTRL_D0, 0x11); // Enable DPLL
349 1
350 1 RTDSetByte(VDIS_SIGINV_21, 0x00); // DHS, DVS, DEN, DCLK MUST NOT be inverted.
351 1 RTDSetBit(VDIS_CTRL_20, 0xfd, 0x21); // DHS, DVS, DEN, DCLK and data are clamped to 0
352 1
353 1 RTDSetBit(DIS_TIMING0_3A, 0xff, 0x20); // Force display timing enable
354 1 RTDSetBit(DIS_TIMING0_3A, 0xdf, 0x00); // Stop forcing
355 1
356 1 _nop_(); _nop_(); _nop_(); _nop_(); _nop_(); _nop_(); _nop_(); _nop_();
357 1
358 1 RTDSetBit(VDIS_CTRL_20, 0xfe, 0x00); // Stop display timing
359 1
360 1 RTDSetByte(HOSTCTRL_02, 0x42); // Put RTD2020 back into power-saving mode
361 1 RTDSetByte(DPLL_CTRL_D0, 0x10); // Disable DPLL
362 1
363 1 RTDCodeW(RTD_DDC_TABLE);
C51 COMPILER V7.50 LCD_MAIN 07/28/2008 16:10:53 PAGE 7
364 1 RTDCodeW(RTD_IO_INI);
365 1
366 1 PowerDown_VDC();
367 1 PowerDown_LVDS();
368 1
369 1 Delay_Xms(10);
370 1
371 1 // Check and initial EEPROM if necessary
372 1 Delay_Xms(10);
373 1 Check_EEPROM();
374 1 Delay_Xms(10);
375 1
376 1 // Turn timer0 on. Let's go ~~~
377 1 TR0 = 1;
378 1
379 1 #endif
380 1 }
381
382 void Power_Up_Init(void) // Do once when power up
383 {
384 1 RTDSetBit(HOSTCTRL_02,0xfb,0x00); // RTD turn on
385 1
386 1 Reset_RTD(); // Initial RTD3000 & OSD
387 1
388 1 bLIGHT_PWR = LIGHT_OFF;
389 1 bPANEL_PWR = PANEL_OFF;
390 1
391 1 PowerDown_VDC();
392 1 PowerDown_LVDS();
393 1
394 1
395 1
396 1
397 1
398 1
399 1
400 1
401 1
402 1
403 1
404 1
405 1
406 1
407 1 #if (SWAP_RED_BLUE)
408 1 RTDSetBit(OVL_CTRL_6D, 0x3f, (stGUD1.FUNCTION & 0x10) ? 0x90 : 0x10);
409 1 #else
RTDSetBit(OVL_CTRL_6D, 0x3f, (stGUD1.FUNCTION & 0x10) ? 0x80 : 0x00);
#endif
412 1
413 1 #if (SPREAD_SPECTRUM)
RTDSetBit(DPLL_CTRL_D0, 0x01, 0x08);
RTDRead(DPLL_M_D1, 0x01, Y_INC);
if (0xd2 < Data[0])
Data[1] = 0x09;
else if (0x8d < Data[0])
Data[1] = 0x0a;
else if (0x6d < Data[0])
Data[1] = 0x0b;
else if (0x57 < Data[0])
Data[1] = 0x0c;
else if (0x47 < Data[0])
C51 COMPILER V7.50 LCD_MAIN 07/28/2008 16:10:53 PAGE 8
Data[1] = 0x0d;
else if (0x37 < Data[0])
Data[1] = 0x0e;
else
Data[1] = 0x0f;
RTDSetByte(DPLL_FILTER_D3, Data[1]);
RTDSetByte(DPLL_SSP_D4, 0xf7);
#endif
435 1
436 1 Init_Input_Source(); // Initial Mode & OSD
437 1 }
438
439 void Reset_RTD(void)
440 {
441 1 bRTD_RST = 0;
442 1 Delay_Xms(10);
443 1 do
444 1 {
445 2 // Wait for reset complete
446 2 bRTD_RST = 1;
447 2 Delay_Xms(6);
448 2 }
449 1 while (!bRTD_RST);
450 1
451 1 // Initial RTD3000 & free background display
452 1 RTDCodeW(RTD_PWUP_INI);
453 1
454 1
455 1
456 1
457 1
458 1 RTDCodeW(RTD_DDC_TABLE);
459 1 RTDCodeW(RTD_IO_INI);
460 1
461 1 RTDSetByte(HOSTCTRL_02, 0x40); // Wake RTD up
462 1
463 1 RTDCodeW(FreeV);
464 1
465 1 RTDSetByte(VDIS_SIGINV_21, 0x00); // DHS, DVS, DEN, DCLK MUST NOT be inverted.
466 1 RTDSetBit(VDIS_CTRL_20, 0xfd, 0x01); // DHS, DVS, DEN, DCLK and data are clamped to 0
467 1
468 1 // Initial RTD3000-OSD
469 1 RTDCodeW(OSD_PWUP_INI);
470 1 RTDCodeW(OSD_Reset);
471 1
472 1 // Initial OSD palette
473 1 RTDCodeW(Palette_Open);
474 1 RTDCodeW(Palette_7);
475 1 RTDCodeW(Palette_Close);
476 1
477 1 Set_Gamma();
478 1 Set_Dithering();
479 1 Set_Bright_Contrast();
480 1 }
481
482 #if(INPUTSOURCE == VIDEO_ONLY)
void Init_Input_Source(void)
{
ucMode_Found = MODE_NOSUPPORT;
ucMode_Curr = MODE_NOSIGNAL;
ucMode_Times = 0;
C51 COMPILER V7.50 LCD_MAIN 07/28/2008 16:10:53 PAGE 9
ucAV_Mode = 0;
bVpole_Curr = 1; // The initial set of polarity is positive
bHpole_Curr = 1; // The initial set of polarity is positive
stGUD1.INPUT_SOURCE = (stGUD1.INPUT_SOURCE & 0xf8) | SOURCE_AV;
PowerDown_ADC();
PowerUp_VDC();
Delay_Xms(10);
#if (VIDEO_CHIP == TW_9905 )
I2CWrite_TW990X(0x03,0x82);
I2CWrite_TW990X(0x08,0x12);
I2CWrite_TW990X(0x09,0xf4);
I2CWrite_TW990X(0x0b,0xd0);
I2CWrite_TW990X(0x19,0x58);
I2CWrite_TW990X(0x55,0x00);
#endif
#if (VIDEO_CHIP == VDC_SAA7114 || VIDEO_CHIP == VDC_SAA7115 )
I2CWrite(V_ENABLE); // VIDEO ENABLE
I2CWrite(VIDEO_ALL);
I2CWrite(AV_DETECT); // VIDEO Detect(AV)
I2CRead(ADDR_VIDEO, 0x1f, 0x01);
#endif
ucInputSrc = SOURCE_AV;
RTDCodeW(VIDEO_INI);
LoadVDC_Color();
}
#else
518 void Init_Input_Source(void)
519 {
520 1 ucMode_Found = MODE_NOSUPPORT;
521 1 ucMode_Curr = MODE_NOSIGNAL;
522 1 ucMode_Times = 0;
523 1 ucAV_Mode = 0;
524 1 bVpole_Curr = 1; // The initial set of polarity is positive
525 1 bHpole_Curr = 1; // The initial set of polarity is positive
526 1 bTVFlag = 0;
527 1 bTUNER_PD = 1;
528 1 // Unknown signal source
529 1 if (SOURCE_MAX < (stGUD1.INPUT_SOURCE & 0x07))
530 1 stGUD1.INPUT_SOURCE = (stGUD1.INPUT_SOURCE & 0xf8) | SOURCE_VGA;
531 1
532 1 #if (VIDEO_CHIP == VDC_NONE)
533 1 if (SOURCE_AV == (stGUD1.INPUT_SOURCE & 0x07) || SOURCE_SV == (stGUD1.INPUT_SOURCE & 0x07))
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