📄 lcd_main.c
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((unsigned long *)Data)[0] = (unsigned long)usHsync * usVsync;
ucRefresh = (unsigned long)49152000 / ((unsigned long *)Data)[0];
ucRefresh = (ucRefresh & 0x01) ? ((ucRefresh + 1) >> 1) : (ucRefresh >> 1);
// Treat small change of usHsync/usVsync as no change
if (usStdHS <= usHsync && (usStdHS + 2) >= usHsync) usHsync = usStdHS;
if (usStdVS <= usVsync && (usStdVS + 2) >= usVsync) usVsync = usStdVS;
// Polarity must be correct
if ((bVpole_Curr != bVpole_Prev) || (bHpole_Curr != bHpole_Prev))
{
RTDRead(VGIP_SIGINV_05, 0x01, N_INC);
Data[0] &= 0xd7; // HS_RAW & VS positive
if (!bHpole_Curr) Data[0] |= 0x20;
if (!bVpole_Curr && SYNC_SS == ucSync_Type) Data[0] |= 0x08; // Seperate sync
RTDSetByte(VGIP_SIGINV_05, Data[0]);
ucMode_Temp = MODE_NOSUPPORT;
}
else
{
if (0x07ff <= usHsync || 0x07ff <= usVsync || 0 == usHsync || 0 == usVsync)
{
ucMode_Temp = MODE_NOSIGNAL; // Treat overflow as no signal
}
else
{
Data[0] = usHS_Pulse * 12 / usHsync; // 0 : 720x350; 1 : 640x350;
ucMode_Temp = MODE_NOSUPPORT;
// Search for Standard Mode
#if(DISP_SIZE <= DISP_1024x768) //V225
m = MODE_1024x0768x75HZ;
#endif
#if(DISP_SIZE == DISP_1280x1024)
m = MODE_1280x1024x75HZ;
#endif
#if(DISP_SIZE > DISP_1280x1024)
m = MODE_1600x1200x60HZ;
#endif
do
{
if ((usHsync > VGA_Mode[m][0]) && (usHsync < VGA_Mode[m][1]))
{
if ((usVsync >= VGA_Mode[m][2]) && (usVsync <= VGA_Mode[m][3]))
{
if (MODE_1280x1024x75HZ == m)
{
if (0 == (bVpole_Curr | bHpole_Curr)) m = MODE_1280x1024x76HZ; // SUN 1024-76
}
else if (MODE_1024x0768x75HZ == m)
{
if (0 == (bVpole_Curr | bHpole_Curr)) m = MODE_1024x0768x74HZ; // MAC768-75
}
else if (MODE_0640x0480x60HZ == m && bVpole_Curr != bHpole_Curr)
{
// MODE_VGA350x60Hz : 640x350 60Hz
// MODE_VGA350x60Hz | 0x40 : 720x350 60Hz
// MODE_VGA400x60Hz : 640x400 60Hz
// MODE_VGA400x60Hz | 0x40 : 720x400 60Hz
if (bHpole_Curr)
m = Data[0] ? MODE_VGA350x60Hz : MODE_VGA350x60Hz | 0x40;
else
m = (stGUD1.INPUT_SOURCE & 0x80) ? MODE_VGA400x60Hz : MODE_VGA400x60Hz | 0x40;
}
else if (MODE_0640x0480x50HZ == m && bVpole_Curr != bHpole_Curr)
{
// MODE_VGA350x50Hz : 640x350 50Hz
// MODE_VGA350x50Hz | 0x40 : 720x350 50Hz
// MODE_VGA400x50Hz : 640x400 50Hz
// MODE_VGA400x50Hz | 0x40 : 720x400 50Hz
if (bHpole_Curr)
m = Data[0] ? MODE_VGA350x50Hz : MODE_VGA350x50Hz | 0x40;
else
m = (stGUD1.INPUT_SOURCE & 0x80) ? MODE_VGA400x50Hz : MODE_VGA400x50Hz | 0x40;
}
else if (MODE_0720x0400x85HZ == m)
{
if (1 == bHpole_Curr && 0 == bVpole_Curr)
m = MODE_0640x0350x85HZ;
else if (stGUD1.INPUT_SOURCE & 0x80)
m = MODE_0640x0400x85HZ;
}
else if (MODE_0720x0400x70HZ == m)
{
if (1 == bHpole_Curr && 0 == bVpole_Curr)
m = Data[0] ? MODE_0640x0350x70HZ : MODE_0720x0350x70HZ;
else if (stGUD1.INPUT_SOURCE & 0x80)
m = MODE_0640x0400x70HZ;
}
ucMode_Temp = m;
}
}
}
while ((0 != --m) && (MODE_NOSUPPORT == ucMode_Temp));
// Search for User Mode
if (MODE_NOSUPPORT == ucMode_Temp)
{
usIPV_ACT_LEN = 0;
#if(DISP_SIZE <= DISP_1024x768) //V225
m = MODE_USER1024x768;
#endif
#if(DISP_SIZE == DISP_1280x1024)
m = MODE_USER1280x1024;
#endif
#if(DISP_SIZE > DISP_1280x1024)
m = MODE_USER1600x1200;
#endif
do
{
if ((usVsync >= VGA_Mode[m][2]) && (usVsync <= VGA_Mode[m][3]))
{
usIPV_ACT_LEN = CAP_WIN[m][4];
if ((usHsync >= VGA_Mode[m][0]) && (usHsync <= VGA_Mode[m][1]))
{
ucMode_Temp = m; // Support User Mode
}
}
}
while ((MODE_USER720x400 <= --m) && (MODE_NOSUPPORT == ucMode_Temp));
}
if (48 > ucRefresh || MAX_RATE < ucRefresh)
{
ucMode_Temp = MODE_NOSUPPORT; // We don't support vertical refresh rate lower than 50Hz
}
else if (MODE_NOSUPPORT == ucMode_Temp && 0 != usIPV_ACT_LEN)
{
if (DISP_LEN < usIPV_ACT_LEN) // V Scale-down
{
// Estimate display clock rate for full screen
// DCLK = (24.576MHz / usHsync) * DCLK per display line * (display image lines / input image lines)
((unsigned int *)Data)[0] = (unsigned long)2458 * Mode_Preset[MODE_UNDEFINED1][0] * DISP_LEN
/ ((unsigned long)100 * usIPV_ACT_LEN * usHsync);
if (MAX_DCLK < ((unsigned int *)Data)[0])
{
// If clock rate for full-screen display is too high, we can try partial-V display.
// Estimate clock for partial-V display
// DCLK = (24.576MHz / usHsync) * DCLK per display line * (min. display total lines / input total lines)
((unsigned int *)Data)[1] = (unsigned long)2458 * Mode_Preset[MODE_UNDEFINED1][0] * MIN_DV_TOTAL
/ ((unsigned long)100 * (usVsync - 1) * usHsync);
if (MAX_DCLK < ((unsigned int *)Data)[1])
{
// Decrease usIPV_ACT_LEN to DISP_LEN and go further to check if it can be displayed.
usIPV_ACT_LEN = DISP_LEN;
}
else
{
ucMode_Temp = MODE_UNDEFINED1 | 0x80; // Scale-down and partial-V display
}
}
else
ucMode_Temp = MODE_UNDEFINED1; // Scale-down and full-V display
}
if (DISP_LEN >= usIPV_ACT_LEN) // V Scale-up
{
((unsigned int *)Data)[0] = (unsigned long)2458 * Mode_Preset[MODE_UNDEFINED0][0] * DISP_LEN
/ ((unsigned long)100 * usIPV_ACT_LEN * usHsync);
if (MAX_DCLK < ((unsigned int *)Data)[0])
{
if (MIN_DV_TOTAL >= (usVsync - 1))
{
((unsigned int *)Data)[1] = (unsigned long)2458 * Mode_Preset[MODE_UNDEFINED0][0] * MIN_DV_TOTAL
/ ((unsigned long)100 * (usVsync - 1) * usHsync);
}
else
{
((unsigned int *)Data)[1] = (unsigned long)2458 * Mode_Preset[MODE_UNDEFINED0][0]
/ ((unsigned long)100 * usHsync);
}
if (MAX_DCLK < ((unsigned int *)Data)[1])
ucMode_Temp = MODE_NOSUPPORT; // Cannot display
else
ucMode_Temp = MODE_UNDEFINED0 | 0x80; // Scale-up and partial-V display
}
else
ucMode_Temp = MODE_UNDEFINED0; // Scale-up and full-V display
}
}
}
}
}
if (SYNC_SOG == ucSync_Type && 0 != (usHS_Pulse * 7 / usHsync))
{
// To prevent from SOG mode mistake
// HSYNC pulse width will never longer than 1/7*HSYNC period
ucMode_Temp = MODE_NOSIGNAL;
}
//-------------Check result--------------
if (MODE_NOSUPPORT == ucMode_Temp || MODE_NOSIGNAL == ucMode_Temp)
{
// Treat illegal signal as no signal when SOG
if (SYNC_SOG == ucSync_Type) ucMode_Temp = MODE_NOSIGNAL;
if (MODE_NOSUPPORT != ucMode_Found && MODE_NOSIGNAL != ucMode_Found) ucMode_Times = 0;
ucMode_Found = ucMode_Temp;
LED_GREEN = 0X00;
LED_RED = 0X00;
if (NO_MODE_TIMES > ucMode_Times)
{
// Wait for signal stable
ucMode_Times ++;
}
else
{
bStable = (ucMode_Curr == ucMode_Found) ? 1 : 0; // bStable must be cleared when mode changed
ucMode_Curr = ucMode_Found;
ucMode_Times = NO_MODE_TIMES - 2;
if (MODE_NOSIGNAL == ucMode_Curr)
{
if (SYNC_CS == ucSync_Type) // CS->SS
{
RTDCodeW(VGA_SET_SS);
bVpole_Curr = 1;
bHpole_Curr = 1;
ucSync_Type = SYNC_SS;
}
else if (SYNC_SS == ucSync_Type) // SS->SOG
{
RTDCodeW(VGA_SET_SOG);
bVpole_Curr = 1;
bHpole_Curr = 1;
ucSync_Type = SYNC_SOG;
}
else // SOG->CS
{
RTDCodeW(VGA_SET_CS);
bVpole_Curr = 1;
bHpole_Curr = 1;
ucSync_Type = SYNC_CS;
}
}
}
}
else
{
if (ucMode_Found != ucMode_Temp)
{
ucMode_Times = 1;
ucMode_Found = ucMode_Temp;
// To prevent from mistaking CS (with VS) for SS, we check SYNC type once when finding a mode in SS.
if (SYNC_SS == ucSync_Type)
{
RTDSetByte(SYNC_CTRL_4B, 0x55);
RTDSetByte(SYNC_POR_4C, 0x22);
m = (MODE_DETECT_FREQ + 1) * 20;
do
{
Delay_Xms(1);
RTDRead(SYNC_POR_4C, 0x05, Y_INC);
}
while ((Data[0] & 0x02) && (--m));
Data[5] = Data[3];
Data[4] = Data[4] & 0x87;
Data[3] = Data[1];
Data[2] = Data[2] & 0x8f;
if ((0 == ((unsigned int *)Data)[1]) || (0x07ff <= ((unsigned int *)Data)[1]) ||
(0 == ((unsigned int *)Data)[2]) || (0x07ff <= ((unsigned int *)Data)[2]) ||
(0 == m))
{
ucSync_Type = SYNC_SS;
RTDSetByte(SYNC_CTRL_4B, 0x14);
}
else
{
ucSync_Type = SYNC_CS;
RTDCodeW(VGA_SET_CS);
bVpole_Curr = 1;
bHpole_Curr = 1;
}
}
else if (SYNC_SOG == ucSync_Type)
{
RTDSetByte(SYNC_CTRL_4B, 0x14);
Delay_Xms(8);
RTDSetByte(SYNC_POR_4C, 0x00);
RTDSetByte(SYNC_POR_4C, 0x02);
m = (MODE_DETECT_FREQ + 1) * 20;
do
{
Delay_Xms(1);
RTDRead(SYNC_POR_4C, 0x05, Y_INC);
}
while ((Data[0] & 0x02) && (--m));
Data[5] = Data[3];
Data[4] = Data[4] & 0x87;
Data[3] = Data[1];
Data[2] = Data[2] & 0x8f;
if ((0 == ((unsigned int *)Data)[1]) || (0x07ff <= ((unsigned int *)Data)[1]) ||
(0 == ((unsigned int *)Data)[2]) || (0x07ff <= ((unsigned int *)Data)[2]) ||
(0 == m))
{
ucSync_Type = SYNC_SOG;
RTDSetByte(SYNC_CTRL_4B, 0x57);
Delay_Xms(8);
RTDSetByte(SYNC_POR_4C, 0x00);
}
else
{
ucSync_Type = SYNC_SS;
RTDCodeW(VGA_SET_SS);
bVpole_Curr = 1;
bHpole_Curr = 1;
}
}
}
else
{
if (VGA_SEARCH_TIMES > ucMode_Times)
{
ucMode_Times ++;
}
else
{
bLIGHT_PWR = LIGHT_OFF; // Turn off BackLight for reset display
RTDSetByte(HOSTCTRL_02, 0x40); // Wake RTD up
RTDCodeW(OSD_Reset); // Clear OSD
ucMode_Curr = ucMode_Found; // Supported mode found
ucMode_Times = 0; // Reset mode timer
bStable = 0; // bStable must be cleared when mode changed
Display_VGA_Set(); // Set VGA Mode registers
#if (RTDDEBUG)
if (ucMode_PrevAct == ucMode_Curr)
{
if (0xff > ucMode_QuitCnt) ucMode_QuitCnt += 1;
}
else
{
ucMode_PrevAct = ucMode_Curr;
ucMode_QuitCnt = 0;
ucDebug = 0;
}
#endif
}
}
}
}
//------------------- Check VGA Mode -------------------//
void Check_VGA_Mode(void)
{
RTDRead(SYNC_POR_4C, 0x05, Y_INC);
if (Data[0] & 0x02)
{
RTDSetByte(SYNC_POR_4C, 0x20); // Input signal time-out. Reset sync-processor
ucMode_Found = MODE_NOSUPPORT;
}
else
{
bVpole_Curr = (bit)(Data[0] & 0x08); // Current usVsync polarity
bHpole_Curr = (bit)(Data[0] & 0x04); // Current usHsync polarity
Data[5] = Data[3];
Data[4] = Data[4] & 0x87;
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