📄 lcd_main.c
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#if (SWAP_RED_BLUE)
RTDSetBit(OVL_CTRL_6D, 0x3f, (stGUD1.FUNCTION & 0x10) ? 0x90 : 0x10);
#else
RTDSetBit(OVL_CTRL_6D, 0x3f, (stGUD1.FUNCTION & 0x10) ? 0x80 : 0x00);
#endif
#if (SPREAD_SPECTRUM)
RTDSetBit(DPLL_CTRL_D0, 0x01, 0x08);
RTDRead(DPLL_M_D1, 0x01, Y_INC);
if (0xd2 < Data[0])
Data[1] = 0x09;
else if (0x8d < Data[0])
Data[1] = 0x0a;
else if (0x6d < Data[0])
Data[1] = 0x0b;
else if (0x57 < Data[0])
Data[1] = 0x0c;
else if (0x47 < Data[0])
Data[1] = 0x0d;
else if (0x37 < Data[0])
Data[1] = 0x0e;
else
Data[1] = 0x0f;
RTDSetByte(DPLL_FILTER_D3, Data[1]);
RTDSetByte(DPLL_SSP_D4, 0xf7);
#endif
Init_Input_Source(); // Initial Mode & OSD
}
void Reset_RTD(void)
{
bRTD_RST = 0;
Delay_Xms(10);
do
{
// Wait for reset complete
bRTD_RST = 1;
Delay_Xms(6);
}
while (!bRTD_RST);
// Initial RTD3000 & free background display
RTDCodeW(RTD_PWUP_INI);
RTDCodeW(RTD_DDC_TABLE);
RTDCodeW(RTD_IO_INI);
RTDSetByte(HOSTCTRL_02, 0x40); // Wake RTD up
RTDCodeW(FreeV);
RTDSetByte(VDIS_SIGINV_21, 0x00); // DHS, DVS, DEN, DCLK MUST NOT be inverted.
RTDSetBit(VDIS_CTRL_20, 0xfd, 0x01); // DHS, DVS, DEN, DCLK and data are clamped to 0
// Initial RTD3000-OSD
RTDCodeW(OSD_PWUP_INI);
RTDCodeW(OSD_Reset);
// Initial OSD palette
RTDCodeW(Palette_Open);
RTDCodeW(Palette_7);
RTDCodeW(Palette_Close);
Set_Gamma();
Set_Dithering();
Set_Bright_Contrast();
}
#if(INPUTSOURCE == VIDEO_ONLY)
void Init_Input_Source(void)
{
ucMode_Found = MODE_NOSUPPORT;
ucMode_Curr = MODE_NOSIGNAL;
ucMode_Times = 0;
ucAV_Mode = 0;
bVpole_Curr = 1; // The initial set of polarity is positive
bHpole_Curr = 1; // The initial set of polarity is positive
stGUD1.INPUT_SOURCE = (stGUD1.INPUT_SOURCE & 0xf8) | SOURCE_AV;
PowerDown_ADC();
PowerUp_VDC();
Delay_Xms(10);
#if (VIDEO_CHIP == TW_9905 )
I2CWrite_TW990X(0x03,0x82);
I2CWrite_TW990X(0x08,0x12);
I2CWrite_TW990X(0x09,0xf4);
I2CWrite_TW990X(0x0b,0xd0);
I2CWrite_TW990X(0x19,0x58);
I2CWrite_TW990X(0x55,0x00);
#endif
#if (VIDEO_CHIP == VDC_SAA7114 || VIDEO_CHIP == VDC_SAA7115 )
I2CWrite(V_ENABLE); // VIDEO ENABLE
I2CWrite(VIDEO_ALL);
I2CWrite(AV_DETECT); // VIDEO Detect(AV)
I2CRead(ADDR_VIDEO, 0x1f, 0x01);
#endif
ucInputSrc = SOURCE_AV;
RTDCodeW(VIDEO_INI);
LoadVDC_Color();
}
#else
void Init_Input_Source(void)
{
ucMode_Found = MODE_NOSUPPORT;
ucMode_Curr = MODE_NOSIGNAL;
ucMode_Times = 0;
ucAV_Mode = 0;
bVpole_Curr = 1; // The initial set of polarity is positive
bHpole_Curr = 1; // The initial set of polarity is positive
bTVFlag = 0;
bTUNER_PD = 1;
// Unknown signal source
if (SOURCE_MAX < (stGUD1.INPUT_SOURCE & 0x07))
stGUD1.INPUT_SOURCE = (stGUD1.INPUT_SOURCE & 0xf8) | SOURCE_VGA;
#if (VIDEO_CHIP == VDC_NONE)
if (SOURCE_AV == (stGUD1.INPUT_SOURCE & 0x07) || SOURCE_SV == (stGUD1.INPUT_SOURCE & 0x07))
stGUD1.INPUT_SOURCE = (stGUD1.INPUT_SOURCE & 0xf8) | SOURCE_VGA;
#endif
#if (TV_CHIP == TV_NONE)
if (SOURCE_TV == (stGUD1.INPUT_SOURCE & 0x07))
stGUD1.INPUT_SOURCE = (stGUD1.INPUT_SOURCE & 0xf8) | SOURCE_VGA;
#endif
// Because internal ADC power state will not affect VGA mode detection,
// we always turn off ADC when source changed, and turn it on again only
// when a valid VGA mode is going to display.
PowerDown_ADC();
switch (stGUD1.INPUT_SOURCE & 0x07)
{
case SOURCE_VGA:
#if (VIDEO_CHIP == TW_9905 )
PowerDown_VDC();
#endif
#if (VIDEO_CHIP == VDC_SAA7114 || VIDEO_CHIP == VDC_SAA7115 )
I2CWrite(V_DISABLE); // VIDEO DISABLE
I2CWrite(V_NOWORK); // VIDEO No Work
PowerDown_VDC();
#endif
// Set user's ADC gain and offset settings
SetADC_GainOffset();
ucInputSrc = SOURCE_VGA;
ucSync_Type = SYNC_SS;
RTDCodeW(VGA_INI_SS);
break;
case SOURCE_AV:
#if (VIDEO_CHIP == TW_9905 )
PowerUp_VDC();
Delay_Xms(10);
Reset_TW9905();
Delay_Xms(10);
I2CWrite_TW990X(0x03,0x82);
I2CWrite_TW990X(0x08,0x12);
I2CWrite_TW990X(0x09,0xf4);
I2CWrite_TW990X(0x0b,0xd0);
I2CWrite_TW990X(0x19,0x58);
I2CWrite_TW990X(0x55,0x10);
Delay_Xms(10);
I2CWrite_TW990X(0x02,0x40);//0100 0000 for AV
Delay_Xms(10);
ucInputSrc = SOURCE_AV;
RTDCodeW(VIDEO_INI);
#endif
#if (VIDEO_CHIP == VDC_SAA7114 || VIDEO_CHIP == VDC_SAA7115 )
PowerUp_VDC();
Delay_Xms(10);
I2CWrite(V_ENABLE); // VIDEO ENABLE
I2CWrite(VIDEO_ALL);
I2CWrite(AV_DETECT); // VIDEO Detect(AV)
ucInputSrc = SOURCE_AV;
RTDCodeW(VIDEO_INI);
I2CRead(ADDR_VIDEO, 0x1f, 0x01);
#endif
LoadVDC_Color();
break;
case SOURCE_TV:
bTVFlag = 1;
#if (VIDEO_CHIP == TW_9905 )
PowerUp_VDC();
Delay_Xms(10);
bTUNER_PD = 0;
Reset_TW9905();
Delay_Xms(10);
I2CWrite_TW990X(0x03,0x82);
I2CWrite_TW990X(0x08,0x12);
I2CWrite_TW990X(0x09,0xf4);
I2CWrite_TW990X(0x0b,0xd0);
I2CWrite_TW990X(0x19,0x58);
I2CWrite_TW990X(0x55,0x10);
I2CWrite_TW990X(0x1c,0x07);
Delay_Xms(10);
I2CWrite_TW990X(0x02,0x48);//0100 1000 for TV
Delay_Xms(10);
ucInputSrc = SOURCE_TV;
#if (TV_CHIP != TV_NONE)
Set_TV_Channel(1);
#endif
RTDCodeW(VIDEO_INI);
#endif
#if (VIDEO_CHIP == VDC_SAA7114 || VIDEO_CHIP == VDC_SAA7115 )
PowerUp_VDC();
Delay_Xms(10);
I2CWrite(V_ENABLE); // VIDEO ENABLE
I2CWrite(VIDEO_ALL);
I2CWrite(AV_DETECT); // VIDEO Detect(AV)
ucInputSrc = SOURCE_TV;
#if (TV_CHIP != TV_NONE)
Set_TV_Channel(1);
#endif
I2CWrite(TV_SOURCE_SEL);
I2CWrite(TV_SCAN_GAIN);
RTDCodeW(VIDEO_INI);
I2CRead(ADDR_VIDEO, 0x1f, 0x01);
#endif
LoadVDC_Color();
break;
case SOURCE_SV:
#if (VIDEO_CHIP == TW_9905 )
PowerUp_VDC();
Delay_Xms(10);
Reset_TW9905();
Delay_Xms(10);
I2CWrite_TW990X(0x03,0x82);
I2CWrite_TW990X(0x08,0x12);
I2CWrite_TW990X(0x09,0xf4);
I2CWrite_TW990X(0x0b,0xd0);
I2CWrite_TW990X(0x19,0x58);
I2CWrite_TW990X(0x55,0x10);
Delay_Xms(10);
I2CWrite_TW990X(0x02,0x54);//0101 0100 for SV
ucInputSrc = SOURCE_SV;
RTDCodeW(VIDEO_INI);
#endif
#if (VIDEO_CHIP == VDC_SAA7114 || VIDEO_CHIP == VDC_SAA7115 )
PowerUp_VDC();
Delay_Xms(10);
I2CWrite(V_ENABLE); // VIDEO ENABLE
I2CWrite(VIDEO_ALL);
I2CWrite(SV_DETECT); // VIDEO Detect(SV)
ucInputSrc = SOURCE_SV;
RTDCodeW(VIDEO_INI);
I2CRead(ADDR_VIDEO, 0x1f, 0x01);
#endif
LoadVDC_Color();
break;
case SOURCE_YUV:
PowerUp_VDC();
Delay_Xms(10);
I2CWrite(V_ENABLE); // VIDEO ENABLE
I2CWrite(VIDEO_ALL);
I2CWrite(VIDEO_YUV);
I2CWrite(YUV_DETECT); // VIDEO Detect(YUV)
ucInputSrc = SOURCE_YUV;
RTDCodeW(VIDEO_INI);
// I2CRead(ADDR_VIDEO, 0x1f, 0x01);
break;
}
#if (AUDIO_TYPE != AUDIO_NONE)
SetVolume();
#endif
}
#endif
void Free_Background(void) // Force to FreeRun & Background
{
RTDCodeW(FreeV); // Switch to free-running mode
if (PANEL_OFF == bPANEL_PWR)
{
RTDSetByte(VDIS_SIGINV_21, 0x00); // DHS, DVS, DEN, DCLK MUST NOT be inverted.
RTDSetBit(VDIS_CTRL_20, 0xfd, 0x01); // DHS, DVS, DEN, DCLK and data are clamped to 0
}
RTDSetBit(VGIP_CTRL_04, 0xfe, 0x00); // Stop sampling input pixels
// Blue background when input source is TV signal.
RTDSetBit(VDIS_SIGINV_21, 0x0f, SOURCE_TV == (stGUD1.INPUT_SOURCE & 0x07) ? 0x10 : 0x00);
}
/////////////////////////////////////////////////////////
//------------------- Mode Detector -----------------//
/////////////////////////////////////////////////////////
void Mode_Detector(void)
{
switch (stGUD1.INPUT_SOURCE & 0x07)
{
case SOURCE_VGA :
// Save previous values of ucMode_Curr, bHpole_Curr and bVpole_Curr
bHpole_Prev = bHpole_Curr;
bVpole_Prev = bVpole_Curr;
if ((MODE_NOSIGNAL == ucMode_Curr) || (MODE_NOSUPPORT == ucMode_Curr))
Detect_VGA_Mode();
else
Check_VGA_Mode();
break;
#if(TV_CHIP != TV_NONE)
case SOURCE_TV :
if ((MODE_NOSIGNAL == ucMode_Curr) || (MODE_NOSUPPORT == ucMode_Curr))
Detect_TV_Mode(); // Set default polarity
else
Check_TV_Mode(); // Set polarity after measure
break;
#endif
default :
if ((MODE_NOSIGNAL == ucMode_Curr) || (MODE_NOSUPPORT == ucMode_Curr))
Detect_Video_Mode(); // Set default polarity
else
Check_Video_Mode(); // Set polarity after measure
break;
}
Measure_Mode(); // Measure mode-timing
}
void Measure_Mode(void)
{
switch (stGUD1.INPUT_SOURCE & 0x07)
{
case SOURCE_VGA :
RTDSetByte(SYNC_POR_4C, (SYNC_SS == ucSync_Type) ? 0x02 : 0x32);
break;
default :
RTDSetByte(SYNC_POR_4C, 0x02);
break;
}
}
/////////////////////////////////////////////////////////
//------------------ Detect VGA Mode ----------------//
/////////////////////////////////////////////////////////
void Detect_VGA_Mode(void)
{
unsigned char ucMode_Temp, m;
unsigned int usHS_Pulse;
RTDRead(SYNC_POR_4C, 0x09, Y_INC);
if (Data[0] & 0x02)
{
// Reset Sync Processor when sync signal timeout
RTDSetByte(SYNC_POR_4C, 0x20);
// Treat sync signal timeout as no signal
ucMode_Temp = MODE_NOSIGNAL;
}
else
{
ucMode_Temp = (Data[8] & 0xe0 ) >> 5;
if(ucMode_Temp == 0 || ucMode_Temp >=4) //Test which edge of Hsync to latch Vsync will be safe
RTDSetBit(MEAS_VS_HI_54,0xf7,0x08); //Use positive edge of Hsync to latch Vsync
else
RTDSetBit(MEAS_VS_HI_54,0xf7,0x00); //Use negtive edge of Hsync to latch Vsync
usStdHS = usHsync; // Save previous usHsync in usStdHS
usStdVS = usVsync; // Save previous usVsync in usStdVS
bVpole_Curr = (bit)(Data[0] & 0x08); // Save current usVsync polarity
bHpole_Curr = (bit)(Data[0] & 0x04); // Save current usHsync polarity
Data[7] = Data[5];
Data[6] = Data[6] & 0x0f;
Data[5] = Data[3];
Data[4] = Data[4] & 0x87;
Data[3] = Data[1];
Data[2] = Data[2] & 0x8f;
usHsync = ((unsigned int *)Data)[1]; // Current HSYNC timing
usVsync = ((unsigned int *)Data)[2]; // Current VSYNC timing
usHS_Pulse = ((unsigned int *)Data)[3]; // Current HSYNC pulse width
// Calculate Vertical Refresh Rate
// Original Formula :
// ucRefresh = 24.576M / (usHsync * usVsync)
// Use Data[0~3] as a temporary long variable
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