tlv2548ss.asm

TLV2544/48 Interface routine

*=============================================================================*
*All software and related documentation is provided "AS IS" and without 		*
*warranty or support of any kind and Texas Instruments expressly disclaims 	*
*all other warranties,express or implied, including, but not limited to, the  *
*implied warranties of merchantability and fitness for a particular purpose.  *
*Under no circumstances shall Texas Instruments be liable for any incidental, *
*special or consequential damages that result from the use or inability to 	*
*use the software or related documentation, even if Texas Instruments has 	   *
*been advised of the liability.															   *
*																									   *
*Unless otherwise stated, software written and copyrighted by Texas 			   *
*Instruments is distributed as "freeware". You may use and modify this 		   *
*software without any charge or restriction. You may distribute to others,	   *
*as long as the original author is acknowledged.										*
*=============================================================================*

**************************************************************************
* TITLE         : TLV2544/48 Interface routine                            *
* FILE          : tlv2544ss.ASM                                             *
* FUNCTION      : MAIN                                                    *
* PROTOTYPE     : void MAIN ()                                           *
* CALLS         : N/A                                                    *
* DESCRIPTION   : 														 *	
*This program to be used for single shot conversion mode.   The program  *
*expects the calling program to store the configuration word in			 *
*Config_Command, the channel Conversion Command in _Conv_Command,        *
*The code starts off by programming the DSP, CPLD, McBSP0, and then the  *
*TLV2548 analog-to-digital converter.   Since a McBSP transmit operation *
* generates the FSR used to read data into receiver.   The               *
*                                                                        *
* AUTHOR        : AAP Application Group, L. Philipose, Dallas, Tx	     *
*                 CREATED 2000(C) BY TEXAS INSTRUMENTS INCORPORATED.     *
* REFERENCE     : TMS320C54x User's Guide, TI 1997                       *
*               : Data Aquisation Circuits, TI 1999                      *
**************************************************************************

 
         .title   "TLV2544/48 ADC"
         .mmregs
         .width   80
         .length  55 
         		         
    .sect ".vectors"
    .copy "C5402vec.asm"   
                                     
    .sect ".data"
	.include	regs.h
   
*Global Variables*
 	.global _SingleShotMode 
 	.global _CLKGDV
	.global _StoreAt
 	.global _Config_Command
 	.global _Conv_Command
 	

**Local and Global variables defined**
AD_DP       	.usect ".varibl", 0 	;Data page label for variables.
ADWORD      	.usect ".varibl", 1 	;Store Sample 
Temp      		.usect ".varibl", 1 	;control word for the ADC	
EndOfTable    	.usect ".varibl", 1 	;End of Table
_CLKGDV  	    .usect ".varibl", 1  	;Variable used to set CLKX/R on McBSP0
_StoreAt	    .usect ".varibl", 1  	;Address to begin Storing Samples
_Config_Command .usect ".varibl", 1  	;Configuration Word
_Conv_Command	.usect ".varibl", 1  	;Command word to ADC




    .sect ".text" 

_SingleShotMode:

***Intialize DSP***

	DP=#0;					;Memory Mapped Registers in Data Page 0
	CLKMD = #4007h			;Set c5402 DSP clock to 100MHz.
    
    INTM=#1					;Disable maskable interrupts. 
	SXM=#0    			   	;No Sign Extension
	CPL=0					;DP used for relative addressing
	PMST = #00F8h   		;Re-map Interrupt Vector Table to 0x0080h in Program Memory
 	IMR  = #0104h    		;Enabled Interrupt #3     	
	IFR  = #0FFFFh   		;Clear all Pending Interrupts	
	
	SWWSR = #2000h      	;Need Wait-State of at least 2.                      
	
	DP=#ADWORD				;Change Data Page to where Variables are stored.
	@Temp=#0088h			;Enable INT3 From Daugthercard.
    port(DSP_CPLD_CNTL1) =@Temp 		;
    
    @Temp=#0001h
	port(DSP_CPLD_CNTL2) =@Temp  		;Select daughter board as source for McBSP0

	XF = 1								;Set ADC Chip Select High
    
    call McBSP0_init					;Set McBSP0 registers

	INTM=#0								;enable global interrupts
   
   	DP=#AD_DP							;
	XF = 0								;SET CSz. ADC Chip Select is held low throughout this program.
	
	A=@_StoreAt
	AR7=A							   	;Address to store Samples at.
	


*Configure the ADC *					;Transmit Word Store in Accum. A.  Receive Word Stored in Accum. B
	A=#0A080h							;Configuration Word, Choose external SCLK, and Single shot mode.
	call ADC_Write_Read					;Write and Read from McBSP0.  Write the Configuration Data to 
										;ADC, and read out receiver data register.  Receiver data is stored 
										;in Accumulator B.  In this case we don't care what was received.
  
*Select channel and begin conversion cycle* 

	A=#3000h							;Select Channel 3 to sample and convert
	call ADC_Write_Read					;Write it to McBSP0.  Data received is invalid.
  	
										;DSP sits in idle mode until ADC generates an Interrupt.
  	idle (1)							;Once INT3# occurs, the DSP will power-up and launch ISR_int03.
    									;When complete, the DSP will sit idle once agian waiting for next.  
    									;interrupt.
	RETURN								;Return to C calling function


 
**Interrupt #3 Service Routine **                
ISR_int03: 									;This ISR is loaded into Program Counter after Interrupt 3 occurs.
													
   DP  = #AD_DP						   ;Set Data Page
 	A=#3000h 								;Generate Frame-Sync by providing a dummy write.  This dummy write selects 
  	call ADC_Write_Read					;Channel #3, as the next channel to sample and convert from.
	
	@ADWORD=B									;Store converted data in this variable temporarily

	*AR7+     = data(@ADWORD)     		;Store Sample at Memory Location pointed to by AR7, then increment AR7.
  
Quit:

    return_enable   
    
**Function Configures McBSP0**          
 
McBSP0_init:	
    
	
	mmr(McBSP0_SPSA) = #SPCR1       	;Reset McBSP0 Receiver 
	A=mmr(McBSP0_SPSD)	           	;
	A = #0FFFEh & A  					  	;RRST*=0
	mmr(McBSP0_SPSD) =A
	
	repeat(#5)
    NOP       
    
	mmr(McBSP0_SPSA) = #SPCR2       ;Reset McBSP0 Receiver  
	A=mmr(McBSP0_SPSD)				
	A= A & #0FF7Fh					;FRST*=0
	A= A & #0FFBFh                  ;GRST*=0
	A= A & #0FFFEh                  ;XRST*=0	
	
	A=A|#0200h						;enable free running mode
	mmr(McBSP0_SPSD) = A  			;			
	
    repeat(#5)
    NOP       
		
	mmr(McBSP0_SPSA) = #PCR         ;FSXM & CLKXM output pin driven 
	mmr(McBSP0_SPSD) = #0A00h       ;by Sample Rate Generator
									;FSRM & CLKRM input pins
									;driven by external source
	
	repeat(#6)
    NOP       	
	
	mmr(McBSP0_SPSA) = #RCR1        ;
	mmr(McBSP0_SPSD) = #0040h       ;One 16-bit Word per frame  
	
	repeat(#6)
    NOP       	

	mmr(McBSP0_SPSA) = #RCR2        ;One 16-bit Word per frame
	mmr(McBSP0_SPSD) = #0041h       ;one bit receive bit data delay 
	
	repeat(#6)
    NOP       	
									
	mmr(McBSP0_SPSA) = #XCR1        
	mmr(McBSP0_SPSD) = #0040h       ;One 16-bit Word per frame   

	repeat(#6)
    NOP       	

	mmr(McBSP0_SPSA) = #XCR2        ;One 16-bit Word per frame
	mmr(McBSP0_SPSD) = #0041h       ;one bit receive bit data delay 
		
	repeat(#6)
    NOP       	

	mmr(McBSP0_SPSA) = #SRGR1       ;FS width=one clock 
	A=#0;
	A= #0100h | A              		;
	B=@_CLKGDV					
	A=A|B
	mmr(McBSP0_SPSD) = A       		;SRG clock divider=9 (CPU Clock /1+CLKGDC)=10Mhz
	
	repeat(#6)
    NOP       	
    
	mmr(McBSP0_SPSA) = #SRGR2       ;SRG lcok derived from CPU clock 
	mmr(McBSP0_SPSD) = #2000h       ;FSX due to transfer DXR->XSR
	
	repeat(#6)
    NOP       	
   
	mmr(McBSP0_SPSA) = #SPCR2       ;  
	A=mmr(McBSP0_SPSD) 
	A= A | #0040h                   ;GRST*=1

    mmr(McBSP0_SPSD)  = A      		;Frame Generator and sample
			    					;sample-rate generator enabled	
    repeat(#6)
    NOP       
	
	A= A | #0001h                   ;XRST*=1	 
    mmr(McBSP0_SPSD)  = A      		;Transmitter enabled
    
    repeat(#6)
    NOP       
    
    mmr(McBSP0_SPSA) = #SPCR1   	; RRST*=1
	A= mmr(McBSP0_SPSD) 
	A= A | #0001h
	mmr(McBSP0_SPSD) = A			;Reciever enabled
	
	repeat(#6)
    NOP  
    
	RETURN	

**Function Write to Transmitter and Read from Receiver of McBSP0**
**Data to be written out must be stored in Accum. A, 				 **
**Data received in stored in Accumulator B							 **

ADC_Write_Read:						;input in A
	PUSH (AR2)						;Save Registers
	PUSH (AR1)
	PUSH (AR0)
Wait_On_Transmitter:   
	DP=#0
	mmr(McBSP0_SPSA) = #SPCR2       ;Check to see if tranmitter is ready to send 
	B=mmr(McBSP0_SPSD)        		;new data.
	
	B=B & #0002h;
	AR1=B
   	nop
	nop
	AR0=#2
	nop
	nop
	TC      = (AR0 == AR1)      
    if (NTC) goto Wait_On_Transmitter ;If transmitter is full wait until it is not.
	AR2=#McBSP0_DXR1
	nop
   *AR2 = A							;Send out to ADC
 
Wait_On_Receiver:
	DP=#0
	mmr(McBSP0_SPSA) = #SPCR1       ; 
	B=mmr(McBSP0_SPSD)         		;Check to see if Receiver is FULL with Data
	AR0=#2
	B=B & #0002h;
	AR1=B
	nop
	nop

	TC = (AR0 == AR1)      
   if (NTC) goto Wait_On_Receiver  ;If receiver is not ready with new data, then wait.
  	DP=#AD_DP		
	AR2=#McBSP0_DRR1 
	NOP
   B=*AR2 							;Read out ADC   
   AR0 =POP()
   AR1 =POP()
   AR2 =POP()
	RETURN


.end