adc_8bits.a51

透過a51的程式

$INCLUDE   (t89c51cc01.INC)
value_converted DATA 10H;     /* converted value */
value_AN6 DATA 11H;           /* converted AN6 value */
value_AN7 DATA 12H;           /* converted AN7 value */
end_of_convertion BIT 20H;    /* software flag */

org 000h
ljmp begin

org 43h
ljmp adc_it

;/**
; * FUNCTION_PURPOSE:this function setup Adc with channel 6 and 7 and start 
; * 8bits convertion.
; * FUNCTION_INPUTS:void
; * FUNCTION_OUTPUTS:void
; */
org 0100h
begin:

/* configure channel P1.6(AN6) and P1.7(AN7) for ADC */
MOV ADCF,#0C0h;                  

/* init prescaler for adc clock */
/* Fadc = Fperiph/(2*(32-PRS)), PRS -> ADCLK[4:0] */
MOV ADCLK,#06h;                  /* Fosc = 16 MHz, Fadsc = 153.8khz */

MOV ADCON,#20h;                  /* Enable the ADC */


SETB EA;                         /* enable interrupts */
SETB EADC;                       /* enable ADC interrupt */
loop:

   ANL ADCON,#~07h;              /* Clear the channel field ADCON[2:0] */
   ORL ADCON, #06h;              /* Select channel 6 */
   ANL ADCON,#~40h;              /* standard mode */
   ORL ADCON, #08h;              /* Start conversion */

   JNB end_of_convertion,$;      /* wait end of convertion */
   CLR end_of_convertion;        /* clear software flag */
   MOV value_AN6,value_converted;/* save converted value */


   ANL ADCON,#~07h;              /* Clear the channel field ADCON[2:0] */
   ORL ADCON, #07h;              /* Select channel 7 */
   ANL ADCON,#~40h;              /* standard mode */
   ORL ADCON, #08h;              /* Start conversion */

   JNB end_of_convertion,$;      /* wait end of convertion */
   CLR end_of_convertion;        /* clear software flag */
   MOV value_AN7,value_converted;/* save converted value */

JMP loop

;/**
; * FUNCTION_PURPOSE:Adc interrupt, save ADDH into an unsigned char
; * FUNCTION_INPUTS:void
; * FUNCTION_OUTPUTS:void
; */
adc_it:
ANL ADCON,#~10h;                 /* Clear the End of conversion flag */
MOV value_converted,ADDH;        /* save value */
SETB end_of_convertion;          /* set flag */
RETI

end