📄 t1_tx_moto_pcm.asl
字号:
00BB F0 31 184 lda r_prtc ;continue tx 38k,when prtc.0 is low, 38k carrier pulse pass-by.
00BD CB FE 185 anda #c_prtc0_0
00BF FC 31 186 sta r_prtc
00C1 24 187 ret
00C2 188 ir_transmit_low_00:
00C2 F3 01 189 lda #1
00C4 FD 0B 190 sta flg_ir_transmit_high ;1 stop 38k
00C6 F3 00 191 lda #0
00C8 FD 06 192 sta cnt_ir_transmit ;repeat start counting
00CA F0 31 193 lda r_prtc ;when prtc.0 is high, not transmit ir.
00CC DB 01 194 ora #c_prtc0_1 ;把PC[1]置高
00CE FC 31 195 sta r_prtc
00D0 24 196 ret
00D1 197 ir_tx_data_low_over:
00D1 F1 06 198 lda cnt_ir_transmit
00D3 A7 04 199 cmpe #cnt_ir_tx_stop
00D5 06 00 DF 200 brz ir_tx_end
00D8 F0 31 201 lda r_prtc ;continue tx 38k,when prtc.0 is low, 38k carrier pulse pass-by.
00DA CB FE 202 anda #c_prtc0_0 ;wait for end
00DC FC 31 203 sta r_prtc
00DE 24 204 ret
00DF 205 ir_tx_end:
00DF F3 00 206 lda #0
00E1 FD 0A 207 sta status_ir_transmit
00E3 FD 06 208 sta cnt_ir_transmit
00E5 FD 0B 209 sta flg_ir_transmit_high ;1 stop 38k
00E7 F0 31 210 lda r_prtc ;when prtc.0 is high, not transmit ir.
00E9 DB 01 211 ora #c_prtc0_1 ;把PC[1]置高
00EB FC 31 212 sta r_prtc
00ED 24 213 ret
+ 214
+ 215 ;--------------------Play PCM----------------------------------------------
00EE 216 Pcm_Play:
00EE F1 10 217 lda M_sphptr+2
00F0 FC 54 218 sta r_tpp
00F2 F1 0F 219 lda M_sphptr+1
00F4 FC 02 220 sta r_tph
00F6 F1 0E 221 lda M_sphptr
00F8 FC 01 222 sta r_tpl
00FA 1F 223 inca
00FB FD 0E 224 sta M_sphptr
00FD F3 00 225 lda #00h
00FF 99 0F 226 addc M_sphptr+1
0101 FD 0F 227 sta M_sphptr+1
0103 F3 00 228 lda #00h
0105 99 10 229 addc M_sphptr+2
0107 FD 10 230 sta M_sphptr+2
+ 231 ;//20040630,since the rom size is smaller than 64k, as for 89c21,the following code is redundancy
+ 232 ;loop_rom_ready:
+ 233 ; lda r_op1 ;if data rom grand than 64k
+ 234 ; anda #10000000b ;program must detect OP1[7]
+ 235 ; brz loop_rom_ready ;or add 5us delay in program
0109 F8 236 ldv
010A EB FF 237 xora #0xFF
010C 06 01 14 238 brz 10$
010F EB FF 239 xora #0xFF
0111 FD 12 240 sta M_pcmdata
0113 24 241 ret
+ 242 10$:
0114 F3 FF 243 lda #0xFF
0116 FD 11 244 sta M_stopbit
0118 245 play_over:
+ 246 ;call tail
+ 247 ; lda #00h
+ 248 ; sta r_voc ;close PWM and D/A
0118 24 249 ret
+ 250 ;----------------------------------------------------------------;
+ 251 ;Motor Control Pulse Subroutine
+ 252 ;Motor 1 driver circuit controlled by the input1,input2.
+ 253 ;Motor 2 driver circuit controlled by the input3,input4.
+ 254 ;Motor1: input1-----PRTD.3 Motor2: input3-----PRTD.5
+ 255 ; input2-----PRTD.4 input4-----PRTD.6
+ 256 ;----------------------------------------------------------------;
0119 257 motor_control_pulse::
0119 F1 03 258 lda cnt_timer1
011B 1F 259 inca
011C FD 03 260 sta cnt_timer1
011E A5 00 261 cmpe m_ctrl_t1 ;这寄存器在查表中得到
0120 06 01 29 262 brz ctrl_pulse_1st_part
0123 A5 00 263 cmpe m_ctrl_t2
0125 06 01 32 264 brz ctrl_pulse_2nd_part
0128 24 265 ret
0129 266 ctrl_pulse_1st_part: ;
0129 F0 32 267 lda r_prtd
012B D9 00 268 ora m_prtd_ctrl_1_1 ;不理解为什么这样做(是输出高电平吗？但好象****）
012D FC 32 269 sta r_prtd ;PWM valid levels are finished,will output high to all(the 2cnd level)
012F 02 01 5F 270 br motor_ctrl_pulse_end
0132 271 ctrl_pulse_2nd_part:
0132 F0 32 272 lda r_prtd
0134 C9 00 273 anda m_prtd_ctrl_2_0
0136 D9 00 274 ora m_prtd_ctrl_2_1
0138 FC 32 275 sta r_prtd
013A F3 00 276 lda #00h
013C FD 03 277 sta cnt_timer1
+ 278 ;adda #00h ;clear c
013E F1 04 279 lda cnt_ctrl_pulse ;时间长度计数
0140 1F 280 inca
0141 FD 04 281 sta cnt_ctrl_pulse
0143 F1 05 282 lda cnt_ctrl_pulse+1
0145 9B 00 283 addc #00h
0147 FD 05 284 sta cnt_ctrl_pulse+1
0149 A5 01 285 cmpe m_ctrl_pulse+1 ;counter's high 8bit compare with the set value
014B 05 01 5F 286 brnc motor_ctrl_pulse_end ;if it is lower than the set value, go on counting.
014E F1 04 287 lda cnt_ctrl_pulse
0150 A5 00 288 cmpe m_ctrl_pulse ;counter's low 8bit compare with the set vlaue
0152 05 01 5F 289 brnc motor_ctrl_pulse_end ;if it is lower than the set value, go on counting.
0155 F3 00 290 lda #00h ;/*04-02-19*/
0157 FD 04 291 sta cnt_ctrl_pulse
0159 FD 05 292 sta cnt_ctrl_pulse+1
015B F3 01 293 lda #1
015D FD 00 294 sta flg_new_random
015F 295 motor_ctrl_pulse_end:
015F 24 296 ret
+ 297
+
+Symbol Table
+
+ 1 M_pcmdata 0012 GR
+ 1 M_sphptr 000E GR
+ 1 M_stopbit 0011 GR
+ 2 Pcm_Play 00EE R
+ c_ir_group = 000C
+ c_ir_transmit = 0005
+ c_ir_transmit_h = 000D
+ c_ir_transmit_l = 0005
+ c_ir_tx_data = 000F
+ c_prtc0_0 = 00FE
+ c_prtc0_1 = 0001
+ c_prtd012_1 = 0007
+ c_prtd0_1 = 0001
+ c_prtd1_1 = 0002
+ c_prtd2_1 = 0004
+ 1 cnt_ctrl_pulse 0004 GR
+ 1 cnt_ir_rcv 0007 GR
+ cnt_ir_rcv_max = 001D
+ 1 cnt_ir_transmit 0006 GR
+ cnt_ir_transmit_high = 0004
+ 1 cnt_ir_tx_data 000C GR
+ cnt_ir_tx_data_0 = 0004
+ cnt_ir_tx_data_1 = 000C
+ cnt_ir_tx_lead = 0014
+ cnt_ir_tx_stop = 0004
+ 1 cnt_timer1 0003 GR
+ 2 ctrl_pulse_1st_part 0129 R
+ 2 ctrl_pulse_2nd_part 0132 R
+ 1 flg_ir_judge 0008 GR
+ 1 flg_ir_transmit 0009 GR
+ 1 flg_ir_transmit_high 000B GR
+ 1 flg_ir_tx_1 000D GR
+ flg_new_random **** GX
+ 2 ir_transmit 0040 R
+ 2 ir_transmit_data_1 00B4 R
+ 2 ir_transmit_data_low 009A R
+ 2 ir_transmit_low 0081 R
+ 2 ir_transmit_low_00 00C2 R
+ 2 ir_transmit_next_bit 0054 R
+ 2 ir_transmit_over 007A R
+ 2 ir_tx_data_low_over 00D1 R
+ 2 ir_tx_end 00DF R
+ m_ctrl_pulse **** GX
+ m_ctrl_t1 **** GX
+ m_ctrl_t2 **** GX
+ m_prtd_ctrl_1_1 **** GX
+ m_prtd_ctrl_2_0 **** GX
+ m_prtd_ctrl_2_1 **** GX
+ 2 motor_control_pulse 0119 GR
+ 2 motor_ctrl_pulse_end 015F R
+ 2 p_skip_tx 0017 R
+ 2 play_over 0118 R
+ status_ir_rcv **** GX
+ 1 status_ir_transmit 000A GR
+ 2 t1_isr 0000 GR
+ 2 t1_isr_end 0035 R
+ 2 t1_isr_play 0027 R
+ 1 temp_a_1 0000 GR
+ 1 temp_dp_1 0002 GR
+ 1 temp_op1_1 0001 GR
+
+
+Area Table
+
+ 0 . size 0 flags 0
+ 1 time1_var size 13 flags 2
+ 2 timer1_isr size 160 flags 1
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