📄 twi.lst
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1 .file "twi.c"
2 __SREG__ = 0x3f
3 __SP_H__ = 0x3e
4 __SP_L__ = 0x3d
5 __CCP__ = 0x34
6 __tmp_reg__ = 0
7 __zero_reg__ = 1
8 .global __do_copy_data
9 .global __do_clear_bss
11 .text
12 .Ltext0:
75 .global TWI_initialize
77 TWI_initialize:
1:twi.c **** #include "twi.h"
2:twi.c **** #include <avr/io.h>
3:twi.c **** #include <avr/interrupt.h>
4:twi.c ****
5:twi.c **** volatile struct TWI_master_data *TWI_task_first = 0;
6:twi.c **** volatile struct TWI_master_data *TWI_task_last = 0;
7:twi.c **** volatile struct TWI_master_data *TWI_task_current = 0;
8:twi.c **** volatile struct TWI_slave_data *TWI_slave_send = 0;
9:twi.c **** volatile struct TWI_slave_data *TWI_slave_receive = 0;
10:twi.c ****
11:twi.c **** void TWI_initialize()
12:twi.c **** {
78 ize = 0 */
80 .LM1:
81 ldi r24,lo8(-1)
82 out 35-32,r24
13:twi.c **** F;
83 bn 68,0,14,.LM2-.LFBB1
84 .LM2:
85 0000 8FEF out 33-32,__zero_reg__
14:twi.c **** TWSR = 0;
87 :
88 ldi r24,lo8(5)
89 0004 11B8 out 86-32,r24
15:twi.c **** TWCR = (1 << TWEN) | (1 << TWIE) | (0 << TWINT) |
90 tabn 68,0,17,.LM4-.LFBB1
91 .LM4:
92 0006 85E0 /* #APP */
93 0008 86BF ; 17 "twi.c" 1
16:twi.c **** (0 << TWEA) | (0 << TWSTA) | (0 << TWSTO) | (0 << TWWC);
17:twi.c **** sei ();
94
95 ; 0 "" 2
96 /* epilogue start */
98 000a 7894 .LM5:
99 /* #NOAPP */
100 ret
18:twi.c ****
101 TWI_initialize, .-TWI_initialize
102 .Lscope1:
105 .global TWI_master_initialize
107 TWI_master_initialize:
109 .LM6:
110 .LFBB2:
111 /* prologue: function */
19:twi.c **** void TWI_master_initialize (unsigned scl_frequency)
20:twi.c **** {
21:twi.c **** TWBR = TWI_clock_frequency / (2 * scl_frequency) - 8;
112 ze = 0 */
114 .LM7:
115 movw r18,r24
116 lsl r18
22:twi.c ****
117 r19
118 ldi r20,lo8(0)
119 000e 9C01 ldi r21,hi8(0)
120 0010 220F ldi r22,lo8(16000000)
121 0012 331F ldi r23,hi8(16000000)
122 0014 40E0 ldi r24,hlo8(16000000)
123 0016 50E0 ldi r25,hhi8(16000000)
124 0018 60E0 call __divmodsi4
125 001a 74E2 subi r18,lo8(-(-8))
126 001c 84EF out 32-32,r18
127 001e 90E0 /* epilogue start */
129 0024 2850 .LM8:
130 0026 20B9 ret
23:twi.c **** void
132 bs "TWI_slave_initialize:F(0,15)",36,0,0,TWI_slave_initialize
136 .global TWI_slave_initialize
138 TWI_slave_initialize:
140 .LM9:
141 .LFBB3:
142 /* prologue: function */
143 /* frame size = 0 */
24:twi.c **** WI_slave_initialize (unsigned char own_address,
25:twi.c **** struct TWI_slave_data *send,
26:twi.c **** struct TWI_slave_data *receive)
27:twi.c **** {
28:twi.c **** TWAR = own_address;
29:twi.c **** TWI_slave_send = send;
144 ,30,.LM10-.LFBB3
145 .LM10:
146 out 34-32,r24
148 .LM11:
30:twi.c **** slave_receive = receive;
149 (TWI_slave_send)+1,r23
150 sts TWI_slave_send,r22
31:twi.c **** TWCR |= (1 << TWEA) | (0 << TWIE);
152 12:
153 sts (TWI_slave_receive)+1,r21
154 002c 7093 0000 sts TWI_slave_receive,r20
32:twi.c ****
156 3:
157 in r24,86-32
158 0034 5093 0000 ori r24,lo8(64)
159 0038 4093 0000 out 86-32,r24
33:twi.c **** void TWI_master (struct TWI_master_data *data)
160 pilogue start */
162 003c 86B7 .LM14:
163 003e 8064 ret
165 .Lscope3:
34:twi.c ****
166 s "TWI_master:F(0,15)",36,0,0,TWI_master
167 .global TWI_master
169 TWI_master:
171 .LM15:
172 .LFBB4:
173 /* prologue: function */
174 /* frame size = 0 */
35:twi.c **** if (TWI_task_first == 0)
36:twi.c **** {
37:twi.c **** TWI_task_first = TWI_task_last = TWI_task_current =
175 ,r24
177 .LM16:
178 lds r24,TWI_task_first
179 lds r25,(TWI_task_first)+1
180 0044 9C01 or r24,r25
38:twi.c **** data;
181 .L8
183 0046 8091 0000 .LM17:
184 004a 9091 0000 sts TWI_task_current,r18
185 004e 892B sts TWI_task_current+1,r19
186 0050 01F4 sts TWI_task_last,r18
39:twi.c **** TWCR |= (1 << TWSTA) | (1 << TWINT);
40:twi.c **** }
187 WI_task_last+1,r19
188 sts TWI_task_first,r18
189 0052 2093 0000 sts TWI_task_first+1,r19
191 005a 2093 0000 .LM18:
192 005e 3093 0000 in r24,86-32
193 0062 2093 0000 ori r24,lo8(-96)
194 0066 3093 0000 out 86-32,r24
41:twi.c **** else
42:twi.c **** {
195 :
197 006a 86B7 .LM19:
198 006c 806A lds r30,TWI_task_last
199 006e 86BF lds r31,(TWI_task_last)+1
200 0070 0895 std Z+6,r19
201 std Z+5,r18
43:twi.c **** TWI_task_last->next = data;
44:twi.c **** TWI_task_last = data;
45:twi.c **** }
46:twi.c **** }
202 68,0,47,.LM20-.LFBB4
203 .LM20:
204 0072 E091 0000 sts (TWI_task_last)+1,r19
205 0076 F091 0000 sts TWI_task_last,r18
206 007a 3683 ret
47:twi.c **** General TWI Master staus codes */
208 e4:
210 007e 3093 0000 .global __vector_17
212 0086 0895 __vector_17:
214 .LM21:
215 .LFBB5:
216 push __zero_reg__
217 push r0
218 in r0,__SREG__
48:twi.c **** define TWI_START 0x08
49:twi.c **** #define TWI_REP_START 0x10
50:twi.c **** #define TWI_ARB_LOST 0x38
51:twi.c **** /* TWI Master Transmitter staus codes */
52:twi.c **** #define TWI_MTX_ADR_ACK 0x18
53:twi.c **** #define TWI_MTX_ADR_NACK 0x20
54:twi.c **** #define TWI_MTX_DATA_ACK 0x28
55:twi.c **** #define TWI_MTX_DATA_NACK 0x30
56:twi.c **** /* TWI Master Receiver staus codes */
57:twi.c **** #define TWI_MRX_ADR_ACK 0x40
58:twi.c **** #define TWI_MRX_ADR_NACK 0x48
59:twi.c **** #define TWI_MRX_DATA_ACK 0x50
60:twi.c **** #define TWI_MRX_DATA_NACK 0x58
61:twi.c **** /* TWI Slave Transmitter staus codes */
62:twi.c **** #define TWI_STX_ADR_ACK 0xA8
63:twi.c **** #define TWI_STX_ADR_ACK_M_ARB_LOST 0xB0
64:twi.c **** #define TWI_STX_DATA_ACK 0xB8
65:twi.c **** #define TWI_STX_DATA_NACK 0xC0
66:twi.c **** #define TWI_STX_DATA_ACK_LAST_BYTE 0xC8
67:twi.c **** /* TWI Slave Receiver staus codes */
68:twi.c **** #define TWI_SRX_ADR_ACK 0x60
69:twi.c **** #define TWI_SRX_ADR_ACK_M_ARB_LOST 0x68
70:twi.c **** #define TWI_SRX_GEN_ACK 0x70
71:twi.c **** #define TWI_SRX_GEN_ACK_M_ARB_LOST 0x78
72:twi.c **** #define TWI_SRX_ADR_DATA_ACK 0x80
73:twi.c **** #define TWI_SRX_ADR_DATA_NACK 0x88
74:twi.c **** #define TWI_SRX_GEN_DATA_ACK 0x90
75:twi.c **** #define TWI_SRX_GEN_DATA_NACK 0x98
76:twi.c **** #define TWI_SRX_STOP_RESTART 0xA0
77:twi.c **** /* TWI Miscellaneous status codes */
78:twi.c **** #define TWI_NO_STATE 0xF8
79:twi.c **** #define TWI_BUS_ERROR 0x00
80:twi.c ****
81:twi.c **** ISR (TWI_vect)
82:twi.c **** {
83:twi.c ****
84:twi.c **** static unsigned char string_index;
85:twi.c **** switch (TWSR)
86:twi.c **** {
87:twi.c **** case TWI_START:
219 lr __zero_reg__
220 push r18
221 push r19
222 0088 1F92 push r24
223 008a 0F92 push r25
224 008c 0FB6 push r30
225 008e 0F92 push r31
226 0090 1124 /* prologue: Signal */
227 0092 2F93 /* frame size = 0 */
229 0096 8F93 .LM22:
230 0098 9F93 in r24,33-32
231 009a EF93 cpi r24,lo8(80)
232 009c FF93 brne .+2
233 rjmp .L18
234 cpi r24,lo8(81)
88:twi.c **** 0;
89:twi.c **** case TWI_MTX_ADR_ACK:
90:twi.c **** case TWI_MTX_DATA_ACK:
235 r24,lo8(40)
236 brne .+2
237 009e 81B1 rjmp .L14
238 00a0 8035 cpi r24,lo8(41)
239 00a2 01F4 brsh .L27
240 00a4 00C0 cpi r24,lo8(16)
241 00a6 8135 brne .+2
242 00a8 00F4 rjmp .L13
243 00aa 8832 cpi r24,lo8(17)
244 00ac 01F4 brsh .L28
245 00ae 00C0 cpi r24,lo8(8)
246 00b0 8932 breq .+2
247 00b2 00F4 rjmp .L12
248 00b4 8031 rjmp .L13
249 00b6 01F4 .L28:
250 00b8 00C0 cpi r24,lo8(24)
251 00ba 8131 breq .L14
252 00bc 00F4 cpi r24,lo8(32)
253 00be 8830 breq .+2
254 00c0 01F0 rjmp .L12
255 00c2 00C0 rjmp .L15
256 00c4 00C0 .L27:
257 cpi r24,lo8(56)
258 00c6 8831 brne .+2
259 00c8 01F0 rjmp .L42
260 00ca 8032 cpi r24,lo8(57)
261 00cc 01F0 brsh .L29
262 00ce 00C0 cpi r24,lo8(48)
263 00d0 00C0 breq .+2
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