📄 src632.lst
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297 5 if (n == 0)
298 5 {
299 6 n = 1;
300 6 }
301 5 for (i=0; i<n; i++)
302 5 {
303 6 pi->MfData[i+1] = ReadRawRC(RegFIFOData);
C51 COMPILER V7.50 SRC632 07/25/2008 17:05:20 PAGE 6
304 6 }
305 5 }
306 4 pi->MfData[0]=ReadRawRC(0x0B);
307 4 }
308 3
309 3 }
310 2 else if (n & irqEn & 0x20)
311 2 { status = MI_NOTAGERR; }
312 2 else if (!(ReadRawRC(RegErrorFlag)&0x17))
313 2 { status = MI_ACCESSTIMEOUT; }
314 2 else
315 2 { status = MI_COM_ERR; }
316 2
317 2 WriteRawRC(RegInterruptEn,0x7F);
318 2 WriteRawRC(RegInterruptRq,0x7F);
319 2 SetBitMask(RegControl,0x04);
320 2 WriteRawRC(RegCommand,PCD_IDLE);
321 2 }
322 1 return status;
323 1 }
324
325 /////////////////////////////////////////////////////////////////////
326 //复位并初始化RC632
327 //注意:RC500上电后应延时500ms才能可靠初始化
328 /////////////////////////////////////////////////////////////////////
329 char PcdReset(void)
330 {
331 1 char status = MI_OK;
332 1 char n = 0xFF;
333 1 unsigned int i = 3000;
334 1
335 1 RC632_CE=0;
336 1 RC632_RST=0;
337 1 DelayMs(50);
338 1 RC632_RST=1;
339 1 DelayMs(5);
340 1 RC632_RST=0;
341 1 DelayMs(5);
342 1
343 1 while (i!=0 && n)
344 1 {
345 2 n = ReadRawRC(RegCommand);
346 2 i--;
347 2 }
348 1
349 1 if (i != 0)
350 1 {
351 2 WriteRawRC(RegPage,0x80);
352 2 n = 0x80;
353 2 while ( (i!=0) && (n&0x80) )
354 2 {
355 3 n = ReadRawRC(RegCommand);
356 3 i--;
357 3 }
358 2 if (i==0 || (n&0xFF))
359 2 { status = MI_RESETERR; }
360 2 }
361 1 else
362 1 { status = MI_RESETERR; }
363 1
364 1 if (status == MI_OK)
365 1 { WriteRawRC(RegPage,0x0); }
C51 COMPILER V7.50 SRC632 07/25/2008 17:05:20 PAGE 7
366 1
367 1 return status;
368 1 }
369
370
371 //////////////////////////////////////////////////////////////////////
372 //设置RC632的工作方式
373 //////////////////////////////////////////////////////////////////////
374 char PcdConfigISOType(unsigned char type)
375 {
376 1
377 1 if (type == 'A') //ISO14443_A
378 1 {
379 2 ClearBitMask(RegControl,0x08);
380 2
381 2 WriteRawRC(RegClockQControl,0x0);
382 2 WriteRawRC(RegClockQControl,0x40);
383 2 Delay_50us(2);
384 2 ClearBitMask(RegClockQControl,0x40);
385 2
386 2 WriteRawRC(RegTxControl,0x5b);
387 2 WriteRawRC(RegCwConductance,0x0F);
388 2 WriteRawRC(RegModConductance,0x3F);
389 2 WriteRawRC(RegCoderControl,0x19);
390 2 WriteRawRC(RegModWidth,0x13);
391 2 WriteRawRC(RegModWidthSOF,0x00);
392 2 WriteRawRC(RegTypeBFraming,0x00);
393 2
394 2 WriteRawRC(RegRxControl1,0x73);
395 2 WriteRawRC(RegDecoderControl,0x08);
396 2 WriteRawRC(RegBitPhase,0xAD);
397 2 WriteRawRC(RegRxThreshold,0xAA);
398 2 WriteRawRC(RegBPSKDemControl,0);
399 2 WriteRawRC(RegRxControl2,0x41);
400 2
401 2 WriteRawRC(RegRxWait,0x06);
402 2 WriteRawRC(RegChannelRedundancy,0x0F);
403 2 WriteRawRC(RegCRCPresetLSB,0x63);
404 2 WriteRawRC(RegCRCPresetMSB,0x63);
405 2 WriteRawRC(RegTimeSlotPeriod,0x00);
406 2 WriteRawRC(RegMfOutSelect,0x00);
407 2 WriteRawRC(RFU27,0x00);
408 2
409 2 WriteRawRC(RegFIFOLevel,0x3F);
410 2 WriteRawRC(RegTimerClock,0x07);
411 2 WriteRawRC(RegTimerReload,0x0A);
412 2 WriteRawRC(RegTimerControl,0x06);
413 2 WriteRawRC(RegIRqPinConfig,0x02);
414 2 WriteRawRC(RFU2E,0x00);
415 2 WriteRawRC(RFU2F,0x00);
416 2
417 2 PcdSetTmo(106);
418 2 DelayMs(1);
419 2 PcdAntennaOn();
420 2
421 2 }
422 1 else if (type == 'B')
423 1 {
424 2 ClearBitMask(RegControl,0x08);
425 2
426 2 WriteRawRC(RegClockQControl,0x0);
427 2 WriteRawRC(RegClockQControl,0x40);
C51 COMPILER V7.50 SRC632 07/25/2008 17:05:20 PAGE 8
428 2 Delay_50us(2);
429 2 ClearBitMask(RegClockQControl,0x40);
430 2
431 2 WriteRawRC(RegTxControl,0x4b);
432 2 WriteRawRC(RegCwConductance,0x17);
433 2 WriteRawRC(RegModConductance,0x06);
434 2 WriteRawRC(RegCoderControl,0x20);
435 2 WriteRawRC(RegModWidth,0x13);
436 2 WriteRawRC(RegModWidthSOF,0x3F);
437 2 WriteRawRC(RegTypeBFraming,0x3B);
438 2
439 2 WriteRawRC(RegRxControl1,0x73);
440 2 WriteRawRC(RegDecoderControl,0x19);
441 2 WriteRawRC(RegBitPhase,0xAD);
442 2 WriteRawRC(RegRxThreshold,0x88);
443 2 WriteRawRC(RegBPSKDemControl,0x7E);
444 2 WriteRawRC(RegRxControl2,0x01);
445 2
446 2 WriteRawRC(RegRxWait,0x06);
447 2 WriteRawRC(RegChannelRedundancy,0x2C);
448 2 WriteRawRC(RegCRCPresetLSB,0xFF);
449 2 WriteRawRC(RegCRCPresetMSB,0xFF);
450 2 WriteRawRC(RegTimeSlotPeriod,0x00);
451 2 WriteRawRC(RegMfOutSelect,0x00);
452 2 WriteRawRC(RFU27,0x00);
453 2
454 2 WriteRawRC(RegFIFOLevel,0x3F);
455 2 WriteRawRC(RegTimerClock,0x07);
456 2 WriteRawRC(RegTimerReload,0x0A);
457 2 WriteRawRC(RegTimerControl,0x06);
458 2 WriteRawRC(RegIRqPinConfig,0x02);
459 2 WriteRawRC(RFU2E,0x00);
460 2 WriteRawRC(RFU2F,0x00);
461 2 PcdSetTmo(106);
462 2 DelayMs(1);
463 2 PcdAntennaOn();
464 2 }
465 1 else if (type == 'r')
466 1 {
467 2 ClearBitMask(RegControl,0x08);
468 2
469 2 WriteRawRC(RegClockQControl,0x0);
470 2 WriteRawRC(RegClockQControl,0x40);
471 2 Delay_50us(2);
472 2 ClearBitMask(RegClockQControl,0x40);
473 2
474 2 WriteRawRC(RegTxControl,0x4b);
475 2 WriteRawRC(RegCwConductance,0x06);
476 2 WriteRawRC(RegModConductance,0x03);
477 2 WriteRawRC(RegCoderControl,0x20);
478 2 WriteRawRC(RegModWidth,0x13);
479 2 WriteRawRC(RegModWidthSOF,0x00);
480 2 WriteRawRC(RegTypeBFraming,0x3B);
481 2
482 2 WriteRawRC(RegRxControl1,0x73);
483 2 WriteRawRC(RegDecoderControl,0x19);
484 2 WriteRawRC(RegBitPhase,0xAD);
485 2 WriteRawRC(RegRxThreshold,0x88);
486 2 WriteRawRC(RegBPSKDemControl,0x3E);
487 2 WriteRawRC(RegRxControl2,0x01);
488 2
489 2 WriteRawRC(RegRxWait,0x06);
C51 COMPILER V7.50 SRC632 07/25/2008 17:05:20 PAGE 9
490 2 WriteRawRC(RegChannelRedundancy,0x2C);
491 2 WriteRawRC(RegCRCPresetLSB,0xFF);
492 2 WriteRawRC(RegCRCPresetMSB,0xFF);
493 2 WriteRawRC(RegTimeSlotPeriod,0x00);
494 2 WriteRawRC(RegMfOutSelect,0x00);
495 2 WriteRawRC(RFU27,0x00);
496 2
497 2 WriteRawRC(RegFIFOLevel,0x1A);
498 2 WriteRawRC(RegTimerClock,0x07);
499 2 WriteRawRC(RegTimerReload,0x0A);
500 2 WriteRawRC(RegTimerControl,0x06);
501 2 WriteRawRC(RegIRqPinConfig,0x02);
502 2 WriteRawRC(RFU2E,0x00);
503 2 WriteRawRC(RFU2F,0x00);
504 2 PcdSetTmo(106);
505 2 DelayMs(1);
506 2 PcdAntennaOn();
507 2 }
508 1 else if (type == 's')
509 1 {
510 2 ClearBitMask(RegControl,0x08);
511 2
512 2 WriteRawRC(RegClockQControl,0x0);
513 2 WriteRawRC(RegClockQControl,0x40);
514 2 Delay_50us(2);
515 2 ClearBitMask(RegClockQControl,0x40);
516 2
517 2 WriteRawRC(RegTxControl,0x4b);
518 2 WriteRawRC(RegCwConductance,0x06);
519 2 WriteRawRC(RegModConductance,0x03);
520 2 WriteRawRC(RegCoderControl,0x20);
521 2 WriteRawRC(RegModWidth,0x13);
522 2 WriteRawRC(RegModWidthSOF,0x00);
523 2 WriteRawRC(RegTypeBFraming,0x18);
524 2
525 2 WriteRawRC(RegRxControl1,0x73);
526 2 WriteRawRC(RegDecoderControl,0x19);
527 2 WriteRawRC(RegBitPhase,0xAD);
528 2 WriteRawRC(RegRxThreshold,0x88);
529 2 WriteRawRC(RegBPSKDemControl,0x3E);
530 2 WriteRawRC(RegRxControl2,0x01);
531 2 WriteRawRC(RegClockQControl,0x00);
532 2
533 2 WriteRawRC(RegRxWait,0x06);
534 2 WriteRawRC(RegChannelRedundancy,0x2C);
535 2 WriteRawRC(RegCRCPresetLSB,0xFF);
536 2 WriteRawRC(RegCRCPresetMSB,0xFF);
537 2 WriteRawRC(RegTimeSlotPeriod,0x00);
538 2 WriteRawRC(RegMfOutSelect,0x00);
539 2 WriteRawRC(RFU27,0x00);
540 2
541 2 WriteRawRC(RegFIFOLevel,0x3F);
542 2 WriteRawRC(RegTimerClock,0x07);
543 2 WriteRawRC(RegTimerReload,0x0A);
544 2 WriteRawRC(RegTimerControl,0x06);
545 2 WriteRawRC(RegIRqPinConfig,0x02);
546 2 WriteRawRC(RFU2E,0x00);
547 2 WriteRawRC(RFU2F,0x00);
548 2 PcdSetTmo(106);
549 2 DelayMs(1);
550 2 PcdAntennaOn();
551 2 }
C51 COMPILER V7.50 SRC632 07/25/2008 17:05:20 PAGE 10
552 1
553 1 else{ return -1; }
554 1 return MI_OK;
555 1 }
556
557
558 /////////////////////////////////////////////////////////////////////
559 //开启天线
560 //每次启动或关闭天险发射之间应至少有1ms的间隔
561 /////////////////////////////////////////////////////////////////////
562 char PcdAntennaOn(void)
563 {
564 1 unsigned char i;
565 1 i = ReadRawRC(RegTxControl);
566 1 if (i & 0x03)
567 1 { return MI_OK; }
568 1 else
569 1 {
570 2 SetBitMask(RegTxControl, 0x03);
571 2 return MI_OK;
572 2 }
573 1 }
574 /*
575 /////////////////////////////////////////////////////////////////////
576 //关闭天线
577 /////////////////////////////////////////////////////////////////////
578 char PcdAntennaOff(void)
579 {
580 ClearBitMask(RegTxControl, 0x03);
581 return MI_OK;
582 }*/
583
MODULE INFORMATION: STATIC OVERLAYABLE
CODE SIZE = 1826 ----
CONSTANT SIZE = ---- ----
XDATA SIZE = ---- ----
PDATA SIZE = ---- ----
DATA SIZE = 3 19
IDATA SIZE = ---- ----
BIT SIZE = ---- 1
END OF MODULE INFORMATION.
C51 COMPILATION COMPLETE. 0 WARNING(S), 0 ERROR(S)
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