pspanlib.c

motorola 8260 CPU上面

  printf( "PB_SI0_TADDR  : %08x\r\n", pspan->pb_si[0].taddr );
  printf( "PB_SI0_BADDR  : %08x\r\n", pspan->pb_si[0].baddr );
  printf( "PB_SI1_CTL    : %08x\r\n", pspan->pb_si[1].ctl );
  printf( "PB_SI1_TADDR  : %08x\r\n", pspan->pb_si[1].taddr );
  printf( "PB_SI1_BADDR  : %08x\r\n", pspan->pb_si[1].baddr );
  printf( "PB_SI2_CTL    : %08x\r\n", pspan->pb_si[2].ctl );
  printf( "PB_SI2_TADDR  : %08x\r\n", pspan->pb_si[2].taddr );
  printf( "PB_SI2_BADDR  : %08x\r\n", pspan->pb_si[2].baddr );
  printf( "PB_SI3_CTL    : %08x\r\n", pspan->pb_si[3].ctl );
  printf( "PB_SI3_TADDR  : %08x\r\n", pspan->pb_si[3].taddr );
  printf( "PB_SI3_BADDR  : %08x\r\n", pspan->pb_si[3].baddr );
  printf( "PB_SI4_CTL    : %08x\r\n", pspan->pb_si[4].ctl );
  printf( "PB_SI4_TADDR  : %08x\r\n", pspan->pb_si[4].taddr );
  printf( "PB_SI4_BADDR  : %08x\r\n", pspan->pb_si[4].baddr );
  printf( "PB_SI5_CTL    : %08x\r\n", pspan->pb_si[5].ctl );
  printf( "PB_SI5_TADDR  : %08x\r\n", pspan->pb_si[5].taddr );
  printf( "PB_SI5_BADDR  : %08x\r\n", pspan->pb_si[5].baddr );
  printf( "PB_SI6_CTL    : %08x\r\n", pspan->pb_si[6].ctl );
  printf( "PB_SI6_TADDR  : %08x\r\n", pspan->pb_si[6].taddr );
  printf( "PB_SI6_BADDR  : %08x\r\n", pspan->pb_si[6].baddr );
  printf( "PB_SI7_CTL    : %08x\r\n", pspan->pb_si[7].ctl );
  printf( "PB_SI7_TADDR  : %08x\r\n", pspan->pb_si[7].taddr );
  printf( "PB_SI7_BADDR  : %08x\r\n", pspan->pb_si[7].baddr );
  printf( "PB_REG_BADDR  : %08x\r\n", pspan->pb_reg_baddr );
  printf( "PB_CONF_INFO  : %08x\r\n", pspan->pb_conf_info );
  printf( "PB_ERRCS      : %08x\r\n", pspan->pb_errcs );
  printf( "PB_AERR       : %08x\r\n", pspan->pb_aerr );
  printf( "PB_MISC_CSR   : %08x\r\n", pspan->pb_misc_csr );
  printf( "PB_ARB_CTRL   : %08x\r\n", pspan->pb_arb_ctrl );
  printf( "DMA0_SRC_ADDR : %08x\r\n", pspan->dma[0].src_addr );
  printf( "DMA0_DST_ADDR : %08x\r\n", pspan->dma[0].dst_addr );
  printf( "DMA0_TCR      : %08x\r\n", pspan->dma[0].tcr );
  printf( "DMA0_CPP      : %08x\r\n", pspan->dma[0].cpp );
  printf( "DMA0_GCR      : %08x\r\n", pspan->dma[0].gcsr );
  printf( "DMA0_ATTR     : %08x\r\n", pspan->dma[0].attr );
  printf( "DMA1_SRC_ADDR : %08x\r\n", pspan->dma[1].src_addr );
  printf( "DMA1_DST_ADDR : %08x\r\n", pspan->dma[1].dst_addr );
  printf( "DMA1_TCR      : %08x\r\n", pspan->dma[1].tcr );
  printf( "DMA1_CPP      : %08x\r\n", pspan->dma[1].cpp );
  printf( "DMA1_GCR      : %08x\r\n", pspan->dma[1].gcsr );
  printf( "DMA1_ATTR     : %08x\r\n", pspan->dma[1].attr );
  printf( "DMA2_SRC_ADDR : %08x\r\n", pspan->dma[2].src_addr );
  printf( "DMA2_DST_ADDR : %08x\r\n", pspan->dma[2].dst_addr );
  printf( "DMA2_TCR      : %08x\r\n", pspan->dma[2].tcr );
  printf( "DMA2_CPP      : %08x\r\n", pspan->dma[2].cpp );
  printf( "DMA2_GCR      : %08x\r\n", pspan->dma[2].gcsr );
  printf( "DMA2_ATTR     : %08x\r\n", pspan->dma[2].attr );
  printf( "DMA3_SRC_ADDR : %08x\r\n", pspan->dma[3].src_addr );
  printf( "DMA3_DST_ADDR : %08x\r\n", pspan->dma[3].dst_addr );
  printf( "DMA3_TCR      : %08x\r\n", pspan->dma[3].tcr );
  printf( "DMA3_CPP      : %08x\r\n", pspan->dma[3].cpp );
  printf( "DMA3_GCR      : %08x\r\n", pspan->dma[3].gcsr );
  printf( "DMA3_ATTR     : %08x\r\n", pspan->dma[3].attr );
  printf( "MISC_CSR      : %08x\r\n", pspan->misc_csr );
  printf( "CLOCK_CTL     : %08x\r\n", pspan->clock_ctl );
  printf( "I2C_CSR       : %08x\r\n", pspan->i2c_csr );
  printf( "RST_CSR       : %08x\r\n", pspan->rst_csr );
  printf( "ISR0          : %08x\r\n", pspan->isr0 );
  printf( "ISR1          : %08x\r\n", pspan->isr1 );
  printf( "IER0          : %08x\r\n", pspan->ier0 );
  printf( "IER1          : %08x\r\n", pspan->ier1 );
  printf( "IMR_MBOX      : %08x\r\n", pspan->imr_mbox );
  printf( "IMR_DB        : %08x\r\n", pspan->imr_db );
  printf( "IMR_DMA       : %08x\r\n", pspan->imr_dma );
  printf( "IMR_HW        : %08x\r\n", pspan->imr_hw );
  printf( "IMR_P1        : %08x\r\n", pspan->imr_p1 );
  printf( "IMR_P2        : %08x\r\n", pspan->imr_p2 );
  printf( "IMR_PB        : %08x\r\n", pspan->imr_pb );
  printf( "IMR2_PB       : %08x\r\n", pspan->imr2_pb );
  printf( "IMR_MISC      : %08x\r\n", pspan->imr_misc );
  printf( "IDR           : %08x\r\n", pspan->idr );
  printf( "MBOX0         : %08x\r\n", pspan->mbox[0] );
  printf( "MBOX1         : %08x\r\n", pspan->mbox[1] );
  printf( "MBOX2         : %08x\r\n", pspan->mbox[2] );
  printf( "MBOX3         : %08x\r\n", pspan->mbox[3] );
  printf( "MBOX4         : %08x\r\n", pspan->mbox[4] );
  printf( "MBOX5         : %08x\r\n", pspan->mbox[5] );
  printf( "MBOX6         : %08x\r\n", pspan->mbox[6] );
  printf( "MBOX7         : %08x\r\n", pspan->mbox[7] );
  printf( "SEMA0         : %08x\r\n", pspan->sema[0] );
  printf( "SEMA1         : %08x\r\n", pspan->sema[1] );
  printf( "PCI_TI2O_CTL  : %08x\r\n", pspan->pci_ti2o_ctl );
  printf( "PCI_TI2O_TADDR: %08x\r\n", pspan->pci_ti2o_taddr );
  printf( "I2O_CSR       : %08x\r\n", pspan->i2o_csr );
  printf( "I2O_QUEUE_BS  : %08x\r\n", pspan->i2o_queue_bs );
  printf( "IFL_BOT       : %08x\r\n", pspan->ifl_bot );  
  printf( "IFL_TOP       : %08x\r\n", pspan->ifl_top );  
  printf( "IFL_TOP_INC   : %08x\r\n", pspan->ifl_top_inc );  
  printf( "IPL_BOT       : %08x\r\n", pspan->ipl_bot );  
  printf( "IPL_BOT_INC   : %08x\r\n", pspan->ipl_bot_inc );  
  printf( "IPL_TOP       : %08x\r\n", pspan->ipl_top );  
  printf( "OFL_BOT       : %08x\r\n", pspan->ofl_bot );  
  printf( "OFL_BOT_INC   : %08x\r\n", pspan->ofl_bot_inc );  
  printf( "OFL_TOP       : %08x\r\n", pspan->ofl_top );  
  printf( "OPL_BOT       : %08x\r\n", pspan->opl_bot );  
  printf( "OPL_TOP       : %08x\r\n", pspan->opl_top );  
  printf( "OPL_TOP_INC   : %08x\r\n", pspan->opl_top_inc );  
  printf( "HOST_OIO      : %08x\r\n", pspan->host_oio );  
  printf( "HOST_OIA      : %08x\r\n", pspan->host_oia );  
  printf( "IOP_OI        : %08x\r\n", pspan->iop_oi );  
  printf( "IOP_OI_INC    : %08x\r\n", pspan->iop_oi_inc );  
  printf( "P2_ID         : %08x\r\n", pspan->p2_cfg.id );
  printf( "P2_CSR        : %08x\r\n", pspan->p2_cfg.csr );
  printf( "P2_CLASS      : %08x\r\n", pspan->p2_cfg.pci_class );
  printf( "P2_MISC0      : %08x\r\n", pspan->p2_cfg.misc0 );
  printf( "P2_BSI2O      : %08x\r\n", pspan->p2_cfg.bsi2o );
  printf( "P2_BSREG      : %08x\r\n", pspan->p2_cfg.bsreg );
  printf( "P2_BST0       : %08x\r\n", pspan->p2_cfg.bst[0] );
  printf( "P2_BST1       : %08x\r\n", pspan->p2_cfg.bst[1] );
  printf( "P2_BST2       : %08x\r\n", pspan->p2_cfg.bst[2] );
  printf( "P2_BST3       : %08x\r\n", pspan->p2_cfg.bst[3] );
  printf( "P2_SID        : %08x\r\n", pspan->p2_cfg.sid );
  printf( "P2_CAP        : %08x\r\n", pspan->p2_cfg.cap );
  printf( "P2_MISC1      : %08x\r\n", pspan->p2_cfg.misc1 );
  printf( "P2_HS_CSR     : %08x\r\n", pspan->p2_cfg.hs_csr );
  printf( "P2_VPDC       : %08x\r\n", pspan->p2_cfg.vpdc );
  printf( "P2_VPDD       : %08x\r\n", pspan->p2_cfg.vpdd );
  printf( "P2_TI0_CTL    : %08x\r\n", pspan->p2.ti[0].ctl );
  printf( "P2_TI0_TADDR  : %08x\r\n", pspan->p2.ti[0].taddr );
  printf( "P2_TI1_CTL    : %08x\r\n", pspan->p2.ti[1].ctl );
  printf( "P2_TI1_TADDR  : %08x\r\n", pspan->p2.ti[1].taddr );
  printf( "P2_TI2_CTL    : %08x\r\n", pspan->p2.ti[2].ctl );
  printf( "P2_TI2_TADDR  : %08x\r\n", pspan->p2.ti[2].taddr );
  printf( "P2_TI3_CTL    : %08x\r\n", pspan->p2.ti[3].ctl );
  printf( "P2_TI3_TADDR  : %08x\r\n", pspan->p2.ti[3].taddr );
  printf( "P2_CONF_INFO  : %08x\r\n", pspan->p2.conf_info );
  printf( "P2_ERRCS      : %08x\r\n", pspan->p2.errcs );
  printf( "P2_AERR       : %08x\r\n", pspan->p2.aerr );
  printf( "P2_MISC_CSR   : %08x\r\n", pspan->p2.misc_csr );
  printf( "P2_ARB_CTRL   : %08x\r\n", pspan->p2.arb_ctrl );

  return ( retval );

  } /* PspanRegsDump */

/*=========================================================================
 *  Function Name:      PspanDirectModeDma
 *
 *  Arguments:
 *    pspan             pointer to PowerSpan register space structure
 *    src_addr          source address 
 *    dst_addr          destination address
 *    src_port          source port (PB/PCI1/PCI2)
 *    dst_port          destination port (PB/PCI1/PCI2)
 *    byte_count        byte count (>0)
 *    channel           DMA channel number 0-3
 *
 *  Description:
 *    Perform a direct mode DMA transfer with the specified channel.
 *  
 *  Return Value:       SUCCESS/FAILURE
 *    
 =========================================================================*/
UINT32 PspanDirectModeDma
  ( 
  PPSPAN pspan,
  UINT32 src_addr,
  UINT32 dst_addr,
  UINT32 src_port,
  UINT32 dst_port,
  UINT32 byte_count,
  UINT32 channel 
  )
  {
  UINT32 retval;
  UINT32 read_val;
  UINT32 temp;

  retval = SUCCESS;

  /* make sure DMA channel x is not active */
  switch ( channel )
    {
    case 0:
      read_val = pspan->dma[0].gcsr;
      break;
    case 1:
      read_val = pspan->dma[1].gcsr;
      break;
    case 2:
      read_val = pspan->dma[2].gcsr;
      break;
    case 3:
      read_val = pspan->dma[3].gcsr;
      break;
    default:
      read_val = DMA_GCSR_DACT;
      break;
    }
  temp     = read_val & DMA_GCSR_DACT;

  if ( temp != 0 )
    retval = FAILURE;
  else
    {
      /* DMA is not active */

      /* program source/dest ports and byte count, little endian - no swap */
      temp = 0;
      if ( src_port == PCI1 )
	temp = temp | DMAx_TCR_SRC_PORT_P1_VAL;
      else if ( src_port == PCI2 )
	temp = temp | DMAx_TCR_SRC_PORT_P2_VAL;
      else if ( src_port == PB )
	temp = temp | DMAx_TCR_SRC_PORT_PB_VAL;

      if ( dst_port == PCI1 )
	temp = temp | DMAx_TCR_DST_PORT_P1_VAL;
      else if ( dst_port == PCI2 )
	temp = temp | DMAx_TCR_DST_PORT_P2_VAL;
      else if ( dst_port == PB )
	temp = temp | DMAx_TCR_DST_PORT_PB_VAL;
      
      temp = temp | ( DMA_TCR_BC & byte_count );

      DBG2( "DMA%d_SRC_ADDR  : %08x\r\n", channel, src_addr );
      DBG2( "DMA%d_DST_ADDR  : %08x\r\n", channel, dst_addr );
      DBG2( "DMA%d_TCR  : %08x\r\n", channel, temp );

      /* source and destination addresses, tcr register and
	 zero out DMAx_CPP */
      switch ( channel )
	{
	case 0:
	  pspan->dma[0].src_addr = src_addr;
	  pspan->dma[0].dst_addr = dst_addr;
	  pspan->dma[0].tcr      = temp;
	  pspan->dma[0].cpp      = 0;
	  pspan->dma[0].attr    |= DMA_ATTR_CI_;
	  break;
	case 1:
	  pspan->dma[1].src_addr = src_addr;
	  pspan->dma[1].dst_addr = dst_addr;
	  pspan->dma[1].tcr      = temp;
	  pspan->dma[1].cpp      = 0;
	  pspan->dma[1].attr    |= DMA_ATTR_CI_;
	  break;
	case 2:
	  pspan->dma[2].src_addr = src_addr;
	  pspan->dma[2].dst_addr = dst_addr;
	  pspan->dma[2].tcr      = temp;
	  pspan->dma[2].cpp      = 0;
	  pspan->dma[2].attr    |= DMA_ATTR_CI_;
	  break;
	case 3:
	  pspan->dma[3].src_addr = src_addr;
	  pspan->dma[3].dst_addr = dst_addr;
	  pspan->dma[3].tcr      = temp;
	  pspan->dma[3].cpp      = 0;
	  pspan->dma[3].attr    |= DMA_ATTR_CI_;
	  break;
	}

      /* set GO bit and clear all status bits at the same time */
      temp = 0;
      temp = DMA_GCSR_GO | 
	     DMA_GCSR_P1_ERR | 
	     DMA_GCSR_P2_ERR | 
	     DMA_GCSR_PB_ERR | 
	     DMA_GCSR_STOP | 
	     DMA_GCSR_HALT | 
	     DMA_GCSR_DONE ;

      DBG1( "Setting DMA%d GO bit ...\r\n", channel );

      switch ( channel )
	{
	case 0:
	  pspan->dma[0].gcsr = temp;
	  /*
	  for ( i = 0; i < 100; i++ );
	  */
	  temp = pspan->dma[0].gcsr;
	  break;
	case 1:
	  pspan->dma[1].gcsr = temp;
	  /*
	  for ( i = 0; i < 100; i++ );
	  */
	  temp = pspan->dma[1].gcsr;
	  break;
	case 2:
	  pspan->dma[2].gcsr = temp;
	  /*
	  for ( i = 0; i < 100; i++ );
	  */
	  temp = pspan->dma[2].gcsr;
	  break;
	case 3:
	  pspan->dma[3].gcsr = temp;
	  /*
	  for ( i = 0; i < 100; i++ );
	  */
	  temp = pspan->dma[3].gcsr;
	  break;
	}

      DBG2( "DMA%d_GCSR  : %08x\r\n", channel, temp );

      /*
      temp = temp & DMA_GCSR_DACT;
      if ( 0 == temp )
	{
	  DBG1( "WARNING:  DMA%d_GCSR[DACT] NOT set after a while!!\r\n", channel );
	}
	*/

    }

  return ( retval );

  } /* PspanDirectModeDma */

/*=========================================================================
 *  Function Name:      PspanIsDmaDone
 *
 *  Arguments:
 *    channel           DMA channel number 0-3
 *
 *  Description:
 *    Check to see if DMA in specified channel is done.
 *  
 *  Return Value:       SUCCESS/FAILURE
 *    
 =========================================================================*/
UINT32 PspanIsDmaDone
  ( 
  PPSPAN pspan,
  UINT32 channel 
  )
  {
  UINT32 retval = FAILURE;
  UINT32 read_val = 0;
  UINT32 temp;

  switch ( channel )
    {
    case 0:
      read_val = pspan->dma[0].gcsr;
      break;
    case 1:
      read_val = pspan->dma[1].gcsr;
      break;
    case 2:
      read_val = pspan->dma[2].gcsr;
      break;
    case 3:
      read_val = pspan->dma[3].gcsr;
      break;
    }
  temp = read_val & DMA_GCSR_DACT;

  if ( 0 == temp )
    retval = SUCCESS;
  else
    retval = FAILURE;

  return ( retval );

} /* PspanIsDmaDone */

/*=========================================================================
 *  Function Name:      PspanCheckDmaStatus
 *
 *  Arguments:
 *    channel           DMA channel number 0-3
 *
 *  Description:
 *    Check to see if the error status bits in the specified channel are set.
 *  
 *  Return Value:       SUCCESS/FAILURE
 *    
 =========================================================================*/
UINT32 PspanCheckDmaStatus
  ( 
  PPSPAN pspan,
  UINT32 channel 
  )
  {
  UINT32 retval = FAILURE;
  UINT32 read_val = 0;

  retval = SUCCESS;
  switch ( channel )
    {
    case 0:
      read_val = pspan->dma[0].gcsr;
      break;
    case 1:
      read_val = pspan->dma[1].gcsr;
      break;
    case 2:
      read_val = pspan->dma[2].gcsr;
      break;
    case 3:
      read_val = pspan->dma[3].gcsr;
      break;
    }

  if ( (read_val & DMA_GCSR_P1_ERR) == 0 &&
       (read_val & DMA_GCSR_P2_ERR) == 0 &&
       (read_val & DMA_GCSR_PB_ERR) == 0 &&
       (read_val & DMA_GCSR_DONE) == DMA_GCSR_DONE)
    {
      DBG1( "\r\nDMA%d ended sucessfully!!\r\n", channel );
      retval = SUCCESS;
    }
  else
    {
      DBG1( "\r\nDMA%d ended unsucessfully ...\r\n", channel );
      DBG2( "DMA%d_GCSR  : %08x\r\n", channel, read_val );
      retval = FAILURE;  /* DMA ended with errors */
    }

  return ( retval );

  } /* PspanCheckDmaStatus */

/*=========================================================================
 *  Function Name:      PspanProgramI2cLoadBits
 *
 *  Arguments:
 *    def_mem           0=default 1=memory resident 3=copy default to memory
 *
 *  Description:
 *    Load I2C bits into EEPROM.
 *  
 *  Return Value:       SUCCESS/FAILURE
 *    
 *=========================================================================*/
unsigned char i2c_load_table_default[] = {

  0x02, /*  00h     0x01=short load  0x02=long load  0x04=tune bits load */
  0x00, /*  01h */
  0x00, /*  02h */
  0x00, /*  03h */
  0x00, /*  04h */
  0x0f, /*  05h     P1_CSR_[BM_EN],P1_CSR[MS],P2_CSR[BM_EN],P2_CSR[MS] */
  0x0f, /*  06h     P1_BSI2O[PRFTCH],P1_BSTx[PRFTCH] */
  0x88, /*  07h     P1_SID[SID[15:8]] */
  0x88, /*  08h     P1_SID[SID[7:0]] */
  0x10, /*  09h     P1_SID[SVID[15:8]] */
  0xe3, /*  0ah     P1_SID[SVID[7:0]] */
  0x03, /*  0bh     P1_MISC1[INT_PIN[0]],P2_MISC1[INT_PIN[0]] */
  0x1c, /*  0ch     P1_MISC_CSR[BSREG_BAR