pspanlib.c

motorola 8260 CPU上面

  temp = temp & ~DMA_ATTR_CP_PORT;    /* zero out CPA_PORT */
  temp = temp | DMAx_ATTR_CPA_PORT_PB_VAL;   /* set CPA_PORT to PB */ 
  pspan->dma[0].attr = temp;

  /* set GO and CHAIN bits and clear all status bits at the same time */
  temp = 0;
  temp = DMA_GCSR_GO | 
         DMA_GCSR_CHAIN | 
         DMA_GCSR_P1_ERR | 
         DMA_GCSR_P2_ERR | 
	 DMA_GCSR_PB_ERR | 
	 DMA_GCSR_STOP | 
	 DMA_GCSR_HALT | 
	 DMA_GCSR_DONE ;
  pspan->dma[0].gcsr = temp;

  /* wait until active bit is cleared before returning */
  temp = 1;
  while ( temp != 0 )
    {
      read_val = pspan->dma[0].gcsr;
      temp     = read_val & DMA_GCSR_DACT;
    }

  if ( (read_val & DMA_GCSR_P1_ERR) == 0 &&
       (read_val & DMA_GCSR_P2_ERR) == 0 &&
       (read_val & DMA_GCSR_PB_ERR) == 0 &&
       (read_val & DMA_GCSR_DONE) == DMA_GCSR_DONE)
    retval = SUCCESS;
  else
    retval = FAILURE;  /* DMA ended with errors */

  return ( retval );

} /* PspanSimpleLinkedListModeDma */

/*=========================================================================
 *  Function Name:      PspanLinkedListDma
 *
 *  Arguments:
 *    pspan             pointer to PowerSpan register space structure
 *    src_addr          source address 
 *    dst_addr          destination address
 *    src_port          source port (PB/PCI1/PCI2)
 *    dst_port          destination port (PB/PCI1/PCI2)
 *    byte_count        byte count (>0)
 *
 *  Description:
 *    Simple link list mode DMA that polls the DMAx_GCSR[DACT] bit until 
 *    done.  DMA is performed with channel 0.
 *  
 *  Return Value:       SUCCESS/FAILURE
 *
 *  Notes: Command packet should be 32byte aligned.
 *    
 =========================================================================*/
UINT32 PspanLinkedListDma
  (
  PPSPAN pspan,
  struct PowerSpanCmdPktDef *cmd_ppkt,
  UINT32 src_addr0,
  UINT32 dst_addr0,
  UINT32 src_port0,
  UINT32 dst_port0,
  UINT32 byte_count0,
  UINT32 src_addr1,
  UINT32 dst_addr1,
  UINT32 src_port1,
  UINT32 dst_port1,
  UINT32 byte_count1, 
  UINT32 src_addr2,
  UINT32 dst_addr2,
  UINT32 src_port2,
  UINT32 dst_port2,
  UINT32 byte_count2 
  )
{
  UINT32 retval;
  UINT32 read_val;
  UINT32 temp;

  /* Enable DMA Interrupts, Stop, Halt and Done */

  pspan->dma[0].gcsr = pspan->dma[0].gcsr | 0x00000007; /*DONE_EN set*/

  /* liked list starts at address 0x00  of the SDRAM */
  cmd_ppkt = (struct PowerSpanCmdPktDef *) 0x0;
  
  /* struct PowerSpanCmdPktDef cmd_pkt; *//* command packet on PB side */

  retval = SUCCESS;

  /* create command packet - only 3 packets */
  PspanCreateCommandPacket( &cmd_ppkt[0], src_addr0, dst_addr0, 
				   src_port0, dst_port0, byte_count0, &cmd_ppkt[1], FALSE );

  PspanCreateCommandPacket( &cmd_ppkt[1], src_addr1, dst_addr1, 
				   src_port1, dst_port1, byte_count1, &cmd_ppkt[2], FALSE);

  PspanCreateCommandPacket( &cmd_ppkt[2], src_addr2, dst_addr2, 
				   src_port2, dst_port2, byte_count2, &cmd_ppkt[3], TRUE );

  /* ensure DMA0_TCR[BC]=0 */
  pspan->dma[0].tcr = 0;

  /* set address of command packet */
  pspan->dma[0].cpp = (UINT32) &cmd_ppkt[0];

  /* set CPA_PORT in DMAx_ATTR to PB */
  temp = pspan->dma[0].attr;
  temp = temp & ~DMA_ATTR_CP_PORT;          /* zero out CPA_PORT */
  temp = temp | DMAx_ATTR_CPA_PORT_PB_VAL;   /* set CPA_PORT to PB */ 
  pspan->dma[0].attr = temp;

  /* set GO and CHAIN bits and clear all status bits at the same time */
  temp = 0;
  temp = DMA_GCSR_GO | 
         DMA_GCSR_CHAIN | 
         DMA_GCSR_P1_ERR | 
         DMA_GCSR_P2_ERR | 
	 DMA_GCSR_PB_ERR | 
	 DMA_GCSR_STOP | 
	 DMA_GCSR_HALT | 
	 DMA_GCSR_DONE ;

  /* We want to keep STOP_EN, HALT_EN, and DONE_EN set */
  
  temp = temp | 0x00000007;
  pspan->dma[0].gcsr = temp;

  /* wait until active bit is cleared before returning */
  temp = 1;
  while ( temp != 0 )
    {
      read_val = pspan->dma[0].gcsr;
      temp     = read_val & DMA_GCSR_DACT;
    }

  if ( (read_val & DMA_GCSR_P1_ERR) == 0 &&
       (read_val & DMA_GCSR_P2_ERR) == 0 &&
       (read_val & DMA_GCSR_PB_ERR) == 0 &&
       (read_val & DMA_GCSR_DONE) == DMA_GCSR_DONE)
    retval = SUCCESS;
  else
    retval = FAILURE;  /* DMA ended with errors */

  return ( retval );

} /* PspanLinkedListDma */

/*=========================================================================
 *  Function Name:      PspanI2c
 *
 *  Arguments:
 *    pspan             pointer to PowerSpan register space structure
 *    addr              byte address 
 *    data              data (LSB is taken on writes)
 *    dev_code          4 bit device code (should be 0xa for EEPROM)
 *    chip_select       3 bit chip select
 *    write_read_       WRITE/READ
 *    result            read data / write value 
 *
 *  Description:
 *    I2C Read/Write using I2C_CSR.
 *  
 *  Return Value:       SUCCESS or FAILURE 
 *    
 =========================================================================*/
UINT32 PspanI2c
  ( 
  PPSPAN pspan,
  UINT32 addr,
  UINT32 data,
  UINT32 dev_code,
  UINT32 chip_select,
  UINT32 write_read_,
  UINT32 *result
  )
  {
  VUINT32 temp;
  UINT32 retval;
  UINT32 write_val;
/* 8260pc */
/*  int i;*/

  retval= SUCCESS;

  /* make sure the I2C interface is not active */
  temp = pspan->i2c_csr;

  if ( ( temp & (I2C_CSR_ACT | I2C_CSR_ERR) ) != 0 )
    {
      DBG0( "ERROR:  I2C_CSR_ACT or I2C_CSR_ERR not cleared\r\n" );
      retval = FAILURE;
    }
  else
    {
    /* I2C interface is free */
    write_val = 0;
    write_val = addr & 0x000000ff;
    write_val = write_val << 8;
    write_val = write_val | (data & 0x000000ff);
    write_val = write_val << 8;
    temp      = (dev_code & 0x0000000f) << 4;
    temp      = temp | ( (chip_select & 0x00000007) << 1 );
    write_val = write_val | (temp & 0x000000ff);
    write_val = write_val << 8;

    if ( write_read_ == WRITE )
      {
      write_val = write_val | I2C_CSR_RW;
      *result = write_val;
      }
      
    pspan->i2c_csr = write_val;

    /* wait until I2C interface is not active */
    temp = 1;
    while ( temp != 0 )
      {
      temp = pspan->i2c_csr;
      temp = temp & I2C_CSR_ACT;
      }

    /* active bit negated - check ERR bit */
    if ( (temp & I2C_CSR_ERR) == I2C_CSR_ERR)
      {
      DBG0( "ERROR:  I2C finished with an error.  ERR bit set.\r\n" );
      retval = FAILURE;
      }
    else
      {
      if ( write_read_ == WRITE )
        retval = SUCCESS;
      else
        {
        temp    = pspan->i2c_csr;
        temp    = temp & I2C_CSR_DATA;
        temp    = temp >> 16;
	*result = temp;
	}
      }
    }

    return ( retval);

  } /* PspanI2c */

/*=========================================================================
 *  Function Name:      PspanI2cWrite
 *
 *  Arguments:
 *    pspan             pointer to PowerSpan register space structure
 *    addr              byte address 
 *    data              data (LSB is taken on writes)
 *    chip_select       3 bit chip select
 *
 *  Description:
 *    I2C Write with the I2C_CSR register.  Device code used is 0xa, the
 *    EEPROM device code.
 *  
 *  Return Value:       SUCCESS/FAILURE
 *    
 =========================================================================*/
UINT32 PspanI2cWrite
  ( 
  PPSPAN pspan,
  UINT32 addr,
  UINT32 data,
  UINT32 chip_select 
  )
  {
  UINT32 retval, write_val;

  retval = PspanI2c( pspan, addr, data, 
			  0xa, chip_select, WRITE, &write_val );

  return ( retval );

  } /* PspanI2cWrite */


/*=========================================================================
 *  Function Name:      PspanI2cRead
 *
 *  Arguments:
 *    pspan             pointer to PowerSpan register space structure
 *    addr              byte address 
 *    chip_select       3 bit chip select
 *    result            read data
 *
 *  Description:
 *    I2C Read with the I2C_CSR register.  Device code used is 0xa, the
 *    EEPROM device code.
 *  
 *  Return Value:      SUCCESS/FAILURE 
 *    
 =========================================================================*/
UINT32 PspanI2cRead
  ( 
  PPSPAN pspan,
  UINT32 addr,
  UINT32 chip_select,
  UINT32 *result
  )
  {
  UINT32 retval;

  retval = PspanI2c( pspan, addr, 0, 
			  0xa, chip_select, READ, result );

  return( retval );

  } /* PspanI2cRead */

/*=========================================================================
 *  Function Name:      PspanVpd
 *
 *  Arguments:
 *    pspan             pointer to PowerSpan register space structure
 *    chip_select       3 bit chip select
 *    vpda              VPD addr (word aligned)
 *    data              pointer to write data or where read data will be 
 *                      returned
 *    read_write_       READ/WRITE
 *
 *  Description:
 *    Perform VPD write/read.  It is the caller's responsiblity to know 
 *    which portion of the EEPROM is read-only and which portion is writable.
 *  
 *  Return Value:       FAILURE/read data (1 word)
 *    
 =========================================================================*/
UINT32 PspanVpd
  ( 
  PPSPAN pspan,
  UINT32 chip_select,
  UINT32 vpda,
  UINT32 *data,
  UINT32 read_write_ 
  )
  {
  UINT32 retval;
  UINT32 bus;
  UINT32 write_data;
  VUINT32 *vpdc_ptr;
  VUINT32 *vpdd_ptr;
  int i;
  
  retval = SUCCESS;

  /* check which bus is VPD on (which bus is primary) */
  bus = ( 0 == (pspan->rst_csr & RST_CSR_PRI_PCI) ) ? PCI1 : PCI2;

  if ( PCI1 == bus )
    {
      vpdc_ptr = &(pspan->p1_cfg.vpdc);
      vpdd_ptr = &(pspan->p1_cfg.vpdd);
    }
  else
    {
      vpdc_ptr = &(pspan->p2_cfg.vpdc);
      vpdd_ptr = &(pspan->p2_cfg.vpdd);
    }

  /* enable VPD */
  pspan->misc_csr = MISC_CSR_VPD_EN | ((chip_select & 0x7 ) << 12);

  if ( WRITE == read_write_ )
    {
      /* Write - F=1 */
      *vpdd_ptr = *data;
      write_data = ((vpda & 0xfc) << 16) | PCI_VPDC_F;
      *vpdc_ptr = write_data;

      /* wait a bit */
      for ( i=0;i<10;i++ );

      if ( 0 == (*vpdc_ptr & PCI_VPDC_F) )
	{
	  retval = FAILURE;
	  DBG0( "ERROR:  VPD Write did not start\r\n" );
	}

      while ( 0 != (*vpdc_ptr & PCI_VPDC_F) );
    }
  else 
    {
      /* Read - F=0 */

    }

  return ( retval );

  } /* PspanVpd */

/*=========================================================================
 *  Function Name:      PspanRegsDump
 *
 *  Arguments:
 *    pspan             pointer to PowerSpan register space structure
 *
 *  Description
 *    Reads all PowerSpan Registers and Output Values to UART with
 *    printf routine.
 *  
 *  Return Value:       SUCCESS/FAILURE
 *    
 =========================================================================*/
UINT32 PspanRegsDump
  ( 
  PPSPAN pspan 
  )
  {
  UINT32 retval;

  retval = SUCCESS;

  printf( "\r\n" );
  printf( "P1_ID         : %08x\r\n", pspan->p1_cfg.id );
  printf( "P1_CSR        : %08x\r\n", pspan->p1_cfg.csr );
  printf( "P1_CLASS      : %08x\r\n", pspan->p1_cfg.pci_class );
  printf( "P1_MISC0      : %08x\r\n", pspan->p1_cfg.misc0 );
  printf( "P1_BSI2O      : %08x\r\n", pspan->p1_cfg.bsi2o );
  printf( "P1_BSREG      : %08x\r\n", pspan->p1_cfg.bsreg );
  printf( "P1_BST0       : %08x\r\n", pspan->p1_cfg.bst[0] );
  printf( "P1_BST1       : %08x\r\n", pspan->p1_cfg.bst[1] );
  printf( "P1_BST2       : %08x\r\n", pspan->p1_cfg.bst[2] );
  printf( "P1_BST3       : %08x\r\n", pspan->p1_cfg.bst[3] );
  printf( "P1_SID        : %08x\r\n", pspan->p1_cfg.sid );
  printf( "P1_CAP        : %08x\r\n", pspan->p1_cfg.cap );
  printf( "P1_MISC1      : %08x\r\n", pspan->p1_cfg.misc1 );
  printf( "P1_HS_CSR     : %08x\r\n", pspan->p1_cfg.hs_csr );
  printf( "P1_VPDC       : %08x\r\n", pspan->p1_cfg.vpdc );
  printf( "P1_VPDD       : %08x\r\n", pspan->p1_cfg.vpdd );
  printf( "P1_TI0_CTL    : %08x\r\n", pspan->p1.ti[0].ctl );
  printf( "P1_TI0_TADDR  : %08x\r\n", pspan->p1.ti[0].taddr );
  printf( "P1_TI1_CTL    : %08x\r\n", pspan->p1.ti[1].ctl );
  printf( "P1_TI1_TADDR  : %08x\r\n", pspan->p1.ti[1].taddr );
  printf( "P1_TI2_CTL    : %08x\r\n", pspan->p1.ti[2].ctl );
  printf( "P1_TI2_TADDR  : %08x\r\n", pspan->p1.ti[2].taddr );
  printf( "P1_TI3_CTL    : %08x\r\n", pspan->p1.ti[3].ctl );
  printf( "P1_TI3_TADDR  : %08x\r\n", pspan->p1.ti[3].taddr );
  printf( "P1_CONF_INFO  : %08x\r\n", pspan->p1.conf_info );
  printf( "P1_ERRCS      : %08x\r\n", pspan->p1.errcs );
  printf( "P1_AERR       : %08x\r\n", pspan->p1.aerr );
  printf( "P1_MISC_CSR   : %08x\r\n", pspan->p1.misc_csr );
  printf( "P1_ARB_CTRL   : %08x\r\n", pspan->p1.arb_ctrl );
  printf( "PB_SI0_CTL    : %08x\r\n", pspan->pb_si[0].ctl );