📄 pspanlib.c
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/***************************************************************************
$Id:$
FILE : pspanLib.c
Purpose : PowerSpan Routines
Author : Wilson Li
Date : 2000.3.17
Modification History:
Date Who What
3/17/00 WLI Initial Implementation
4/10/00 PJG Tundra PowerSpan Evaluation Board Initial Release
**************************************************************************/
#include "stdio.h"
#include "types/vxTypesOld.h"
#include "drv/sio/m8260Cp.h"
#include "pspan.h"
#include "pspanLib.h"
/*=========================================================================
* Function Name: PspanInit
*
* Arguments: void
*
* Description:
* Initializes the PowerSpan PCI Bus Bridge
*
* Return Value: None
*
=========================================================================*/
UINT32 PspanInit(PPSPAN pspan)
{
/* 8260pc */
/* UINT32 temp; */
UINT32 retval;
/*
* Make sure the bus master bits are set.
* If the host hangs, the bus master bits may be disabled.
*
*/
PspanEnablePciMemAccess( pspan );
/* Clear PowerSpan Error Logs and ISR bits */
pspan->isr0 = 0xffffffff;
pspan->isr1 = 0xffffffff;
pspan->p1.errcs = 0x03000000;
pspan->p2.errcs = 0x03000000;
pspan->pb_errcs = 0x03000000;
DBG0( "INFO: Setting PowerSpan Interrupts ...\r\n" );
retval = PspanInterruptsSetup( pspan );
if ( FAILURE == retval )
{
DBG0( "ERROR: PS INT Setup Failed\n\r" );
}
if ( FAILURE != retval )
{
DBG0( "INFO: Setting PowerSpan Images ...\r\n" );
retval = PspanImagesSetup( pspan );
if ( FAILURE == retval )
DBG0( "ERROR: PS Images Setup Failed\n\r" );
}
return (retval);
} /* PspanInit */
/*=========================================================================
* Function Name: PspanPciConfigRead
*
* Arguments:
* pspan pointer to PowerSpan register space structure
* dest destination bus (PCI1/PCI2)
* dev_num PCI device number (0-15)
* reg_offset word offset (0x00-0xfc)
*
* Description:
* Generate a PCI config read cycle from the PowerSpan.
*
* Return Value: FAILURE/read data
*
=========================================================================*/
UINT32 PspanPciConfigRead
(
PPSPAN pspan,
UINT32 dest,
UINT32 dev_num,
UINT32 reg_offset
)
{
UINT32 retval;
UINT32 write_val;
UINT32 temp;
/* write to PB_CONF_INFO */
write_val = 0L;
if ( PCI2 == dest )
write_val = write_val | PB_CONF_INFO_DEST;
write_val = write_val | ( (dev_num << 11) & PB_CONF_INFO_DEV_NUM );
write_val = write_val | ( (reg_offset) & PB_CONF_INFO_REG_NUM );
/* write to PB_CONF_INFO */
pspan->pb_conf_info = write_val;
/* read back value written and compare */
temp = pspan->pb_conf_info;
if ( temp != write_val )
retval = FAILURE;
else
{
/* read from PB_CONF_DATA */
retval = pspan->pb_conf_data;
}
return ( retval );
} /* PspanPciConfigRead */
/*=========================================================================
* Function Name: PspanPciConfigWrite
*
* Arguments:
* pspan pointer to PowerSpan register space structure
* dest destination bus (PCI1/PCI2)
* dev_num PCI device number (0-15)
* reg_offset word offset (0x00-0xfc)
* data write data
*
* Description:
* Generate a PCI config write cycle from the PowerSpan.
*
* Return Value: SUCCESS/FAILURE
*
=========================================================================*/
UINT32 PspanPciConfigWrite
(
PPSPAN pspan,
UINT32 dest,
UINT32 dev_num,
UINT32 reg_offset,
UINT32 data
)
{
UINT32 retval;
UINT32 write_val;
UINT32 temp;
/* write to PB_CONF_INFO */
write_val = 0L;
if ( PCI2 == dest )
write_val = write_val | PB_CONF_INFO_DEST;
write_val = write_val | ( (dev_num << 11) & PB_CONF_INFO_DEV_NUM );
write_val = write_val | ( (reg_offset) & PB_CONF_INFO_REG_NUM );
/* write to PB_CONF_INFO */
pspan->pb_conf_info = write_val;
/* read back value written and compare */
temp = pspan->pb_conf_info;
if ( temp != write_val )
retval = FAILURE;
else
{
/* write to PB_CONF_DATA */
pspan->pb_conf_data = data;
retval = SUCCESS;
}
return ( retval );
} /* PspanPciConfigWrite */
/*=========================================================================
* Function Name: PspanPciProbe
*
* Arguments:
* pspan pointer to PowerSpan register space structure
* dest destination bus (PCI1/PCI2)
*
* Description:
* Probes PCI devices on destination bus. If PowerSpan returns 0xffffffff
* then a master abort occurred and the device does not exist.
*
* Return Value: SUCCESS/FAILURE (failure if no device exist)
*
=========================================================================*/
UINT32 PspanPciProbe
(
PPSPAN pspan,
UINT32 dest
)
{
UINT32 retval;
UINT32 read_val;
UINT32 save_IER1;
int count;
retval = FAILURE;
/* make sure PB_MISC_CSR[MAC_TEA] is set */
read_val = pspan->pb_misc_csr;
pspan->pb_misc_csr = read_val | PB_MISC_CSR_MAC_TEA;
/* save IER1 and disable all error interrupts for now */
save_IER1 = pspan->ier1;
pspan->ier1 = 0x00000000;
for ( count = 0; count < 16; count++ )
{
read_val = PspanPciConfigRead( pspan, dest, count, 0L );
if ( read_val != 0xffffffff )
{
read_val = Swap_Word( read_val );
/* print out read back value */
printf( "PCI %d: Device %X ID = %08X\r\n", dest, count, read_val );
retval = SUCCESS;
}
}
if ( retval == FAILURE )
printf( "PCI %d: No devices found\r\n", dest );
/* clear ISR1 error status bits */
if ( PCI1 == dest )
{
pspan->isr1 = IR1_P1_PB_ERR;
}
else
{
pspan->isr1 = IR1_P2_PB_ERR;
}
/* restore IER1 */
pspan->ier1 = save_IER1;
return ( retval );
} /* PspanPciProbe */
/*=========================================================================
* Function Name: PspanPciFindDevice
*
* Arguments:
* pspan pointer to PowerSpan register space structure
* dest destination bus (PCI1/PCI2)
* starting_dev_num starting device number to search from
* dev_ven_id device and vendor ID
* *dev_num pointer to return device number of device found
*
* Description:
* Searches PCI bus for device.
*
* Return Value: SUCCESS/FAILURE (failure if no device exist)
*
=========================================================================*/
UINT32 PspanPciFindDevice
(
PPSPAN pspan,
UINT32 dest,
UINT32 starting_dev_num,
UINT32 dev_ven_id,
UINT32 *dev_num
)
{
UINT32 retval;
UINT32 read_val;
UINT32 save_IER1;
UINT32 count;
/* default return values */
retval = FAILURE;
*dev_num = 0;
/* make sure PB_MISC_CSR[MAC_TEA] is set */
pspan->pb_misc_csr |= PB_MISC_CSR_MAC_TEA;
/* save IER1 and disable all error interrupts for now */
save_IER1 = pspan->ier1;
pspan->ier1 = 0x00000000;
if ( starting_dev_num >= 16 )
{
retval = FAILURE;
}
else
{
for ( count = starting_dev_num; count < 16; count++ )
{
read_val = PspanPciConfigRead( pspan, dest, count, 0L );
if ( read_val != 0xffffffff &&
Swap_Word( read_val ) == dev_ven_id )
{
/* device found */
*dev_num = count;
retval = SUCCESS;
break;
}
} /* for */
} /* else */
/* clear ISR1 error status bits */
if ( PCI1 == dest )
pspan->isr1 = IR1_P1_PB_ERR;
else
pspan->isr1 = IR1_P2_PB_ERR;
/* restore IER1 */
pspan->ier1 = save_IER1;
return ( retval );
} /* PspanPciFindDevice */
/*=========================================================================
* Function Name: PspanEnablePciMemAccess
*
* Arguments:
* pspan pointer to PowerSpan register space structure
*
* Description:
* Enable PowerSpan PCI memory accesses. Sets P1/P2 BM/MS bits and clears
* lockout bits.
*
* Return Value: SUCCESS/FAILURE
*
=========================================================================*/
UINT32 PspanEnablePciMemAccess
(
PPSPAN pspan
)
{
UINT32 retval;
UINT32 write_val;
retval = SUCCESS;
/* Set PX_CSR[BM] and PX_CSR[MS] bits */
write_val = pspan->p1_cfg.csr;
write_val = write_val | PCI_CSR_BM | PCI_CSR_MS;
pspan->p1_cfg.csr = write_val;
write_val = pspan->p2_cfg.csr;
write_val = write_val | PCI_CSR_BM | PCI_CSR_MS;
pspan->p2_cfg.csr = write_val;
/* Clear Lockout bits */
write_val = pspan->misc_csr;
write_val = write_val | MISC_CSR_P1_LOCKOUT | MISC_CSR_P2_LOCKOUT;
pspan->misc_csr = write_val;
return ( retval );
} /* PspanEnablePciMemAccess */
/*=========================================================================
* Function Name: PspanPbSlaveImageSetup
*
* Arguments:
* pspan pointer to PowerSpan register space structure
* img_num image number (0-7)
* baddr 32 bit base address
* taddr 32 bit translation address
* bs 5 bit block size
* rd_amt 3 bit read amount
*
* (refer to the PowerSpan Registers Spec for descriptions of the bs
* and rd_amt fields)
*
* Description:
* Setup PB Slave Images - Minimum setup to enable a PB slave image.
* Defaults: LE (no swap), Dest=PCI1
*
* Return Value: SUCCESS/FAILURE
*
=========================================================================*/
UINT32 PspanPbSlaveImageSetup
(
PPSPAN pspan,
UINT32 img_num,
UINT32 baddr,
UINT32 taddr,
UINT32 bs,
UINT32 rd_amt
)
{
UINT32 retval;
VUINT32 pb_six_ctl_write_val;
UINT32 temp;
VUINT32 *pb_six_ctl_ptr;
VUINT32 *pb_six_baddr_ptr;
VUINT32 *pb_six_taddr_ptr;
retval = SUCCESS;
pb_six_ctl_write_val = 0L;
pb_six_ctl_write_val = pb_six_ctl_write_val | PB_SI_CTL_IMG_EN;
pb_six_ctl_write_val = pb_six_ctl_write_val | PB_SI_CTL_TA_EN;
temp = bs << 24;
pb_six_ctl_write_val = pb_six_ctl_write_val |
( temp & PB_SI_CTL_BS );
pb_six_ctl_write_val = pb_six_ctl_write_val |
( rd_amt & PB_SI_CTL_RD_AMT );
pb_six_ctl_ptr = &(pspan->pb_si[img_num].ctl);
pb_six_baddr_ptr = &(pspan->pb_si[img_num].baddr);
pb_six_taddr_ptr = &(pspan->pb_si[img_num].taddr);
*pb_six_baddr_ptr = baddr;
*pb_six_ctl_ptr = pb_six_ctl_write_val;
/*
* Don't program the translation address if taddr is 0.
*/
if ( 0 != taddr )
*pb_six_taddr_ptr = taddr & PB_SI_TADDR_TADDR;
temp = *pb_six_ctl_ptr;
/* write failed - read back did not match */
if ( temp != pb_six_ctl_write_val )
retval = FAILURE;
return ( retval );
} /* PspanPbSlaveImageSetup */
/*=========================================================================
* Function Name: PspanPciTargetImageSetup
*
* Arguments:
* pspan pointer to PowerSpan register space structure
* bus PCI1/PCI2
* img_num image number (0-3)
* baddr 32 bit base address
* taddr 32 bit translation address
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