motfccend.h

motorola 8260 CPU上面

#define MOT_FCC_RES_VAL       	0x0000          /* reserved field value */
#define MOT_FCC_FCR_DEF_VAL     M8260_FCR_BO_BE | M8260_FCR_GBL	/* def value for the FCR */
#endif
#if 0
#define MOT_FCC_RIPTR_VAL       0x3000          /* rx FIFO pointer value */
#define MOT_FCC_TIPTR_VAL       0xb000          /* tx FIFO pointer value */
#define MOT_FCC_RES_VAL       	0x0000          /* reserved field value */
#define MOT_FCC_FCR_DEF_VAL     M8260_FCR_BO_BE  /* def value for the FCR */
#endif 

#define MOT_FCC_C_MASK_VAL     	0xdebb20e3      /* recommended value */
#define MOT_FCC_C_PRES_VAL     	0xffffffff      /* recommended value */
#define MOT_FCC_CLEAR_VAL      	0x00000000      /* clear this field */
#define MOT_FCC_RET_LIM_VAL     0xf      	/* recommended value */
#define MOT_FCC_MINFLR_VAL     	0x40      	/* recommended value */
#define MOT_FCC_PAD_VAL       	MOT_FCC_TIPTR_VAL	/* padding value */
#define MOT_FCC_MAXD_VAL     	1520      	/* recommended value */
#define MOT_FCC_DSR_VAL       	0xD555          /* recommended value */
#define MOT_FCC_FCCE_VAL       	0xffff          /* clear all events */

/* rx/tx buffer descriptors definitions */
 
#define MOT_FCC_RBD_SZ          8       /* RBD size in byte */
#define MOT_FCC_TBD_SZ          8       /* TBD size in byte */
#define MOT_FCC_TBD_MIN         6       /* min number of TBDs */
#define MOT_FCC_RBD_MIN         4       /* min number of RBDs */
#define CL_OVERHEAD             4       /* prepended cluster overhead */
#define CL_ALIGNMENT            4       /* cluster required alignment */
#define MBLK_ALIGNMENT          4       /* mBlks required alignment */
#define MOT_FCC_BD_ALIGN        0x8    	/* required alignment for BDs */
#define MOT_FCC_BUF_ALIGN      	0x20   	/* required alignment for data buffer */
#define MOT_FCC_BD_STAT_OFF     0       /* offset of the status word */
#define MOT_FCC_BD_LEN_OFF      2       /* offset of the data length word */
#define MOT_FCC_BD_ADDR_OFF     4       /* offset of the data pointer word */
 
#define MOT_FCC_RBD_ERR         (M8260_FETH_RBD_LG  |                      \
                                 M8260_FETH_RBD_NO  |                      \
                                 M8260_FETH_RBD_SH  |                      \
                                 M8260_FETH_RBD_CR  |                      \
                                 M8260_FETH_RBD_CL  |                      \
                                 M8260_FETH_RBD_OV)
 
/* allowed PHY's speeds */

#define MOT_FCC_100MBS		100000000       /* bits per sec */
#define MOT_FCC_10MBS		10000000        /* bits per sec */

/*
 * user flags: full duplex mode, loopback mode, serial interface etc.
 * the user may configure some of this options according to his needs 
 * by setting the related bits in the <userFlags> field of the load string.
 */
 
#define MOT_FCC_USR_PHY_NO_AN	0x00000001	/* do not auto-negotiate */
#define MOT_FCC_USR_PHY_TBL	0x00000002	/* use negotiation table */
#define MOT_FCC_USR_PHY_NO_FD	0x00000004	/* do not use full duplex */
#define MOT_FCC_USR_PHY_NO_100	0x00000008	/* do not use 100Mbit speed */
#define MOT_FCC_USR_PHY_NO_HD	0x00000010	/* do not use half duplex */
#define MOT_FCC_USR_PHY_NO_10	0x00000020	/* do not use 10Mbit speed */
#define MOT_FCC_USR_PHY_ISO	0x00000100	/* isolate a PHY */
#define MOT_FCC_USR_RMON	0x00000200	/* enable RMON support */
#define MOT_FCC_USR_LOOP	0x00000400	/* external loopback mode */
						/* only use it for testing */
#define MOT_FCC_USR_HBC		0x00000800	/* perform heartbeat control */
#define MOT_FCC_USR_BUF_LBUS	0x00001000	/* buffers are on the local */
						/* bus */
#define MOT_FCC_USR_BD_LBUS	0x00002000	/* BDs are on the local bus */




#define MOT_FCC_TBD_OK		0x1		/* the TBD is a good one */
#define MOT_FCC_TBD_BUSY	0x2		/* the TBD has not been used */
#define MOT_FCC_TBD_ERROR	0x4		/* the TBD is errored */

#define PKT_TYPE_MULTI		0x1	/* packet with a multicast address */
#define PKT_TYPE_UNI		0x2	/* packet with a unicast address */
#define PKT_TYPE_NONE		0x4	/* address type is not meaningful */

#define BUF_TYPE_CL		0x1	/* this's a cluster pointer */
#define BUF_TYPE_MBLK		0x2	/* this's a mblk pointer */

/* frame descriptors definitions */
 
typedef char *			MOT_FCC_BD_ID; 
typedef MOT_FCC_BD_ID	  	MOT_FCC_TBD_ID;
typedef MOT_FCC_BD_ID	  	MOT_FCC_RBD_ID;

/*
 * this table may be customized by the user in configNet.h
 */
 
IMPORT INT16 motFccPhyAnOrderTbl [];

typedef struct mot_fec_tbd_list
    {
    UINT16			fragNum;
    UINT16			pktType;
    UCHAR *			pBuf;
    UINT16			bufType;
    struct mot_fec_tbd_list *	pNext;
    MOT_FCC_TBD_ID		pTbd;
    } MOT_FCC_TBD_LIST;

typedef MOT_FCC_TBD_LIST *	MOT_FCC_TBD_LIST_ID; 

/* The definition of the driver control structure */
 
typedef struct drv_ctrl
    {
    END_OBJ             endObj;         /* base class */
    int                 unit;           /* unit number */
    UINT8		fccNum;		/* FCC being used */
    UINT32              immrVal;  	/* internal RAM base address */
    UINT32              fifoTxBase;     /* address of Tx FIFO in internal RAM */
    UINT32              fifoRxBase;     /* address of Rx FIFO in internal RAM */
    char *              pBufBase;       /* FCC memory pool base */
    ULONG               bufSize;        /* FCC memory pool size */
    char *              pBdBase;        /* FCC BDs base */
    ULONG               bdSize;         /* FCC BDs size */
    UINT16              rbdNum;         /* number of RBDs */
    MOT_FCC_RBD_ID	rbdBase;        /* RBD ring */
    UINT16              rbdIndex;       /* RBD index */
    UINT16              tbdNum;         /* number of TBDs */
    MOT_FCC_TBD_ID      tbdBase;        /* TBD ring */
    UINT16              tbdIndex;       /* TBD index */
    UINT16              usedTbdIndex;   /* used TBD index */
    UINT16              cleanTbdNum;    /* number of clean TBDs */
    BOOL                txStall;        /* tx handler stalled - no Tbd */
    MOT_FCC_TBD_LIST * 	pTbdList [MOT_FCC_TBD_MAX];
					/* list of TBDs */
    ULONG               userFlags;      /* some user flags */
    INT8                flags;          /* driver state */
    BOOL                loaded;         /* interface has been loaded */
    BOOL                intrConnect;    /* interrupt has been connected */
    UINT32		intMask;	/* interrupt mask register */
    UINT32		fccIramAddr;	/* base addr of this fcc */
    UINT32		fccPramAddr;	/* parameter RAM addr of this fcc */
    UCHAR *		pTxPollBuf;	/* cluster pointer for poll mode */
    UCHAR *            	rxBuf[MOT_FCC_RBD_MAX];
                                        /* array of pointers to clusters */
    SEM_ID		graSem;		/* synch semaphore for graceful */
					/* transmit command */
    char *              pClBlkArea;     /* cluster block pointer */
    UINT32              clBlkSize;     	/* clusters block memory size */
    char *              pMBlkArea;     	/* mBlock area pointer */
    UINT32              mBlkSize;     	/* mBlocks area memory size */
    CACHE_FUNCS         bdCacheFuncs;   /* cache descriptor */
    CACHE_FUNCS         bufCacheFuncs;  /* cache descriptor */
    CL_POOL_ID          pClPoolId;      /* cluster pool identifier */
    PHY_INFO		*phyInfo;	/* info on a MII-compliant PHY */
    } DRV_CTRL;

/* Definition of the standard buffer descriptor */
typedef struct buffer_descriptor
{
    VINT16  status;
    UINT16  length;
    char *  address;
} BD;


/* 
 * this cache functions descriptors is used to flush/invalidate
 * the FCC's data buffers. They are set to the system's cache
 * flush and invalidate routine. This will allow proper operation
 * of the driver if data cache are turned on.
 */

IMPORT STATUS   cacheArchInvalidate (CACHE_TYPE, void *, size_t);
 
IMPORT STATUS   cacheArchFlush (CACHE_TYPE, void *, size_t);
 
LOCAL   CACHE_FUNCS     motFccBufCacheFuncs;
#if FALSE
LOCAL	FUNCPTR motFccBufInvRtn = cacheArchInvalidate;
LOCAL	FUNCPTR motFccBufFlushRtn = cacheArchFlush;
#endif /* FALSE */

FUNCPTR _func_motFccIntDisc = NULL;	/* assign a proper disc routine */
IMPORT STATUS	sysFccEnetAddrGet (UINT32 immrVal, UINT8 fccNum, 
				   UCHAR * address);
IMPORT STATUS	sysFccEnetEnable (UINT32 immrVal, UINT8 fccNum);
IMPORT STATUS	sysFccEnetDisable (UINT32 immrVal, UINT8 fccNum);
IMPORT STATUS	sysFccMiiBitWr (UINT32 immrVal, UINT8 fccNum,
				INT32 bit);
IMPORT STATUS	sysFccMiiBitRd (UINT32 immrVal, UINT8 fccNum,
				INT8 * bit);
IMPORT STATUS	miiPhyInit (PHY_INFO * phyInfo);
IMPORT FUNCPTR  _func_motFccPhyInit;
IMPORT FUNCPTR  _func_motFccHbFail;

#ifdef __cplusplus
}
#endif

#endif /* __INCmotFccEndh */