readme.txt

motorola 8260 CPU上面

Modified:

1. BSP version, Ip and ftp server settings in config.h
2. Remove constants of L2 cache controls connected to latch in 8260pc.h
3. Open I-cache in sysLib.c
4. Modify Isolate MII interface routine as Realtek don't support in sysMotFccEnd.c/motFccEnd.c
5. MMU settings in sysLib.c
6. Changed MPTPR from 0x4000 to 0x1900 in romInit.s
7. BR1 changed to 0x04500801 in romInit.s
8. OR1 changed from 0xFFFF8010 to 0xFFFF8C11 (M8260_OR_EHTR_x in m8260Memc.h are wrong) in romInit.s
9. Change BR4 to 0x02001861, OR4 to 0xFF0030C0 in romInit.s
10. OR0 changed to 0xFFE00836 in romInit.s
11. Change LSDMR to 0xC266A552 in romInit.s
12. Initialize Local bus SDRAM in config.h/8260pc.h 
13. Change Page Table Entry for Local SDRAM in sysLib.c
14. Add enable ethernet function in syslib.c
15. Change crystal frequency to 66MHz in config.h
16. Modify control LED functions in syslib.c
17. Cut SCC2 UART in 8260pc.h/m8260Sio.c/sysSerial.c
18. Cut BCSR, replace with latch in 8260pc.h
19. Set PC8 for ethernet enable  in sysLib.c
*20. Change PB31 from FETHTXER to optional ethernet reset (need to be tested in application s/w)
*21. Change for PowerPC trademark (Required to change the contents in /all directory?)
*22. Set PC15 for CTS (need to be tested in application s/w)
23. Resolve warnings when build
24. Use optional FCC3 for Ethernet in sysLib.c
25. Enable data cache, move FCC BD to local bus, bd_base=0x02000000, bd_size=0x500 in motFccEnd.h/motFccEnd.c