smc_dtc_erase256_2k_fsm.hex

HID-Ukey底层源码实现（st72651芯片） windows上层驱动

 ; *****************************************************************
 ; * NOTICE: The information contained in this file is proprietary *
 ; * to SGS-THOMSON Microelectronics and is being made available   *
 ; * to ST customers under strict non-disclosure agreements.       *
 ; * Use or disclosure of this information is permissible only     *
 ; * under the terms of the existing non-disclosure agreement.     *
 ; *****************************************************************

 ; Written by Christophe BRICOUT
 ; Created by MPmanCompiler.exe (v3.0) Thu Oct 13 12:11:14 2005


  
 0xa1,   ;   0 LD	MSB 1		; data_flash port = output,removed for 256mb
 0xb9,   ;   1 LD	LSB 9		; DATA_FLASH Port driven by FCI  
 0x8d,   ;   2 LD	CTRL_FCI	; PARALLEL Port driven by FCI
  
 0xa0,   ;   3 LD	MSB 0
 0xbf,   ;   4 LD	LSB 15
 0x91,   ;   5 LD	DDR_PARALLEL	; PA3-0 as output, PA7-4 as input
 0x92,   ;   6 LD	OR_PARALLEL	; PA3=/RD, PA2=ALE, PA1=/WE, PA0=CLE
  
 0xaf,   ;   7 LD	MSB 15
 0x83,   ;   8 LD	MASK
 0x31,   ;   9 XOR
  
 ;      LD	MSB 0
 ;      LD	LSB 0
 0x85,   ;   a LD	ADR_BUFFER01	; clear the high byte of ADR0
  
 0xb1,   ;   b LD	LSB 1
 0x81,   ;   c LD	X		; X = 1
  
 0xba,   ;   d LD	LSB 10
 0x90,   ;   e LD	DR_PARALLEL	; RD = 1; ALE = 0; WE = 1; CLE = 0
  
 ;============================================================================
 0xa6,   ;   f LD	MSB 6
 0xb0,   ;  10 LD	LSB 0		; Load "Block Erase" cmd: 0x60
 0x8c,   ;  11 LD	DATA_FLASH	; Send the first command. It is 0x80 or 0x60
  
 0xbb,   ;  12 LD	LSB 11
 0x90,   ;  13 LD	DR_PARALLEL	; RD = 1, ALE = 0, WE = 1, CLE = 1
  
 0xb9,   ;  14 LD	LSB 9
 0x90,   ;  15 LD	DR_PARALLEL	; RD = 1, ALE = 0, WE = 0, CLE = 1
  
 0xbb,   ;  16 LD	LSB 11
 0x90,   ;  17 LD	DR_PARALLEL	; RD = 1, ALE = 0, WE = 1, CLE = 1
  
 0xba,   ;  18 LD	LSB 10
 0x90,   ;  19 LD	DR_PARALLEL	; RD = 1, ALE = 0, WE = 1, CLE = 0
  
 ;============================================================================
 ;; Finish output a command, set CLE low.
 ;; Going to output the address, set ALE high
 0xbe,   ;  1a LD	LSB 14
 0x90,   ;  1b LD	DR_PARALLEL	; RD = 1, ALE = 0, WE = 1, CLE = 0
  
 0xae,   ;  1c LD	MSB 14
 0xb5,   ;  1d LD	LSB 5
 0x84,   ;  1e LD	ADR_BUFFER00	; ADR0 = 0x00E6; points to "Num of address"
  
 0xa0,   ;  1f LD	MSB 0
 0xb2,   ;  20 LD	LSB 2		; Load "Block Erase" cmd: 0x60
 0x82,   ;  21 LD	Y		; Load number of addres bytes
  
 ; :Send_Address_Bytes
 ;------------------
 0xdb,   ;  22 LD	A DATA_BUFFER0
 0x26,   ;  23 SUB16	ADR_BUFFER0
 0x8c,   ;  24 LD	DATA_FLASH	; Send the address byte
 0xbc,   ;  25 LD	LSB 12
 0x90,   ;  26 LD	DR_PARALLEL	; RD = 1, ALE = 1, WE = 0, CLE = 0
 0xbe,   ;  27 LD	LSB 14
 0x90,   ;  28 LD	DR_PARALLEL	; RD = 1, ALE = 1, WE = 1, CLE = 0
 0x3c,   ;  29 DECY
 ; JP :Send_Address_Bytes
 0x68,   ;  2a JP  -8
  
 0xba,   ;  2b LD	LSB 10
 0x90,   ;  2c LD	DR_PARALLEL	; RD = 1, ALE = 0, WE = 1, CLE = 0
  
 ;============================================================================
 0xad,   ;  2d LD	MSB 13		; Send the "Block Erase" command - 0xD0
 0xb0,   ;  2e LD	LSB 0
 0x8c,   ;  2f LD	DATA_FLASH
 0xbb,   ;  30 LD	LSB 11
 0x90,   ;  31 LD	DR_PARALLEL	; RD = 1, ALE = 0, WE = 1, CLE = 1
 0xb9,   ;  32 LD	LSB 9
 0x90,   ;  33 LD	DR_PARALLEL	; RD = 1, ALE = 0, WE = 0, CLE = 1
 0xbb,   ;  34 LD	LSB 11
 0x90,   ;  35 LD	DR_PARALLEL	; RD = 1, ALE = 0, WE = 1, CLE = 1
  
 0xba,   ;  36 LD	LSB 10
 0x90,   ;  37 LD	DR_PARALLEL	; RD = 1, ALE = 0, WE = 1, CLE = 0,
  
 ;============================================================================
 ;; Wait on busy line
 ;============================================================================
 ; :Wait_On_Busy
 0xd0,   ;  38 LD	A DR_PARALLEL
 0x33,   ;  39 EXCHANGE
 0x28,   ;  3a BCLR1			; Test R/-B line
 ; JP :Wait_On_Busy
 0x63,   ;  3b JP  -3
  
 ;============================================================================
 ;; Read the status byte
 0xa7,   ;  3c LD	MSB 7
 0xb0,   ;  3d LD	LSB 0
 0x8c,   ;  3e LD	DATA_FLASH	; Send "Status Read" command
  
 0xbb,   ;  3f LD	LSB 11
 0x90,   ;  40 LD	DR_PARALLEL	; RD = 1, ALE = 0, WE = 0, CLE = 1
 0xb9,   ;  41 LD	LSB 9
 0x90,   ;  42 LD	DR_PARALLEL	; RD = 1, ALE = 0, WE = 0, CLE = 1
 0xbb,   ;  43 LD	LSB 11
 0x90,   ;  44 LD	DR_PARALLEL	; RD = 1, ALE = 0, WE = 1, CLE = 1
 0xba,   ;  45 LD	LSB 10
 0x90,   ;  46 LD	DR_PARALLEL	; RD = 1, ALE = 0, WE = 1, CLE = 0
  
 0xa0,   ;  47 LD	MSB 0		; DATA_FLASH port = input
 0xb9,   ;  48 LD	LSB 9		; DATA_FLASH Port driven by FCI
 0x8d,   ;  49 LD	CTRL_FCI	; PARALLEL Port driven by FCI
  
 0xb2,   ;  4a LD	LSB 2
 0x90,   ;  4b LD	DR_PARALLEL	; WE = 1, CLE = 0, ALE = 0, RD = 0
  
 0xba,   ;  4c LD	LSB 10
 0x90,   ;  4d LD	DR_PARALLEL	; WE = 1, CLE = 0, ALE = 0, RD = 1
  
 0xcc,   ;  4e LD	A DATA_FLASH	; Get the status byte
 0x28,   ;  4f BCLR1
 ; JP :Status_Good
 0x42,   ;  50 JP  2
 ;;; Status "FAIL" Stop the DTC
 0x7,   ;  51 STATUS ERROR STOP
 ;============================================================================
 ; :Status_Good
 ;-----------
 0x5,   ;  52 STATUS	STOP		; Return if it is a BLOCK_ERASE