smc_dtc_format256_end.hex

HID-Ukey底层源码实现（st72651芯片） windows上层驱动

 // *****************************************************************
 // * NOTICE: The information contained in this file is proprietary *
 // * to SGS-THOMSON Microelectronics and is being made available   *
 // * to ST customers under strict non-disclosure agreements.       *
 // * Use or disclosure of this information is permissible only     *
 // * under the terms of the existing non-disclosure agreement.     *
 // *****************************************************************

 // Written by Christophe BRICOUT
 // Created by MPmanCompiler.exe (v3.0) Sun Oct 09 11:14:07 2005


 //===================================================================
 //			SMART MEDIA CARD
 //===================================================================
  
 //---------------
 // smc_dtc_format
 //---------------
  
 // Check spare area
 //	call send_cmd_address with CMD 0x50 & 0x00
 //	call init_read_spare without any param
 //		on error, goto next cluster
 // Erase the cluster
 //	call send_cmd_address with CMD 0x60 & 0xD0
 //	call read_status without any param
 //		on error, mark this cluster as bad and goto next cluster
 // Write all 0's to the cluster
 //	call send_cmd_00 without any param
 //	call write_zero_to_all_pages with CMD 0x80 & 0x10
 // Read all 0's
 //	call send_cmd_address with CMD 0x00 & 0x40
 //		on error, mark this cluster as bad and goto next cluster
 //	call read_check_cluster without any param
 //		on error, mark this cluster as bad and goto next cluster
 // Erase the cluster
 //	call send_cmd_address with CMD 0x60 & 0xD0
 //	call read_status without any param
 //		on error, mark this cluster as bad and goto next cluster
  
 //for 256MB
 //------------
  
 // :clear_cluster_pages
 //-------------------
  
 0xae,   //   0 LD	MSB 14
 0xb3,   //   1 LD	LSB 3
 0x84,   //   2 LD	ADR_BUFFER00	// buffer pointer 0 = 0x00E3
 0xdb,   //   3 LD	A DATA_BUFFER0
 0x2,   //   4 CLC
 0x25,   //   5 ADDER8	X		// increase the page address
 0x9b,   //   6 LD	DATA_BUFFER0	// and save it
  
 0xaf,   //   7 LD	MSB 15
 0xbf,   //   8 LD	LSB 15
 0x84,   //   9 LD	ADR_BUFFER00
 0xdb,   //   a LD	A DATA_BUFFER0
 0x2,   //   b CLC
 0x24,   //   c SUB8	X
 0x9b,   //   d LD	DATA_BUFFER0
 0x8,   //   e CP	A=>X		// check the page counter
 // JP :chk_cmd
 0x42,   //   f JP  2
  
 // :time_to_go_home
 //--------------- On this point:
  
 0x5,   //  10 STATUS	STOP
  
 // :chk_cmd
 //--------
 0xca,   //  11 LD	A CMP10
 0x33,   //  12 EXCHANGE			//write 2nd cmd is 0x10 and read 2nd cmd is 0x30
 0x29,   //  13 BCLR2
 // JP :save_page_counter
 0x44,   //  14 JP  4
  
 //     LD	MSB 10
 //     LD	LSB 10		//branch to next read page operation
 //     BRANCH :loop_read_all_pages
 // JP :time_to_go_home
 0x65,   //  15 JP  -5
  
  
 //entry point for read spare area and read all zeros
 //---------------------------------------------------
 0xa0,   //  16 LD	MSB 0		//<<entry point for read and check spare
 //      CP	ALWAYS
 // JP :load_cmd_read_spare1
 0x47,   //  17 JP  7
  
 //      LD	MSB 15		//<<entry point for write
 //      LD	LSB 15
 //      LD	ADR_BUFFER00
 //      LD	A DATA_BUFFER0	//commented because CMP00 is used below
  
 // :save_page_counter
 //------------------
 //      LD	CMP00
 0xa8,   //  18 LD	MSB 8
 0xb0,   //  19 LD	LSB 0
 0x8b,   //  1a LD	CMP11
 0xa1,   //  1b LD	MSB 1
 0xb,   //  1c CP	ALWAYS
 // JP :load_cmd_2
 0x49,   //  1d JP  9
  
 // :load_cmd_read_spare1
 0xb0,   //  1e LD	LSB 0
 0x8b,   //  1f LD	CMP11
 0xa3,   //  20 LD	MSB 3
 //      CP	ALWAYS		//commented for 2.1 version
 // JP :load_cmd_2
 0x45,   //  21 JP  5
  
 0xa6,   //  22 LD	MSB 6		// <<entry point for erase
 0xb0,   //  23 LD	LSB 0
 0x8b,   //  24 LD	CMP11
 0xad,   //  25 LD	MSB 13
  
 // :load_cmd_2
 0x8a,   //  26 LD	CMP10
  
 // :send_address
 0xa0,   //  27 LD	MSB 0
 0x85,   //  28 LD	ADR_BUFFER01	// clear the high byte of the pointer 0
 0xb1,   //  29 LD	LSB 1
 0x81,   //  2a LD	X		// X = 1
 0xae,   //  2b LD	MSB 14
 0xb6,   //  2c LD	LSB 6
 0x84,   //  2d LD	ADR_BUFFER00	// buffer pointer 0 = 0x00E6
  
 // :save_addr_bytes
 //-----------------
 0xdb,   //  2e LD	A DATA_BUFFER0
 0x26,   //  2f SUB16	ADR_BUFFER0
 0x82,   //  30 LD	Y		// Load number of addres bytes
 0x3c,   //  31 DECY
  
 0xa1,   //  32 LD	MSB 1		//data_flash port = output
 0xb9,   //  33 LD	LSB 9		//DATA_FLASH Port driven by FCI  
 0x8d,   //  34 LD	CTRL_FCI	//PARALLEL Port driven by FCI
  
 0xcb,   //  35 LD	A CMP11		// get the 1st command
  
 // :send_cmd
 //---------
 0x8c,   //  36 LD	DATA_FLASH	// output the command
  
 0xa0,   //  37 LD	MSB 0
 0xba,   //  38 LD	LSB 10
 0x90,   //  39 LD	DR_PARALLEL	// WE = 1, CLE = 0
 0xbb,   //  3a LD	LSB 11
 0x90,   //  3b LD	DR_PARALLEL	// WE = 1, CLE = 1
 0xb9,   //  3c LD	LSB 9
 0x90,   //  3d LD	DR_PARALLEL	// WE = 0, CLE = 1
 0xbb,   //  3e LD	LSB 11
 0x90,   //  3f LD	DR_PARALLEL	// WE = 1, CLE = 1
 0xba,   //  40 LD	LSB 10
 0x90,   //  41 LD	DR_PARALLEL	// WE = 1, CLE = 0
  
 //      INCY
 //      LD A Y
 //      CP A=>X
 //      JP :latch_address
  
 //      CP ALWAYS
 //      JP :end_of_second_cmd
  
 // :latch_address
 //// Send two byte less if this is an erase operation
 //      DECY			//added for 2 cmd send
 0xca,   //  42 LD	A CMP10
 0x33,   //  43 EXCHANGE
 0x2b,   //  44 BCLR4
 // JP :Prepare_Send_Address_Bytes
 0x43,   //  45 JP  3
 0x3c,   //  46 DECY			//added for 256mb
 0x3c,   //  47 DECY
 // :Prepare_Send_Address_Bytes
 0xbe,   //  48 LD	LSB 14
 0x90,   //  49 LD	DR_PARALLEL	// WE = 1, ALE = 1
 // :Send_Address_Bytes
 //------------------
 0xdb,   //  4a LD	A DATA_BUFFER0
 0x26,   //  4b SUB16	ADR_BUFFER0
 0x8c,   //  4c LD	DATA_FLASH	// Send the address byte
 0xbc,   //  4d LD	LSB 12
 0x90,   //  4e LD	DR_PARALLEL	// WE = 0, ALE = 1
 0xbe,   //  4f LD	LSB 14
 0x90,   //  50 LD	DR_PARALLEL	// WE = 1, ALE = 1
 // :Next_Address_Byte
 //-----------------
 0x3c,   //  51 DECY
 // JP :Send_Address_Bytes
 0x68,   //  52 JP  -8
  
 0xba,   //  53 LD	LSB 10
 0x90,   //  54 LD	DR_PARALLEL	// WE = 1, CLE = 0, ALE = 0, RD = 1
  
 0xca,   //  55 LD	A CMP10		//if it is a write cmd
 0x33,   //  56 EXCHANGE
 0x29,   //  57 BCLR2
 // JP :chk_first_cmd
 0x45,   //  58 JP  5
  
 // :send_nxt_read_cmd
 //------------------
 0xca,   //  59 LD	A CMP10
 0xb,   //  5a CP	ALWAYS
 // JP :send_cmd2
 0x58,   //  5b JP  24
  
 // :end_of_second_cmd
 //------------------
 0x5,   //  5c STATUS STOP
  
 // :chk_first_cmd
 //--------------
 0xcb,   //  5d LD	A CMP11
 0x33,   //  5e EXCHANGE
 0x2b,   //  5f BCLR4
 // JP :end_of_second_cmd
 0x64,   //  60 JP  -4
  
 // :write_all_zeros
 //---------------
 0xa4,   //  61 LD	MSB 4
 0xb0,   //  62 LD	LSB 0
 0x88,   //  63 LD	CMP00		// CMP0 = 0x0840// CMP10 is the 2nd CMD
  
 0xa0,   //  64 LD	MSB 0
 0x84,   //  65 LD	ADR_BUFFER00	// buffer pointer 0 = 0x0000
 0x87,   //  66 LD	ADR_BUFFER11
  
 0xb8,   //  67 LD	LSB 8
 0x89,   //  68 LD	CMP01
  
 // :loop_write_zeros
 0xb0,   //  69 LD	LSB 0
 0x8c,   //  6a LD	DATA_FLASH
 0xb8,   //  6b LD	LSB 8
 0x90,   //  6c LD	DR_PARALLEL	// WE = 0
 0xba,   //  6d LD	LSB 10
 0x90,   //  6e LD	DR_PARALLEL	// WE = 1
 0x27,   //  6f ADDER16	ADR_BUFFER0
 0xd,   //  70 CP	ADR_BUFFER0<CMP0
 // JP :loop_write_zeros
 0x68,   //  71 JP  -8
  
 //      SUB16 ADR_BUFFER0
 //      LD ADR_BUFFER00		//point to 0xe0
  
 //      LD A DATA_BUFFER0
 //      LD DATA_BUFFER0
 //      LD CMP00
  
 // :send_write_erase_cmd
 0xca,   //  72 LD	A CMP10		// get the 2nd CMD
  
 // :send_cmd2