smc_dtc_download_end.hex

HID-Ukey底层源码实现（st72651芯片） windows上层驱动

 // *****************************************************************
 // * NOTICE: The information contained in this file is proprietary *
 // * to SGS-THOMSON Microelectronics and is being made available   *
 // * to ST customers under strict non-disclosure agreements.       *
 // * Use or disclosure of this information is permissible only     *
 // * under the terms of the existing non-disclosure agreement.     *
 // *****************************************************************

 // Written by Christophe BRICOUT
 // Created by MPmanCompiler.exe (v3.0) Thu Apr 18 18:54:51 2002


 //============================================================================
 //
 //			SMC DOWNLOAD Plugin
 //
 //============================================================================
 ////
 ////	For Download:
 ////  0xE6: Number of address bytes// 3 or 4
 ////  0xE5-0xE2: CA0-7, PA0-7, PA8-15, [PA16-23]
 ////  0xE0: Page counter. Number of pages to be download
 ////  0xF0-0xFF: For the redundant area
 ////
 ////	For Erase one block
 ////  0xE6: Number of address bytes// 2 or 3
 ////  0xE5-0xE3: PA0-7, PA8-15, [PA16-23]
 ////
 //============================================================================
  
 //-------------			<<<<<< Entry point for download from buffer0
 0xb1,   //   0 LD	LSB 1
 // :Init_Download
 //-------------
 0xa0,   //   1 LD	MSB 0
 0x87,   //   2 LD	ADR_BUFFER11
 0xa8,   //   3 LD	MSB 8
 0xb,   //   4 CP	ALWAYS
 // JP :Init_Registers
 0x48,   //   5 JP  8
 //-------------			<<<<<< Entry point for download from buffer1
 0xb3,   //   6 LD	LSB 3
 0xb,   //   7 CP	ALWAYS
 // JP :Init_Download
 0x67,   //   8 JP  -7
  
 //-------------			<<<<<< Entry point for block erase
 0xa0,   //   9 LD	MSB 0
 0xb0,   //   a LD	LSB 0
 0x87,   //   b LD	ADR_BUFFER11
 0xa6,   //   c LD	MSB 6
  
 // :Init_Registers
 //--------------
 0xb0,   //   d LD	LSB 0
 0x8b,   //   e LD	CMP11
  
 0xa1,   //   f LD	MSB 1		// data_flash port = output
 0xb9,   //  10 LD	LSB 9		// DATA_FLASH Port driven by FCI  
 0x8d,   //  11 LD	CTRL_FCI	// PARALLEL Port driven by FCI
  
 0xa0,   //  12 LD	MSB 0
 0xbf,   //  13 LD	LSB 15
 0x91,   //  14 LD	DDR_PARALLEL	// PA3-0 as output, PA7-4 as input
 0x92,   //  15 LD	OR_PARALLEL	// PA3=/RD, PA2=ALE, PA1=/WE, PA0=CLE
  
 0xaf,   //  16 LD	MSB 15
 0x83,   //  17 LD	MASK
 0x31,   //  18 XOR
  
 0x85,   //  19 LD	ADR_BUFFER01	// clear the high byte of ADR0
 0x86,   //  1a LD	ADR_BUFFER10	// clear the low byte of ADR1
 0x89,   //  1b LD	CMP01
 0x9f,   //  1c LD	BUFFER_MNGT	// Clear segment pointer for calculate PARITY
  
 0xb1,   //  1d LD	LSB 1
 0x81,   //  1e LD	X		// X = 1
 0x88,   //  1f LD	CMP00		// Set CMP0=0x0001 for timeout control on busy
  
 0xba,   //  20 LD	LSB 10
 0x90,   //  21 LD	DR_PARALLEL	// RD = 1// ALE = 0// WE = 1// CLE = 0
  
 //============================================================================
 //// The buffer flag is in ADR_BUFFER11
 //// 0x01: write to buf0
 //// 0x03: write to buf1
 //// 0x00: erase operation
 //============================================================================
 0xc7,   //  22 LD	A ADR_BUFFER11
 0x28,   //  23 BCLR1			// Skip send "Sequential Read" CMD on Erasing
 0xb0,   //  24 LD	LSB 0		// A=0// This is "Sequential Read" command
 // JP :Loop_Write_Pages
 0x5e,   //  25 JP  30
  
 //============================================================================
 ////// Output the sequential read command (0x00)
 0x8c,   //  26 LD	DATA_FLASH	// Send "Sequential Read" command
  
 ////// Preset the "Reserved Field", "Data Status Field" & "Block Status Byte"
 0xaf,   //  27 LD	MSB 15
 0x84,   //  28 LD	ADR_BUFFER00	// ADR0 points to spare area
 0xba,   //  29 LD	LSB 10
 0x82,   //  2a LD	Y		// Used to count 6 time of ADR0 pointer
 0xc3,   //  2b LD	A MASK
 // :Preset_0xFF
 //-----------
 0x9b,   //  2c LD	DATA_BUFFER0
 0x27,   //  2d ADDER16	ADR_BUFFER0
 0x3d,   //  2e INCY
 // JR :Preset_0xFF
 0x63,   //  2f JP  -3
  
 0xaf,   //  30 LD	MSB 15
 0xbc,   //  31 LD	LSB 12
 0x82,   //  32 LD	Y		// Y points to low byte of Address Field-2
  
 ////// Calculate the parity bit of the address fields
 ////// Since ST7 is too slow to do this job, let DTC do it!!
 0xdb,   //  33 LD	A DATA_BUFFER0
 0x27,   //  34 ADDER16	ADR_BUFFER0
 0x1,   //  35 SEC
 0x31,   //  36 XOR
 0xdb,   //  37 LD	A DATA_BUFFER0
 0x31,   //  38 XOR
 0xa,   //  39 CP	CARRY
 // JP :Set_Parity_Done
 0x45,   //  3a JP  5
 0x31,   //  3b XOR
 0x38,   //  3c BSET1			// Set the parity bit
 0x9b,   //  3d LD	DATA_BUFFER0	// Update parity bit of Address-Field 1
 0x80,   //  3e LD	<Y>		// Update parity bit of Address-Field 2
 // :Set_Parity_Done
 //---------------
 0xbb,   //  3f LD	LSB 11
 0x90,   //  40 LD	DR_PARALLEL	// WE = 1, CLE = 1
 0xb9,   //  41 LD	LSB 9
 0x90,   //  42 LD	DR_PARALLEL	// WE = 0, CLE = 1
  
 // :Loop_Write_Pages
 //----------------
 0xbb,   //  43 LD	LSB 11
 0x90,   //  44 LD	DR_PARALLEL	// WE = 1, CLE = 1, ALE = 0, RD = 1
 ////    LD	LSB 10
 ////    LD	DR_PARALLEL	// WE = 1, CLE = 0, ALE = 0, RD = 1
 //// Keep CLE as high to output "Data Input" or "Block Erase" command
 //============================================================================
  
 0xa1,   //  45 LD	MSB 1		// data_flash port = output
 0xb9,   //  46 LD	LSB 9		// DATA_FLASH Port driven by FCI  
 0x8d,   //  47 LD	CTRL_FCI	// PARALLEL Port driven by FCI
  
 0xcb,   //  48 LD	A CMP11		// Load "Data Input" or "Block Erase" cmd
 0x8c,   //  49 LD	DATA_FLASH	// Send the first command. It is 0x80 or 0x60
 0xb9,   //  4a LD	LSB 9
 0x90,   //  4b LD	DR_PARALLEL	// WE = 0, CLE = 1
 0xbb,   //  4c LD	LSB 11
 0x90,   //  4d LD	DR_PARALLEL	// WE = 1, CLE = 1
  
 //============================================================================
 //// Finish output a command, set CLE low.
 //// Going to output the address, set ALE high
 0xbe,   //  4e LD	LSB 14
 0x90,   //  4f LD	DR_PARALLEL	// WE = 1, CLE = 0, ALE = 1, RD = 1
  
 0xae,   //  50 LD	MSB 14
 0xb6,   //  51 LD	LSB 6
 0x84,   //  52 LD	ADR_BUFFER00	// ADR0 = 0x00E6// points to "Num of address"
  
 0xdb,   //  53 LD	A DATA_BUFFER0
 0x26,   //  54 SUB16	ADR_BUFFER0
 0x82,   //  55 LD	Y		// Load number of addres bytes
 0x3c,   //  56 DECY
  
 //// Send one byte less if this is an erase operation
 0xc7,   //  57 LD	A ADR_BUFFER11
 0x28,   //  58 BCLR1
 // JP :Next_Address_Byte
 0x48,   //  59 JP  8
  
 // :Send_Address_Bytes
 //------------------
 0xdb,   //  5a LD	A DATA_BUFFER0
 0x26,   //  5b SUB16	ADR_BUFFER0
 0x8c,   //  5c LD	DATA_FLASH	// Send the address byte
 0xbc,   //  5d LD	LSB 12
 0x90,   //  5e LD	DR_PARALLEL	// WE = 0, ALE = 1
 0xbe,   //  5f LD	LSB 14
 0x90,   //  60 LD	DR_PARALLEL	// WE = 1, ALE = 1
 // :Next_Address_Byte
 //-----------------
 0x3c,   //  61 DECY
 // JP :Send_Address_Bytes
 0x68,   //  62 JP  -8
  
 0xba,   //  63 LD	LSB 10
 0x90,   //  64 LD	DR_PARALLEL	// WE = 1, CLE = 0, ALE = 0, RD = 1
  
 //============================================================================
  
 0xc7,   //  65 LD	A ADR_BUFFER11	// Load the operation flag
 0x28,   //  66 BCLR1			// It is 0001 or 0011 or 0000
 0xaa,   //  67 LD	MSB 10
 0xb5,   //  68 LD	LSB 5
 0x60,   //  69 BRANCH :Send_Erase_CMD
  
 //============================================================================
 0x3d,   //  6a INCY			// Now Y=0
  
 //--------------			// Reset the ECC machine first
 0xa3,   //  6b LD	MSB 3		// Reset ECC machine, DATA_FLASH port = output
 0xb9,   //  6c LD	LSB 9		// DATA_FLASH Port driven by FCI  
 0x8d,   //  6d LD	CTRL_FCI	// PARALLEL Port driven by FCI
  
 0xaf,   //  6e LD	MSB 15
 0xbd,   //  6f LD	LSB 13
 0x84,   //  70 LD	ADR_BUFFER00	// Load pointer of ECC1 (0x00FD)
  
 //============================================================================
 //// Wait on one of the buffer full
 0xc7,   //  71 LD	A ADR_BUFFER11
 0x39,   //  72 BSET2
 // JP :Wait_Buffer1_Full
 0x45,   //  73 JP  5
 // :Wait_Buffer0_Full
 //-----------------
 0xdf,   //  74 LD	A BUFFER_MNGT
 0x2a,   //  75 BCLR3
 // JP :Wait_Buffer0_Full
 0x62,   //  76 JP  -2
 // JP :Write_256_Bytes
 0x44,   //  77 JP  4
 // :Wait_Buffer1_Full
 //-----------------
 0xdf,   //  78 LD	A BUFFER_MNGT
 0x2b,   //  79 BCLR4
 // JP :Wait_Buffer1_Full
 0x62,   //  7a JP  -2
  
 //============================================================================
 // :Write_256_Bytes
 //---------------
 0xdc,   //  7b LD	A DATA_BUFFER1
 0x8c,   //  7c LD	DATA_FLASH
 0x9d,   //  7d LD	ECC_CRC
 0xdd,   //  7e LD	A ECC_CRC	// AUTO UPDATE OF Line PARITY 1
 0xdd,   //  7f LD	A ECC_CRC	// AUTO UPDATE OF Line PARITY 2
 0xdd,   //  80 LD	A ECC_CRC	// AUTO UPDATE OF column PARITY
  
 0xb8,   //  81 LD	LSB 8
 0x90,   //  82 LD	DR_PARALLEL	// WE = 0
 0xba,   //  83 LD	LSB 10
 0x90,   //  84 LD	DR_PARALLEL	// WE = 1
  
 0x2f,   //  85 ADDER16	ADR_BUFFER1
 0x3d,   //  86 INCY
 // JP :Write_256_Bytes
 0x6c,   //  87 JP  -12
  
 // Save the ECC code
 //------------------
 0xde,   //  88 LD	A TMP_ECC	// first read (Line parity 1)
 0x9b,   //  89 LD	DATA_BUFFER0
 0xdd,   //  8a LD	A ECC_CRC	// -- INCR CRC_ECC_STATE --
 0x27,   //  8b ADDER16	ADR_BUFFER0
  
 0xde,   //  8c LD	A TMP_ECC	// second read (Line parity 2)
 0x9b,   //  8d LD	DATA_BUFFER0
 0xdd,   //  8e LD	A ECC_CRC	// -- INCR CRC_ECC_STATE --
 0x27,   //  8f ADDER16	ADR_BUFFER0
  
 0xde,   //  90 LD	A TMP_ECC	// third read ( column parity)
 0x9b,   //  91 LD	DATA_BUFFER0
  
 0xaf,   //  92 LD	MSB 15
 0xb8,   //  93 LD	LSB 8
 0x84,   //  94 LD	ADR_BUFFER00	// Load pointer of ECC2 (0x00F8)
  
 0xc7,   //  95 LD	A ADR_BUFFER11	// Write buf0: 0001=>0010, =>0011
  
 0x28,   //  96 BCLR1
 // JP :Write_256_Bytes
 0x7c,   //  97 JP  -28
  
 //============================================================================
 //// Write 16 bytes of the redundant area
 0xaf,   //  98 LD	MSB 15
 0xb0,   //  99 LD	LSB 0
 0x82,   //  9a LD	Y		// Y = 0xF0// pointer of redundant area (0x00F0)
  
 // :Write_Spare_Area
 //----------------
 0xc0,   //  9b LD	A <Y>
 0x8c,   //  9c LD	DATA_FLASH
  
 0xb8,   //  9d LD	LSB 8
 0x90,   //  9e LD	DR_PARALLEL	// WE = 0
 0xba,   //  9f LD	LSB 10
 0x90,   //  a0 LD	DR_PARALLEL	// WE = 1
  
 0x3d,   //  a1 INCY
 // JP :Write_Spare_Area
 0x67,   //  a2 JP  -7
  
 //============================================================================
 0xa1,   //  a3 LD	MSB 1		// Send the "Page Program" command - 0x10
 // JP :Send_CMD2
 0x42,   //  a4 JP  2
  
 // :Send_Erase_CMD
 //--------------
 0xad,   //  a5 LD	MSB 13		// Send the "Block Erase" command - 0xD0
 // :Send_CMD2
 //---------
 0xb0,   //  a6 LD	LSB 0
 0x8c,   //  a7 LD	DATA_FLASH
 0xbb,   //  a8 LD	LSB 11
 0x90,   //  a9 LD	DR_PARALLEL	// WE = 1, CLE = 1
 0xb9,   //  aa LD	LSB 9
 0x90,   //  ab LD	DR_PARALLEL	// WE = 0, CLE = 1
 0xbb,   //  ac LD	LSB 11
 0x90,   //  ad LD	DR_PARALLEL	// WE = 1, CLE = 1, ALE = 0, RD = 1
  
 //============================================================================
 //// Wait on busy line
 //============================================================================
 // :Wait_On_Busy
 //------------
 0x27,   //  ae ADDER16	ADR_BUFFER0
 0xc,   //  af CP	ADR_BUFFER0=>CMP0
 // JP :No_Timeout
 0x42,   //  b0 JP  2
 0x7,   //  b1 STATUS ERROR STOP		// timeout of 19ms
 // :No_Timeout
 //----------
 0xd0,   //  b2 LD	A DR_PARALLEL
 0x33,   //  b3 EXCHANGE
 0x28,   //  b4 BCLR1			// Test R/-B line
 // JP :Wait_On_Busy
 0x67,   //  b5 JP  -7
  
 //============================================================================
 //// Read the status byte
 0xa7,   //  b6 LD	MSB 7
 0xb0,   //  b7 LD	LSB 0
 0x8c,   //  b8 LD	DATA_FLASH	// Send "Status Read" command
  
 0xb9,   //  b9 LD	LSB 9
 0x90,   //  ba LD	DR_PARALLEL	// WE = 0, CLE = 1
 0xbb,   //  bb LD	LSB 11
 0x90,   //  bc LD	DR_PARALLEL	// WE = 1, CLE = 1, ALE = 0, RD = 1
 0xba,   //  bd LD	LSB 10
 0x90,   //  be LD	DR_PARALLEL	// WE = 1, CLE = 0, ALE = 0, RD = 1
  
 0xa0,   //  bf LD	MSB 0		// DATA_FLASH port = input
 0xb9,   //  c0 LD	LSB 9		// DATA_FLASH Port driven by FCI  
 0x8d,   //  c1 LD	CTRL_FCI	// PARALLEL Port driven by FCI
  
 0xb2,   //  c2 LD	LSB 2
 0x90,   //  c3 LD	DR_PARALLEL	// WE = 1, CLE = 0, ALE = 0, RD = 0
 0xba,   //  c4 LD	LSB 10
 0x90,   //  c5 LD	DR_PARALLEL	// WE = 1, CLE = 0, ALE = 0, RD = 1
  
 0xcc,   //  c6 LD	A DATA_FLASH	// Get the status byte
 0x28,   //  c7 BCLR1
 // JP :Status_Good
 0x42,   //  c8 JP  2
 ////// Status "FAIL" Stop the DTC
 0x7,   //  c9 STATUS ERROR STOP
  
 //============================================================================
 // :Status_Good
 //-----------
 0xc7,   //  ca LD	A ADR_BUFFER11	// Buf0: 0001=>0010=>0011
  
 0x38,   //  cb BSET1
 // JP :Release_Buffer
 0x42,   //  cc JP  2
  
 0x5,   //  cd STATUS	STOP		// Return if it is a BLOCK_ERASE
  
 // :Release_Buffer
 //--------------
 0x2a,   //  ce BCLR3			// Wrap the segment pointer
 0x87,   //  cf LD	ADR_BUFFER11	// Reload for the next page writing
 // JP :Free_Buffer0
 0x43,   //  d0 JP  3
 0xb2,   //  d1 LD	LSB 2
 // JP :Free_Buffer
 0x42,   //  d2 JP  2
 // :Free_Buffer0
 //------------
 0xb1,   //  d3 LD	LSB 1
 // :Free_Buffer
 //-----------
 0x9f,   //  d4 LD	BUFFER_MNGT
 0xb0,   //  d5 LD	LSB 0
 0x9f,   //  d6 LD	BUFFER_MNGT
  
 //============================================================================
 //// Decrease the page number and increase the page address
 0xc9,   //  d7 LD	A CMP01		// CMP01 is always 0x00
 0x85,   //  d8 LD	ADR_BUFFER01	// Clear high byte of ADR0
 0xae,   //  d9 LD	MSB 14
 0xb4,   //  da LD	LSB 4
 0x84,   //  db LD	ADR_BUFFER00	// ADR0=0x00E4// points to PA0-7
  
 0xdb,   //  dc LD	A DATA_BUFFER0
 0x2,   //  dd CLC
 0x25,   //  de ADDER8	X
 0x9b,   //  df LD	DATA_BUFFER0	// Increase the page address and save it back
  
 0xae,   //  e0 LD	MSB 14
 0xb0,   //  e1 LD	LSB 0
 0x84,   //  e2 LD	ADR_BUFFER00	// ADR0=0x00E0// points to page counter
 0xdb,   //  e3 LD	A DATA_BUFFER0
 0x2,   //  e4 CLC
 0x24,   //  e5 SUB8	X
 0x9b,   //  e6 LD	DATA_BUFFER0	// Decrease the page counter and save it back
 0x26,   //  e7 SUB16	ADR_BUFFER0
  
 0x8,   //  e8 CP	A=>X
 0xa4,   //  e9 LD	MSB 4
 0xb3,   //  ea LD	LSB 3
 0x60,   //  eb BRANCH :Loop_Write_Pages
  
 0x5,   //  ec STATUS	STOP		// All the pages are written