📄 smc_dtc_mapzone256_end.hex
字号:
// *****************************************************************
// * NOTICE: The information contained in this file is proprietary *
// * to SGS-THOMSON Microelectronics and is being made available *
// * to ST customers under strict non-disclosure agreements. *
// * Use or disclosure of this information is permissible only *
// * under the terms of the existing non-disclosure agreement. *
// *****************************************************************
// Written by Christophe BRICOUT
// Created by MPmanCompiler.exe (v3.0) Wed Apr 02 13:16:43 2003
//===================================================================
//
// SMART MEDIA CARD
//
//===================================================================
//----------------
// SMC_DTC_MapZone
//----------------
// :init_command_address
//------------------------------------------------------------------------
// START ADDRESS FOR make the map zone
// INPUT:
// 0xE2-0xE5 is the address of the 1st cluster to be scanned
// 0xE6: = 3 for 3 bytes address// = 4 for 4 bytes address
// 0xD0-0xD1 is the start address of the lookup table
// 0xD2-0xD3 is the end address of the loopup table
//------------------------------------------------------------------------
0xa0, // 0 LD MSB 0
0xbf, // 1 LD LSB 15
0x91, // 2 LD DDR_PARALLEL
0x92, // 3 LD OR_PARALLEL
0xaf, // 4 LD MSB 15
0x83, // 5 LD MASK
0x31, // 6 XOR
0x9f, // 7 LD BUFFER_MNGT // Clear segment offset
0x85, // 8 LD ADR_BUFFER01
0x86, // 9 LD ADR_BUFFER10
0x8a, // a LD CMP10
0xb1, // b LD LSB 1
0x87, // c LD ADR_BUFFER11 // buffer pointer 1 = 0x0100
0xb5, // d LD LSB 5
0x8b, // e LD CMP11 // CMP1 = 0x0500
//-------------------------
// Output the command 0x50
//-------------------------
// :start_read_spare_area
0xa1, // f LD MSB 1 //data_flash port = output
0xb9, // 10 LD LSB 9 //DATA_FLASH Port driven by FCI
0x8d, // 11 LD CTRL_FCI //PARALLEL Port driven by FCI
// :pre_wait_card_ready
//---------------
0xd0, // 12 LD A DR_PARALLEL
0x33, // 13 EXCHANGE
0x28, // 14 BCLR1 // test busy line
// JP :pre_wait_card_ready
0x63, // 15 JP -3
//For 256mb
//-----------
0xac, // 16 LD MSB 12 //At 0xc2= cmd to be sent
0xb2, // 17 LD LSB 2
0x82, // 18 LD Y
0xc0, // 19 LD A <Y>
// LD MSB 5
// LD LSB 0 //For 256mb
0x8c, // 1a LD DATA_FLASH // command Read(3)
0xba, // 1b LD LSB 10
0x90, // 1c LD DR_PARALLEL // WE = 1, CLE = 0
0xbb, // 1d LD LSB 11
0x90, // 1e LD DR_PARALLEL // WE = 1, CLE = 1
0xb9, // 1f LD LSB 9
0x90, // 20 LD DR_PARALLEL // WE = 0, CLE = 1
0xbb, // 21 LD LSB 11
0x90, // 22 LD DR_PARALLEL // WE = 1, CLE = 1
0xba, // 23 LD LSB 10
0x90, // 24 LD DR_PARALLEL // WE = 1, CLE = 0
//------------------------------------
// Output the 3 or 4 or 5 bytes of address from 0xE5-0xE1
//------------------------------------
0xa0, // 25 LD MSB 0
0xb1, // 26 LD LSB 1
0x81, // 27 LD X // X = 1
0xae, // 28 LD MSB 14
0xb6, // 29 LD LSB 6
0x84, // 2a LD ADR_BUFFER00 // buffer pointer 0 = 0x00E6
0xdb, // 2b LD A DATA_BUFFER0 // load the number of address bytes
0x82, // 2c LD Y
0x3c, // 2d DECY
// LD A ADR_BUFFER01 // A = 0,256mb
0x26, // 2e SUB16 ADR_BUFFER0 // send address from high byte to low byte,256mb
// :loop_send_address
//-----------------
// SUB16 ADR_BUFFER0 // send address from high byte to low byte
0xdb, // 2f LD A DATA_BUFFER0
0x8c, // 30 LD DATA_FLASH
0xa0, // 31 LD MSB 0
0xbe, // 32 LD LSB 14
0x90, // 33 LD DR_PARALLEL // ALE = 1, WE = 1
0xbc, // 34 LD LSB 12
0x90, // 35 LD DR_PARALLEL // ALE = 1, WE = 0
0xbe, // 36 LD LSB 14
0x90, // 37 LD DR_PARALLEL // ALE = 1, WE = 1
0x26, // 38 SUB16 ADR_BUFFER0
// LD A DATA_BUFFER0
0x3c, // 39 DECY
// JP :loop_send_address
0x6b, // 3a JP -11
0xa0, // 3b LD MSB 0
0xba, // 3c LD LSB 10
0x90, // 3d LD DR_PARALLEL // ALE = 0, WE = 1
//---------------------------------------------------
//For 256 MB or 2K page send 0x30 command,
//---------------------------------------------------
0xac, // 3e LD MSB 12 //Set a Flag at 0xc0= 0x00 for the card with 256mb
0xb0, // 3f LD LSB 0
0x82, // 40 LD Y
0xc0, // 41 LD A <Y>
0x82, // 42 LD Y
0x3c, // 43 DECY
// JP :Read_Spare
0x4e, // 44 JP 14
//send 0x30 cmd
0xa3, // 45 LD MSB 3
0xb0, // 46 LD LSB 0
0x8c, // 47 LD DATA_FLASH
0xba, // 48 LD LSB 10
0x90, // 49 LD DR_PARALLEL // WE = 1, CLE = 0
0xbb, // 4a LD LSB 11
0x90, // 4b LD DR_PARALLEL // WE = 1, CLE = 1
0xb9, // 4c LD LSB 9
0x90, // 4d LD DR_PARALLEL // WE = 0, CLE = 1
0xbb, // 4e LD LSB 11
0x90, // 4f LD DR_PARALLEL // WE = 1, CLE = 1
0xba, // 50 LD LSB 10
0x90, // 51 LD DR_PARALLEL // WE = 1, CLE = 0
//--------------
//End for 256mb
//---------------
// :Read_Spare
//------------
0xa0, // 52 LD MSB 0 // data_flash port = intput
0xb9, // 53 LD LSB 9 // DATA_FLASH Port driven by FCI
0x8d, // 54 LD CTRL_FCI // PARALLEL Port driven by FCI
//---------------------
// Read the spare area
//---------------------
// :init_read_spare
0xb2, // 55 LD LSB 2
0x88, // 56 LD CMP00 // CMP00 = 0x02 for toggling RD line
0xbf, // 57 LD LSB 15
0x82, // 58 LD Y // Y = 15
0xae, // 59 LD MSB 14
0xb7, // 5a LD LSB 07
0x84, // 5b LD ADR_BUFFER00 // ADR0 = 0x00E7, points to spare area
0x89, // 5c LD CMP01 // save this address for later use
// :wait_card_ready
//---------------
0xd0, // 5d LD A DR_PARALLEL
0x33, // 5e EXCHANGE
0x28, // 5f BCLR1 // test busy line
// JP :wait_card_ready
0x63, // 60 JP -3
// read_spare
//------------
// :read_spare
0xc8, // 61 LD A CMP00
0x90, // 62 LD DR_PARALLEL // RD = 0
0xba, // 63 LD LSB 10
0x90, // 64 LD DR_PARALLEL // RD = 1
0xcc, // 65 LD A DATA_FLASH // load DATA_FLASH
0x9b, // 66 LD DATA_BUFFER0
0x27, // 67 ADDER16 ADR_BUFFER0
0x3c, // 68 DECY
// JP :read_spare
0x68, // 69 JP -8
//-------------------------------
// Check the spare area is valid
//-------------------------------
0xc9, // 6a LD A CMP01
0x82, // 6b LD Y // Y = 0x00E7, points to spare area
0xc0, // 6c LD A <Y> // load 1st byte of reserved area
0x31, // 6d XOR
0x8, // 6e CP A=>X // X = 1
// JP :spare_area_check_FF
0x59, // 6f JP 25
0x3d, // 70 INCY
0xc0, // 71 LD A <Y> // load 2nd byte of reserved area
0x31, // 72 XOR
0x8, // 73 CP A=>X
// JP :spare_area_check_FF
0x54, // 74 JP 20
0x3d, // 75 INCY
0xc0, // 76 LD A <Y> // load 3rd byte of reserved area
0x31, // 77 XOR
0x8, // 78 CP A=>X
// JP :spare_area_check_FF
0x4f, // 79 JP 15
0x3d, // 7a INCY
0xc0, // 7b LD A <Y> // load 4th byte of reserved area
0x31, // 7c XOR
0x8, // 7d CP A=>X
// JP :spare_area_check_FF
0x4a, // 7e JP 10
0x3d, // 7f INCY
0xc0, // 80 LD A <Y> // load data status byte
0x31, // 81 XOR
0x8, // 82 CP A=>X
// JP :spare_area_check_FF
0x45, // 83 JP 5
0x3d, // 84 INCY
0xc0, // 85 LD A <Y> // load block status byte
0x3d, // 86 INCY
0x31, // 87 XOR
// :spare_area_check_FF
//-----------------
0x1, // 88 SEC
0x8, // 89 CP A=>X
// JP :spare_area_address_error
0x5a, // 8a JP 26
0xc0, // 8b LD A <Y> // load high byte of block address 1
0x85, // 8c LD ADR_BUFFER01
0x3d, // 8d INCY
0xc0, // 8e LD A <Y> // load low byte of block address 1
0x84, // 8f LD ADR_BUFFER00
0x81, // 90 LD X // X = low byte of block address 1
0x3d, // 91 INCY
0x3d, // 92 INCY // skip 1st byte of ECC2
0x3d, // 93 INCY // skip 2nd byte of ECC2
0x3d, // 94 INCY // skip 3rd byte of ECC2
0xc0, // 95 LD A <Y> // load high byte of block address 2
0x89, // 96 LD CMP01
0x3d, // 97 INCY
0xc0, // 98 LD A <Y> // load low byte of block address 2
0x88, // 99 LD CMP00
0xd, // 9a CP ADR_BUFFER0<CMP0
// JP :spare_area_error
0x52, // 9b JP 18
0x2, // 9c CLC
0x24, // 9d SUB8 X // CMP00 - ADR_BUFFER00
0xa, // 9e CP CARRY
// JP :spare_area_error
0x4e, // 9f JP 14
0xc5, // a0 LD A ADR_BUFFER01
0x81, // a1 LD X
0xc9, // a2 LD A CMP01
0x24, // a3 SUB8 X
// :spare_area_address_error
//------------------------
0xa, // a4 CP CARRY
// JP :spare_area_error
0x48, // a5 JP 8
//---------------------
// check the parity bit
//---------------------
0x1, // a6 SEC
0xc4, // a7 LD A ADR_BUFFER00
0x31, // a8 XOR
0xc5, // a9 LD A ADR_BUFFER01
0x31, // aa XOR
0xa, // ab CP CARRY
// JP :got_a_good_address
0x53, // ac JP 19
// :spare_area_error
//----------------
0xa0, // ad LD MSB 0
0xb1, // ae LD LSB 1
0x81, // af LD X // X = 1
0x33, // b0 EXCHANGE // A = 0x10
0x9c, // b1 LD DATA_BUFFER1
0x2f, // b2 ADDER16 ADR_BUFFER1
0xa0, // b3 LD MSB 0
0x9c, // b4 LD DATA_BUFFER1 // save as 0x1000, this is an invalid cluster
0x2f, // b5 ADDER16 ADR_BUFFER1
0xb, // b6 CP ALWAYS
// JP :increase_cluster_address
0x5a, // b7 JP 26
// :got_logical_address
//-------------------
0xc5, // b8 LD A ADR_BUFFER01 // high byte of the address
0x33, // b9 EXCHANGE
0x28, // ba BCLR1 // bit12 of the address must be 1
// JP :spare_area_error
0x6e, // bb JP -14
0x33, // bc EXCHANGE
0xb, // bd CP ALWAYS
// JP :save_logical_address
0x4d, // be JP 13
// :got_a_good_address
//------------------
0xa0, // bf LD MSB 0
0xb1, // c0 LD LSB 1
0x81, // c1 LD X // X = 0x01
0xc4, // c2 LD A ADR_BUFFER00
0x31, // c3 XOR
0x8, // c4 CP A=>X
// JP :got_logical_address
0x6d, // c5 JP -13
0xc5, // c6 LD A ADR_BUFFER01
0x31, // c7 XOR
0x8, // c8 CP A=>X
// JP :got_logical_address
0x71, // c9 JP -17
// :got_free_cluster
//----------------
//*LD MSB 14
//*LD LSB 7 // A = 0xE7, will be 0x73 after shift right
0xc3, // ca LD A MASK
// :save_logical_address
//--------------------
0x9c, // cb LD DATA_BUFFER1 // save the high byte of the address
0x2f, // cc ADDER16 ADR_BUFFER1
0xc4, // cd LD A ADR_BUFFER00
0x28, // ce BCLR1 // clear the parity bit
0x9c, // cf LD DATA_BUFFER1 // save the low byte of the address
0x2f, // d0 ADDER16 ADR_BUFFER1
// :increase_cluster_address
//------------------------
0xc3, // d1 LD A MASK
0x84, // d2 LD ADR_BUFFER00
0x31, // d3 XOR
0x85, // d4 LD ADR_BUFFER01 // ADR0 = 0x00FF, points to cluster size
0xdb, // d5 LD A DATA_BUFFER0
0x81, // d6 LD X // X = the size of the cluster
0x2, // d7 CLC
// LD MSB 14
// LD LSB 5
// LD Y // Y = 0xE5, points to the cluster address
//For 256MB
//-------------
0xac, // d8 LD MSB 12 //0xc3 contains the start add for cluster add
0xb3, // d9 LD LSB 3
0x82, // da LD Y
0xc0, // db LD A <Y>
0x82, // dc LD Y
//For 256MB
//------------
0xc0, // dd LD A <Y>
0x25, // de ADDER8 X
0x80, // df LD <Y> // byte 0 of the address
0x3c, // e0 DECY // Y = 0xE4
0xc5, // e1 LD A ADR_BUFFER01
0x81, // e2 LD X // clear X
0xc0, // e3 LD A <Y>
0x25, // e4 ADDER8 X // byte 1 of the address
0x80, // e5 LD <Y>
0x3c, // e6 DECY // Y = 0xE3
0xc0, // e7 LD A <Y>
0x25, // e8 ADDER8 X
0x80, // e9 LD <Y> // byte 2 of the address
// :check_next_cluster
//------------------
0xa0, // ea LD MSB 0
0xbf, // eb LD LSB 15
0xf, // ec CP ADR_BUFFER1<CMP1
0x60, // ed BRANCH :start_read_spare_area
// :no_more_clusters
0x0, // ee NOP
0x0, // ef NOP
0x0, // f0 NOP
0x5, // f1 STATUS STOP
⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -