📄 smc_dtc_play256_end.hex
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0xae, // 7b LD MSB 14
0xb7, // 7c LD LSB 7
0x84, // 7d LD ADR_BUFFER00 // ADR0 = 0x00E7, points to the spare area
0xa0, // 7e LD MSB 0
0xbf, // 7f LD LSB 15
0x82, // 80 LD Y // Y = 0x0F
//-------------------------
// Write the redundant area
//-------------------------
// :write_spare_area
0xdb, // 81 LD A DATA_BUFFER0
0x8c, // 82 LD DATA_FLASH
0x27, // 83 ADDER16 ADR_BUFFER0
0xc8, // 84 LD A CMP00
0x90, // 85 LD DR_PARALLEL
0xba, // 86 LD LSB 10
0x90, // 87 LD DR_PARALLEL
0x3c, // 88 DECY
// JP :write_spare_area
0x68, // 89 JP -8
0x5, // 8a STATUS STOP
//------------------------------------------------------------------
// START ADDRESS OF SMC_DTC_SEND_CMD
// 0x1630 = The command to be sent
//------------------------------------------------------------------
0xa1, // 8b LD MSB 1 //data_flash port = output
0xb9, // 8c LD LSB 9 //DATA_FLASH Port driven by FCI
0x8d, // 8d LD CTRL_FCI //PARALLEL Port driven by FCI
0xaf, // 8e LD MSB 15
0xbf, // 8f LD LSB 15
0x83, // 90 LD MASK
0x31, // 91 XOR
0x85, // 92 LD ADR_BUFFER01
0xae, // 93 LD MSB 14
0x84, // 94 LD ADR_BUFFER00 // buffer pointer 0 = 0x00E0
0xdb, // 95 LD A DATA_BUFFER0 // load the command
0x8c, // 96 LD DATA_FLASH // send the command
0xa0, // 97 LD MSB 0
0xba, // 98 LD LSB 10 // WE = 1, CLE = 0
0x90, // 99 LD DR_PARALLEL
0xbb, // 9a LD LSB 11 // WE = 1, CLE = 1
0x90, // 9b LD DR_PARALLEL
0xb9, // 9c LD LSB 9 // WE = 0, CLE = 1
0x90, // 9d LD DR_PARALLEL
0xbb, // 9e LD LSB 11 // WE = 1, CLE = 1
0x90, // 9f LD DR_PARALLEL
0xba, // a0 LD LSB 10 // ALE = 0, WE = 1, CLE = 0
0x90, // a1 LD DR_PARALLEL
0xb1, // a2 LD LSB 1
0x81, // a3 LD X // initialize X = 1
0x5, // a4 STATUS STOP
//--------------------------------------------------
// START ADDRESS FOR SMC_DTC_SEND_ADDR
// ST7: Give a 3 or 4 bytes address
// 0x1632 - 0x1635 = The address, big endien (0x00E2-0x00E5)
//--------------------------------------------------
0xbe, // a5 LD LSB 14
0x90, // a6 LD DR_PARALLEL // ALE = 1, WE = 1
0xae, // a7 LD MSB 14
0xb6, // a8 LD LSB 6
0x84, // a9 LD ADR_BUFFER00 // ADR0 = 0x00E6// points to "Num of address"
0xdb, // aa LD A DATA_BUFFER0
0x82, // ab LD Y // Load number of addres bytes
0x26, // ac SUB16 ADR_BUFFER0
0x3c, // ad DECY
// :Send_Address_Bytes
//------------------
0xdb, // ae LD A DATA_BUFFER0
0x26, // af SUB16 ADR_BUFFER0
0x8c, // b0 LD DATA_FLASH // Send the address byte
0xbc, // b1 LD LSB 12
0x90, // b2 LD DR_PARALLEL // WE = 0, ALE = 1
0xbe, // b3 LD LSB 14
0x90, // b4 LD DR_PARALLEL // WE = 1, ALE = 1
// :Next_Address_Byte
//-----------------
0x3c, // b5 DECY
// JP :Send_Address_Bytes
0x68, // b6 JP -8
0xba, // b7 LD LSB 10
0x90, // b8 LD DR_PARALLEL // WE = 1, CLE = 0, ALE = 0, RD = 1
0x5, // b9 STATUS STOP
//LD MSB 1 //data_flash port = output
//LD LSB 9 //DATA_FLASH Port driven by FCI
//LD CTRL_FCI //PARALLEL Port driven by FCI
//LD MSB 14
//LD LSB 06
//LD ADR_BUFFER00 // buffer pointer 0 = 0x00E6
//LD A DATA_BUFFER0
//LD Y // Y = number of address bytes
//DECY
//LD LSB 12
//LD CMP01 // CMP01 = 12, for send address toggling lines
//LD LSB 14
//LD DR_PARALLEL // ALE = 1, WE = 1
//LD A ADR_BUFFER01 // clear A as the first byte, it is always 0
// loop_send_address
// -----------------
//:loop_send_address
//SUB16 ADR_BUFFER0 // send address from high byte to low byte
//LD DATA_FLASH
//LD A CMP01
//LD DR_PARALLEL // ALE = 1, WE = 0
//LD LSB 14
//LD DR_PARALLEL // ALE = 1, WE = 1
//LD A DATA_BUFFER0
//DECY
//JP :loop_send_address
//LD MSB 0
//LD LSB 10 // ALE = 0, WE = 1, CLE = 0
//LD DR_PARALLEL
//STATUS STOP
//-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-
// Read Card ID
//-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-
//-------------------------------------
// START ADDRESS FOR Read_ID, store the no. of cycles of ReadID at 0xFC
//store the codes from 0xf0
//-------------------------------------
0xc5, // ba LD A ADR_BUFFER01
0x9f, // bb LD BUFFER_MNGT // clear segment offset
0x8c, // bc LD DATA_FLASH // output the address
0xbe, // bd LD LSB 14
0x90, // be LD DR_PARALLEL // ALE = 1, WE = 1
0xbc, // bf LD LSB 12
0x90, // c0 LD DR_PARALLEL // ALE = 1, WE = 0
0xbe, // c1 LD LSB 14
0x90, // c2 LD DR_PARALLEL // ALE = 1, WE = 1
0xba, // c3 LD LSB 10
0x90, // c4 LD DR_PARALLEL // ALE = 0, WE = 1, CLE = 0
0xb9, // c5 LD LSB 9 // DATA_FLASH Port driven by FCI
//LD MSB 0 // DATA_FLASH Port = intput
0x8d, // c6 LD CTRL_FCI // PARALLEL Port driven by FCI
0xaf, // c7 LD MSB 15
0xbc, // c8 LD LSB 12
0x82, // c9 LD Y // Y = 0xFC
0xb0, // ca LD LSB 0
0x84, // cb LD ADR_BUFFER00 //Start add for storing the REadID o/p ADR0 = 0x00F0
//for 256mb
//-----------
0xc0, // cc LD A <Y> // store the no. of cycles of ReadID
0x82, // cd LD Y
0x3c, // ce DECY
// :Readnext_cycle
//---------------
0xa0, // cf LD MSB 0
0xb2, // d0 LD LSB 2
0x90, // d1 LD DR_PARALLEL // RD = 0
0xba, // d2 LD LSB 10
0x90, // d3 LD DR_PARALLEL // RD = 1
0xcc, // d4 LD A DATA_FLASH
0x9b, // d5 LD DATA_BUFFER0 // save the codes, 256mb
0x27, // d6 ADDER16 ADR_BUFFER0
0x3c, // d7 DECY
// JP :Readnext_cycle
0x69, // d8 JP -9
//--------------------------
//INCY
//LD MSB 0
//LD LSB 2
//LD DR_PARALLEL // RD = 0
//LD LSB 10
//LD DR_PARALLEL // RD = 1
//LD A DATA_FLASH
//LD <Y> // save the device code
0x5, // d9 STATUS STOP
//-------------------------------------
// START ADDRESS FOR Read_Status
//-------------------------------------
0xc5, // da LD A ADR_BUFFER01
0x9f, // db LD BUFFER_MNGT // clear segment offset
0x86, // dc LD ADR_BUFFER10
0x87, // dd LD ADR_BUFFER11 // Buffer pointer 1 = 0x0000
0x8b, // de LD CMP11
0xb1, // df LD LSB 1
0x8a, // e0 LD CMP10 // CMP1 = 0x0001
// :read_status_loop
0x2f, // e1 ADDER16 ADR_BUFFER1
0xf, // e2 CP ADR_BUFFER1<CMP1
// JP :read_status_return
0x52, // e3 JP 18
0xa0, // e4 LD MSB 0 // DATA_FLASH Port = intput
0xb9, // e5 LD LSB 9 // DATA_FLASH Port driven by FCI
0x8d, // e6 LD CTRL_FCI // PARALLEL Port driven by FCI
0xb2, // e7 LD LSB 2
0x90, // e8 LD DR_PARALLEL
0xaf, // e9 LD MSB 15
0xbe, // ea LD LSB 14
0x82, // eb LD Y
0xcc, // ec LD A DATA_FLASH // Get the status byte
0x80, // ed LD <Y>
0xa0, // ee LD MSB 0
0xba, // ef LD LSB 10
0x90, // f0 LD DR_PARALLEL
0xc0, // f1 LD A <Y>
0x33, // f2 EXCHANGE
0x2a, // f3 BCLR3 // Check busy bit?
// JP :read_status_loop
0x73, // f4 JP -19
// :read_status_return
//------------------
0x5, // f5 STATUS STOP
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