smc_dtc_copypages256_err.fsm
来自「HID-Ukey底层源码实现(st72651芯片) windows上层驱动」· FSM 代码 · 共 484 行
FSM
484 行
;===================================================================
;
; SMART MEDIA CARD
;
;===================================================================
;----------------------
; dtc_smc_copy_page.fsm
;----------------------
;--------------------------
;init_write_number_of_block
;--------------------------
LD MSB 0
LD LSB 1
LD X ; X<=1
LD LSB 0
LD ADR_BUFFER01
LD CMP00
LD BUFFER_MNGT
;-----------------
;init_dtc_ctrl_reg
;-----------------
LD MSB 1 ; data_flash port = output
LD LSB 9 ; DATA_FLASH Port driven by FCI
LD CTRL_FCI ; PARALLEL Port driven by FCI
;-------------------------------
;command_latch_cycle (Read1 CMD)
;-------------------------------
; LD MSB 0
; LD LSB 0
LD A ADR_BUFFER01
LD DATA_FLASH
; LD MSB 0
LD LSB 10
LD DR_PARALLEL
LD LSB 11
LD DR_PARALLEL
LD LSB 9
LD DR_PARALLEL
LD LSB 11
LD DR_PARALLEL
;send address, set ALE high
;------------------------------
LD LSB 14
LD DR_PARALLEL
;-------------------------
; read_address_latch_cycle
;-------------------------
;read_address_latch_cycle_nb_Bytes
;---------------------------------
LD MSB 14
LD LSB 06
LD ADR_BUFFER00 ; buffer pointer 0 = 0x00E6
LD A DATA_BUFFER0
LD Y ; Y = number of address bytes
DECY
SUB16 ADR_BUFFER0 ; send address from high byte to low byte
:loop_send_address
;-----------------
LD A DATA_BUFFER0
LD DATA_FLASH ; Output the address bytes
LD LSB 12
LD DR_PARALLEL ; ALE = 1, WE = 0
LD LSB 14
LD DR_PARALLEL ; ALE = 1, WE = 1
SUB16 ADR_BUFFER0 ; send address from high byte to low byte
DECY
JP :loop_send_address
LD LSB 10
LD DR_PARALLEL ; ALE = 0, WE = 1
;end of send address
;---------------------
;wait_read1_addr_ready
;---------------------
LD MSB 3
LD LSB 5
LD DATA_FLASH
LD LSB 11
LD DR_PARALLEL
LD LSB 9
LD DR_PARALLEL
LD LSB 11
LD DR_PARALLEL
LD LSB 10
LD DR_PARALLEL
:wait_read1_addr_ready
;---------------------
; NOP
; NOP
;:read1_addr_no_timeout
;---------------------
LD A DR_PARALLEL
EXCHANGE
BCLR1 ; test R/B
JP :wait_read1_addr_ready
;send next command for copy operation 0x85
;-------------------------------------------
LD MSB 8
LD LSB 5
LD DATA_FLASH
LD LSB 11
LD DR_PARALLEL
LD LSB 9
LD DR_PARALLEL
LD LSB 11
LD DR_PARALLEL
;send address bytes
LD LSB 14
LD DR_PARALLEL
;send the address of destination block
;--------------------------------------
:send_address
;-------------
LD MSB 14
LD LSB 06
LD ADR_BUFFER00 ; buffer pointer 0 = 0x00E6
LD A DATA_BUFFER0
LD Y ; Y = number of address bytes
DECY
ADDER16 ADR_BUFFER0 ; send address from high byte to low byte
:loop_send_address1
;-----------------
LD A DATA_BUFFER0
LD DATA_FLASH ; Output the address bytes
LD LSB 12
LD DR_PARALLEL ; ALE = 1, WE = 0
LD LSB 14
LD DR_PARALLEL ; ALE = 1, WE = 1
ADDER16 ADR_BUFFER0 ; send address from high byte to low byte
DECY
JP :loop_send_address1
LD LSB 10
LD DR_PARALLEL ; ALE = 0, WE = 1
;end of send address
;---------------------
;chk if the first page is not from the start of coloumn
;-------------------------------------------------------
;chk the flag set in the 0xfd to get the no. of blocks
;-------------------------------------------------------
LD MSB 15
LD LSB 13
LD ADR_BUFFER00
LD A ADR_BUFFER01
LD ADR_BUFFER11
LD ADR_BUFFER10 ; ADR1 = 0x0000
LD A DATA_BUFFER0
ADDER16 ADR_BUFFER0
ADDER16 ADR_BUFFER0 ; point ADR0 = 0x00ff
BSET1
JP :chk_nxt_bit
BSET2
JP :2_block_ff
LD MSB 0
LD LSB 0
; JP :start_pgm_cycle
BRANCH :start_pgm_cycle
:chk_nxt_bit
BSET2
JP :3_block_ff
:1_block_ff
;--------------
LD LSB 2
LD CMP11 ; only one block so CMP1 = 0x210 = 528 bytes
LD MSB 1
JP :send_ff
:2_block_ff
;------------
LD LSB 4
LD CMP11
LD MSB 2
JP :send_ff
:3_block_ff
;-----------
LD LSB 6
LD CMP11
LD MSB 3 ;CMP1 = 0x630
:send_ff
LD LSB 0
LD CMP10
;^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
LD MSB 8
LD LSB 5
LD DATA_FLASH
LD LSB 11
LD DR_PARALLEL
LD LSB 9
LD DR_PARALLEL
LD LSB 11
LD DR_PARALLEL
;send address bytes
LD LSB 14
LD DR_PARALLEL
;send the address of destination block
;--------------------------------------
LD MSB 14
LD LSB 06
LD ADR_BUFFER00 ; buffer pointer 0 = 0x00E6
LD A DATA_BUFFER0
LD Y ; Y = number of address bytes
DECY
ADDER16 ADR_BUFFER0 ; send address from high byte to low byte
:loop_send_address2
;-----------------
LD A DATA_BUFFER0
LD DATA_FLASH ; Output the address bytes
LD LSB 12
LD DR_PARALLEL ; ALE = 1, WE = 0
LD LSB 14
LD DR_PARALLEL ; ALE = 1, WE = 1
ADDER16 ADR_BUFFER0 ; send address from high byte to low byte
DECY
JP :loop_send_address2
LD LSB 10
LD DR_PARALLEL ; ALE = 0, WE = 1
;^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
;write data on to page, generate 528 write pulses
;------------------------------------------------
;:gen_more_pulses
;---------------
:write_dat_sec
;-------------
LD A ADR_BUFFER00
LD DATA_FLASH
LD LSB 8
LD DR_PARALLEL
LD LSB 10
LD DR_PARALLEL
ADDER16 ADR_BUFFER1
CP ADR_BUFFER1<CMP1
JP :write_dat_sec
;----------------------------
:Page_Pgm_command_latch_cycle
;----------------------------
:start_pgm_cycle
;----------------
LD MSB 1
LD LSB 0
LD DATA_FLASH ; Send CMD: 0x10
LD LSB 11
LD DR_PARALLEL
LD LSB 9
LD DR_PARALLEL
LD LSB 11
LD DR_PARALLEL
LD LSB 10
LD DR_PARALLEL
;---------------------------
; read_status & check_status
;---------------------------
:wait_card_ready
;---------------
; NOP
; NOP
LD A DR_PARALLEL
EXCHANGE
BCLR1 ; test R/B
JP :wait_card_ready
;-------------------------------
LD MSB 7 ; read_status_command_latch_cycle
LD LSB 0
LD DATA_FLASH
LD LSB 11
LD DR_PARALLEL
LD LSB 9
LD DR_PARALLEL
LD LSB 11
LD DR_PARALLEL
LD LSB 10
LD DR_PARALLEL
:init_read_status_seq
;---------------------
LD LSB 9 ; DATA_FLASH Port driven by FCI
LD CTRL_FCI ; PARALLEL Port driven by FCI
:read_status_seq
;----------------
LD LSB 2
LD DR_PARALLEL
LD LSB 10
LD DR_PARALLEL
LD A DATA_FLASH ; load DATA_FLASH
BCLR1 ; check_status
JP :no_error
:error_status
;------------
STATUS ERROR STOP
:no_error
;------------
;end_of_block
;------------
;For 256mb
LD A DATA_BUFFER0 ; ADR0 = 0x00ff, contains 2K page pointer
CP A=>X
JP :dec_512_page
:stop
STATUS STOP ; if 0 then stop
;-------------------------------
;-------------------------------
:dec_512_page
LD MSB 0
LD LSB 4
LD Y
SUB16 ADR_BUFFER0
LD A DATA_BUFFER0
CLC
SUB8 Y ; decrement by 4
LD DATA_BUFFER0
;---------------
;:increment_page
;---------------
;; Decrease the page number and increase the page address
LD MSB 14
LD LSB 3
LD Y
:next_page
;-----------------------------------
LD A <Y>
CLC
ADDER8 X
LD <Y> ; Increase the page address and save it back
LD MSB 14
LD LSB 9
LD Y
LD A <Y>
CLC
ADDER8 X
LD <Y>
DECY ;Y = 0xe8
JP :end_of_page
:last_page
;---------------
SUB16 ADR_BUFFER0 ; ADR0 =0xfe
LD A DATA_BUFFER0
CP A<X
JP :stop
:partial_page_pgm
;-----------------
SUB16 ADR_BUFFER0 ; ADR0 = 0xfd
BSET1
JP :chk_nxtbit
BSET2
JP :2_block_extra
:chk_nxtbit
BSET2
JP :1_block_extra
:3_block_extra
LD LSB 3
LD DATA_BUFFER0
LD LSB 2
LD CMP11 ; col 1
LD MSB 1
CP ALWAYS
JP :end1
:2_block_extra
LD LSB 2
LD DATA_BUFFER0
LD LSB 4
LD CMP11 ; col 1
LD MSB 2
:end1
JP :end
:1_block_extra
LD LSB 1
LD DATA_BUFFER0
LD LSB 6
LD CMP11 ; col 1
LD MSB 3
JP :end
:end_of_page
;-------------
ADDER16 ADR_BUFFER0
LD A DATA_BUFFER0
CLC
SUB8 X
LD DATA_BUFFER0 ; decrement 0xff by 1 => decrement of 2k page no.
CP A<X
LD MSB 12
LD LSB 5
; JP :last_page
BRANCH
LD A ADR_BUFFER01 ; 0xe8, col add2
LD <Y>
DECY
LD <Y> ; Y=0xe7, col add1
SUB16 ADR_BUFFER0 ; ADR0 = 0xfd, flag for col. no.
SUB16 ADR_BUFFER0 ; ADR0 = 0xfe, flag for col. no.
:process_continue
LD A ADR_BUFFER01
LD DATA_BUFFER0 ; reset it to 0
BRANCH :start
:end
LD LSB 0
LD CMP10
LD A CMP11
LD <Y>
DECY
LD A CMP10
LD <Y>
ADDER16 ADR_BUFFER0 ; 0xfe need not to be reseted now
; CP ALWAYS
JP :process_continue
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