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📄 appli.c

📁 HID-Ukey底层源码实现(st72651芯片) windows上层驱动
💻 C
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/**************** (c) 2000  STMicroelectronics **********************
PROJECT : USB - ST7 FULL SPEED
VERSION :  v 0.96
CREATION DATE :  01/12/2000
AUTHOR : MICROCONTROLLER DIVISION / ST Rousset
-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-
MODIFICATIONS : 

******************************************************************************/

#include "mcu_conf.h"
#include "usb_lib.h"

#include "lib_bits.h"
#include "descript.h"
#include "MAL_Func.h"
#include "Mconfig.h"
#include "NAND.h"

#pragma DATA_SEG DEFAULT_RAM
unsigned char Max_Lun;
unsigned char LUN_Config;

#pragma CODE_SEG APP_CODE
/*-----------------------------------------------------------------------------
ROUTINE NAME : Init_Ports
INPUT/OUTPUT : None
DESCRIPTION  : Init the port 
-----------------------------------------------------------------------------*/
void Init_Port(void)
{
//------------------ I/O ports initialization ----------

	// Port A
	ClrBit(PADDR,6);	// PA6 Input : CF CD
	ClrBit(PADDR,7);	// PA7 Input : SMC WP
	
	// Port C
	ClrBit(PCDDR,0);	// PC0 Input : Sony Stick CD	
//	ClrBit(PCDDR,4);	// PC4 Input : SMC CD
	ClrBit(PCDDR,5);	// PC5 Input : SD CD
	ClrBit(PCDDR,6);	// PC6 Input : SD WP
	SetBit(PCOR,7);		// PC7 Push Pull : LED1
	SetBit(PCDDR,7);	// PC7 Output : LED1
	
	// Port D
	ClrBit(PDOR,0);		// PE0 Open Drain : NAND CE1
	ClrBit(PDOR,1);		// PE1 Open Drain : NAND CE2
	ClrBit(PDOR,2);		// PE2 Open Drain : NAND CE3
	ClrBit(PDOR,3);		// PE3 Open Drain : NAND CE4
//	SetBit(PDOR,4);		// PE4 Push Pull : ICC
	SetBit(PDDDR,0);	// PE0 Output : NAND CE1
	SetBit(PDDDR,1);	// PE1 Output : NAND CE2
	SetBit(PDDDR,2);	// PE2 Output : NAND CE3
	SetBit(PDDDR,3);	// PE3 Output : NAND CE4
//	SetBit(PDDDR,4);	// PE4 Output : ICC

/*	SetBit(PDOR,0);		// PD0 Push Pull : LED2
	SetBit(PDOR,1);		// PD1 Push Pull : LED3
	SetBit(PDOR,2);		// PD2 Push Pull : LED4
	SetBit(PDOR,3);		// PD3 Push Pull : LED5
	SetBit(PDOR,4);		// PD4 Push Pull : LED6
	SetBit(PDOR,5);		// PD5 Push Pull : LED7
	SetBit(PDOR,6);		// PD6 Push Pull : LED8
	SetBit(PDOR,7);		// PD7 Push Pull : LED9
	
	SetBit(PDDDR,0);	// PD0 Output : LED2
	SetBit(PDDDR,1);	// PD1 Output : LED3
	SetBit(PDDDR,2);	// PD2 Output : LED4
	SetBit(PDDDR,3);	// PD3 Output : LED5
	SetBit(PDDDR,4);	// PD4 Output : LED6
	SetBit(PDDDR,5);	// PD5 Output : LED7
	SetBit(PDDDR,6);	// PD6 Output : LED8
	SetBit(PDDDR,7);	// PD7 Output : LED9	
*/
	// Port E
/*
	ClrBit(PEOR,0);		// PE0 Open Drain : NAND CE1
	ClrBit(PEOR,1);		// PE1 Open Drain : NAND CE2
	ClrBit(PEOR,2);		// PE2 Open Drain : NAND CE3
	ClrBit(PEOR,3);		// PE3 Open Drain : NAND CE4
	SetBit(PEOR,4);		// PE4 Push Pull : ICC
	SetBit(PEDDR,0);	// PE0 Output : NAND CE1
	SetBit(PEDDR,1);	// PE1 Output : NAND CE2
	SetBit(PEDDR,2);	// PE2 Output : NAND CE3
	SetBit(PEDDR,3);	// PE3 Output : NAND CE4
	SetBit(PEDDR,4);	// PE4 Output : ICC
*/
	// Port F
//	ClrBit(PFDDR,2);	// PF2 Input : SLOT1
//	ClrBit(PFDDR,3);	// PF3 Input : SLOT2
	SetBit(PFDDR,4);	// PF4 Input : SLOT3
	SetBit(PFDDR,5);	// PF5 Input : SLOT4
//	ClrBit(PFDDR,6);	// PF6 Input : SLOT5

	PDDR |= 0x01;		// PE0 : NAND CE1 = 1
	PDDR |= 0x02;		// PE1 : NAND CE2 = 1
	PDDR |= 0x04;		// PE2 : NAND CE3 = 1
	PDDR |= 0x08;		// PE3 : NAND CE4 = 1
//	PDDR |= 0x10;		// PE4 : ICC = 1
	PCDR |= 0x80;		// PC7 : LED1 = 1
	PFDR |= 0xFF;		// LEDs OFF

/*
	PEDR |= 0x01;		// PE0 : NAND CE1 = 1
	PEDR |= 0x02;		// PE1 : NAND CE2 = 1
	PEDR |= 0x04;		// PE2 : NAND CE3 = 1
	PEDR |= 0x08;		// PE3 : NAND CE4 = 1
	PEDR |= 0x10;		// PE4 : ICC = 1
	PCDR |= 0x80;		// PC7 : LED1 = 1
	PDDR |= 0xFF;		// LEDs OFF
*/
}

extern ONE_DESCRIPTOR DeviceDescriptor;
extern NAND_Init(void);
extern unsigned char PassWord[34];
extern unsigned char Serial_Number[66];
extern unsigned char Current_Mode;


void USER_init(void)
{
	TCR1 = 0x00;		// @jin0823 OCIE = 0, TOIE = 0, timer compare interrupt disable and Overflow Interrupt disable
	OCHR2 = 0xfb;
	OCHR1 = 0x00;	// @jin0823
	TCR2 = 0x00;					// F= Fcpu/4
	MAL_POWER_ON;

// Delay to let regulator stable
	asm {
		CLR		X
delay_X:
		NOP
		DEC		X
		JRNE	delay_X
	}

	Init_Port();

	MAL_Medium_Plug(0);
	MAL_Medium_Removing(1);
	//	MAL_Medium_Plug(1);

	PFDR &= ~0x08;		// PF3 : LED1 ON
	PFDR &= ~0x10;		// PF4 : LED2 ON

	// Read NAND
	NAND_Init();
	if(PassWord[0] == 0) {
		Max_Lun = 0;
		Current_Mode = 0;
	}
	else {
		Max_Lun = 1;
		Current_Mode = 1;
	}

	if(Serial_Number[0] == 0)
		DeviceDescriptor.Descriptor = Appli_DeviceDescriptor0;
	else
		DeviceDescriptor.Descriptor = Appli_DeviceDescriptor1;
	DeviceDescriptor.Size = 18;
}

extern char	Startup_VAR;
/*----------------------------------*/
void USER_Application(void)
{
	Startup_VAR |= 0x10;
}

/*----------------------------------*/
void My_Suspend(void)
{
	MAL_POWER_OFF;
	PDDR &= ~0x01;		// PE0 : NAND CE1 = 0
	PDDR &= ~0x02;		// PE1 : NAND CE2 = 0
	PDDR &= ~0x04;		// PE2 : NAND CE3 = 0
	PDDR &= ~0x08;		// PE3 : NAND CE4 = 0
//	PDDR |= 0x10;		// PE4 : ICC = 1
}

/*----------------------------------*/
void My_EndSuspend(void)
{
	MAL_POWER_ON;
	// Delay to let regulator stable	
	asm {
		CLR	X
delay:	NOP
		DEC	X
		JRNE delay
	}

	PDDR |= 0x01;		// PE0 : NAND CE1 = 1
	PDDR |= 0x02;		// PE1 : NAND CE2 = 1
	PDDR |= 0x04;		// PE2 : NAND CE3 = 1
	PDDR |= 0x08;		// PE3 : NAND CE4 = 1
//	PDDR |= 0x10;		// PE4 : ICC = 1
}

extern unsigned char MAL_Mediano;
/*----------------------------------*/
void Select(void)
{
//	PFDR |= 0x04;		// PD0 : LED1 OFF
	PFDR |= 0x08;		// PF3 : LED1 OFF
//	PFDR &= ~0x08;		// PD1 : LED2 ON
	PFDR &= ~0x10;		// PF4 : LED2 ON

}

void Deselect(void)
{
	DESELECT_NAND;
//	PFDR &= ~0x04;		// PD0 : LED1 ON
	PFDR &= ~0x08;		// PF3 : LED1 ON
//	PFDR |= 0x08;		// PD1 : LED2 OFF
	PFDR |= 0x10;		// PF4 : LED2 OFF
}

/*----------------------------------*/
unsigned char isWrite_Protect()
{

	return 0;
}

/**************** (c) 2000  STMicroelectronics **********************/

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