📄 hardware.asm
字号:
.PUBLIC F_SP_RampUpDAC1
.PUBLIC F_SP_RampDnDAC1
.PUBLIC F_SP_RampUpDAC2
.PUBLIC F_SP_RampDnDAC2
.PUBLIC _SP_RampUpDAC1
.PUBLIC _SP_RampDnDAC1
.PUBLIC _SP_RampUpDAC2
.PUBLIC _SP_RampDnDAC2
.PUBLIC _SP_InitQueue
.PUBLIC _SP_InitQueue_A2000
.PUBLIC _SP_InitQueue_S480
.PUBLIC _SP_InitQueue_S240
.PUBLIC _SP_InitQueue_MS01
.PUBLIC _SP_InitQueue_DVR
.PUBLIC F_SP_InitQueue
.PUBLIC F_SP_InitQueue_A2000
.PUBLIC F_SP_InitQueue_S480
.PUBLIC F_SP_InitQueue_S240
.PUBLIC F_SP_InitQueue_MS01
.PUBLIC F_SP_InitQueue_DVR
.PUBLIC F_SP_ReadQueue
.PUBLIC F_SP_ReadQueue_A2000
.PUBLIC F_SP_ReadQueue_S480
.PUBLIC F_SP_ReadQueue_S240
.PUBLIC F_SP_ReadQueue_MS01
.PUBLIC F_SP_ReadQueue_DVR
.PUBLIC F_SP_ReadQueue_NIC
.PUBLIC F_SP_ReadQueue_NIC_A2000
.PUBLIC F_SP_ReadQueue_NIC_S480
.PUBLIC F_SP_ReadQueue_NIC_S240
.PUBLIC F_SP_ReadQueue_NIC_MS01
.PUBLIC F_SP_ReadQueue_NIC_DVR
.PUBLIC F_SP_WriteQueue
.PUBLIC F_SP_WriteQueue_A2000
.PUBLIC F_SP_WriteQueue_S480
.PUBLIC F_SP_WriteQueue_S240
.PUBLIC F_SP_WriteQueue_MS01
.PUBLIC F_SP_WriteQueue_DVR
.PUBLIC F_SP_TestQueue
.PUBLIC F_SP_TestQueue_A2000
.PUBLIC F_SP_TestQueue_S480
.PUBLIC F_SP_TestQueue_S240
.PUBLIC F_SP_TestQueue_MS01
.PUBLIC F_SP_TestQueue_DVR
.PUBLIC _SP_Export
.PUBLIC _SP_Import
.PUBLIC _SP_Init_IOB
.PUBLIC _SP_Init_IOA
.PUBLIC _SP_GetResource
.PUBLIC F_SP_GetResource
.PUBLIC F_SP_SACM_A2000_Init_
.PUBLIC F_SP_SACM_S480_Init_
.PUBLIC F_SP_SACM_S240_Init_
.PUBLIC F_SP_SACM_MS01_Init_
.PUBLIC F_SP_PlayMode0_
.PUBLIC F_SP_PlayMode1_
.PUBLIC F_SP_PlayMode2_
.PUBLIC F_SP_PlayMode3_
.PUBLIC F_SP_SACM_DVR_Init_
.PUBLIC F_SP_SACM_DVR_Rec_Init_
.PUBLIC F_SP_SACM_DVR_Play_Init_
.DEFINE P_IOA_Data 0x7000
.DEFINE P_IOA_Buffer 0x7001
.DEFINE P_IOA_Dir 0x7002
.DEFINE P_IOA_Attrib 0x7003
.DEFINE P_IOA_Latch 0x7004
.DEFINE P_IOB_Data 0x7005
.DEFINE P_IOB_Buffer 0x7006
.DEFINE P_IOB_Dir 0x7007
.DEFINE P_IOB_Attrib 0x7008
.DEFINE P_FeedBack 0x7009
.DEFINE P_TimerA_Data 0x700A
.DEFINE P_TimerA_Ctrl 0x700B
.DEFINE P_TimerB_Data 0x700C
.DEFINE P_TimerB_Ctrl 0x700D
.DEFINE P_TimeBase_Setup 0x700E
.DEFINE P_TimeBase_Clear 0x700F
.DEFINE P_INT_Mask 0x702D
.DEFINE P_INT_Ctrl 0x7010
.DEFINE P_INT_Clear 0x7011
.DEFINE P_Watchdog_Clear 0x7012
.DEFINE P_SystemClock 0x7013
.DEFINE P_ADC 0x7014
.DEFINE P_ADC_Ctrl 0x7015
.DEFINE P_ADC_Status 0x7015
.DEFINE P_DAC2 0x7016
.DEFINE P_PWM 0x7016
.DEFINE P_DAC1 0x7017
.DEFINE P_DAC_Ctrl 0x702A
.DEFINE P_IR_Ctrl 0x7018
.DEFINE P_LVD_Ctrl 0x7019
.DEFINE P_SIO_Data 0x701A
.DEFINE P_SIO_Addr_Low 0x701B
.DEFINE P_SIO_Addr_Mid 0x701C
.DEFINE P_SIO_Addr_High 0x701D
.DEFINE P_SIO_Ctrl 0x701E
.DEFINE P_SIO_Start 0x701F
.DEFINE P_SIO_Stop 0x7020
.DEFINE P_UART_Command1 0x7021
.DEFINE P_UART_Command2 0x7022
.DEFINE P_UART_Data 0x7023
.DEFINE P_UART_BaudScalarLow 0x7024
.DEFINE P_UART_BaudScalarHigh 0x7025
.DEFINE C_IRQ6_TMB2 0x0001
.DEFINE C_IRQ6_TMB1 0x0002
.DEFINE C_IRQ5_2Hz 0x0004
.DEFINE C_IRQ5_4Hz 0x0008
.DEFINE C_IRQ4_1KHz 0x0010
.DEFINE C_IRQ4_2KHz 0x0020
.DEFINE C_IRQ4_4KHz 0x0040
.DEFINE C_IRQ3_KEY 0x0080
.DEFINE C_IRQ3_EXT1 0x0100
.DEFINE C_IRQ3_EXT2 0x0200
.DEFINE C_IRQ2_TMB 0x0400
.DEFINE C_FIQ_TMB 0x0800
.DEFINE C_IRQ1_TMA 0x1000
.DEFINE C_FIQ_TMA 0x2000
.DEFINE C_IRQ0_PWM 0x4000
.DEFINE C_FIQ_PWM 0x8000
.DEFINE C_Fosc_2 0x0000
.DEFINE C_Fosc_256 0x0001
.DEFINE C_32768Hz 0x0002
.DEFINE C_8192Hz 0x0003
.DEFINE C_4096Hz 0x0004
.DEFINE C_A1 0x0005
.DEFINE C_A0 0x0006
.DEFINE C_Ext1 0x0007
.DEFINE C_2048Hz 0x0000
.DEFINE C_1024Hz 0x0008
.DEFINE C_256Hz 0x0010
.DEFINE C_TMB1Hz 0x0018
.DEFINE C_4Hz 0x0020
.DEFINE C_2Hz 0x0028
.DEFINE C_B1 0x0030
.DEFINE C_Ext2 0x0038
.DEFINE C_Off 0x0000
.DEFINE C_D1 0x0040
.DEFINE C_D2 0x0080
.DEFINE C_D3 0x00C0
.DEFINE C_D4 0x0100
.DEFINE C_D5 0x0140
.DEFINE C_D6 0x0180
.DEFINE C_D7 0x01C0
.DEFINE C_D8 0x0200
.DEFINE C_D9 0x0240
.DEFINE C_D10 0x0280
.DEFINE C_D11 0x02C0
.DEFINE C_D12 0x0300
.DEFINE C_D13 0x0340
.DEFINE C_D14 0x0380
.DEFINE C_TA_Div_2 0x03C0
.DEFINE C_TB_Div_2 0x03C0
.DEFINE C_Fosc 0x0000
.DEFINE C_Fosc_Div_2 0x0001
.DEFINE C_Fosc_Div_4 0x0002
.DEFINE C_Fosc_Div_8 0x0003
.DEFINE C_Fosc_Div_16 0x0004
.DEFINE C_Fosc_Div_32 0x0005
.DEFINE C_Fosc_Div_64 0x0006
.DEFINE C_Sleep 0x0007
.DEFINE C_32K_Work 0x0000
.DEFINE C_32K_Off 0x0000
.DEFINE C_StrongMode 0x0000
.DEFINE C_AutoMode 0x0000
.DEFINE C_AD 0x0001
.DEFINE C_DA 0x0000
.DEFINE C_MIC 0x0000
.DEFINE C_LINE 0x0002
.DEFINE C_PushPull 0x0000
.DEFINE C_DoubleEnd 0x0001
.DEFINE C_DAC_Mode 0x0000
.DEFINE C_PWM_Mode 0x0002
.DEFINE C_D1_Direct 0x0000
.DEFINE C_D1_LatchA 0x0008
.DEFINE C_D1_LatchB 0x0010
.DEFINE C_D1_LatchAB 0x0018
.DEFINE C_D2_Direct 0x0000
.DEFINE C_D2_LatchA 0x0020
.DEFINE C_D2_LatchB 0x0040
.DEFINE C_D2_LatchAB 0x00C0
.DEFINE C_LVD24V 0x0000
.DEFINE C_LVD28V 0x0001
.DEFINE C_LVD32V 0x0002
.DEFINE C_LVD36V 0x0003
.IRAM
.PUBLIC R_InterruptStatus
.VAR R_InterruptStatus = 0
.DEFINE C_RampDelayTime 32
.DEFINE C_QueueSize 144
.VAR R_Queue
.DW C_QueueSize-1 DUP(0)
.VAR R_ReadIndex
.VAR R_WriteIndex
.CODE
_SP_InitQueue: .PROC
_SP_InitQueue_A2000:
_SP_InitQueue_S480:
_SP_InitQueue_S240:
_SP_InitQueue_MS01:
_SP_InitQueue_DVR:
F_SP_InitQueue_A2000:
F_SP_InitQueue_S480:
F_SP_InitQueue_S240:
F_SP_InitQueue_MS01:
F_SP_InitQueue_DVR:
F_SP_InitQueue:
r1 = R_Queue
r2 = 0
L_ClearQueueLoop?:
[r1++] = r2
cmp r1, R_Queue+C_QueueSize
jne L_ClearQueueLoop?
r1 = 0
[R_ReadIndex] = r1
[R_WriteIndex] = r1
RETF
.ENDP
F_SP_ReadQueue_A2000:
F_SP_ReadQueue_S480:
F_SP_ReadQueue_S240:
F_SP_ReadQueue_MS01:
F_SP_ReadQueue_DVR:
F_SP_ReadQueue:
r2 = [R_ReadIndex]
cmp r2,[R_WriteIndex]
je L_RQ_QueueEmpty
r2 += R_Queue
r1 = [r2]
r2 = [R_ReadIndex]
r2 += 1
cmp r2, C_QueueSize
jne L_RQ_NotQueueBottom
r2 = 0
L_RQ_NotQueueBottom:
[R_ReadIndex] = r2
retf
L_RQ_QueueEmpty:
retf
F_SP_ReadQueue_NIC:
F_SP_ReadQueue_NIC_A2000:
F_SP_ReadQueue_NIC_S480:
F_SP_ReadQueue_NIC_S240:
F_SP_ReadQueue_NIC_MS01:
F_SP_ReadQueue_NIC_DVR:
r2 = [R_ReadIndex]
cmp r2,[R_WriteIndex]
je L_RQ_QueueEmpty?
r2 += R_Queue
r1 = [r2]
L_RQ_QueueEmpty?:
RETF
F_SP_WriteQueue_A2000:
F_SP_WriteQueue_S480:
F_SP_WriteQueue_S240:
F_SP_WriteQueue_MS01:
F_SP_WriteQueue_DVR:
F_SP_WriteQueue:
r2 = [R_WriteIndex]
r2 += R_Queue
[r2] = r1
r2 = [R_WriteIndex]
r2 += 1
cmp r2, C_QueueSize
jne L_WQ_NotQueueBottom
r2 = 0
L_WQ_NotQueueBottom:
[R_WriteIndex] = r2
RETF
F_SP_TestQueue_A2000:
F_SP_TestQueue_S480:
F_SP_TestQueue_S240:
F_SP_TestQueue_MS01:
F_SP_TestQueue_DVR:
F_SP_TestQueue:
r1 = [R_ReadIndex]
cmp r1,[R_WriteIndex]
je L_TQ_QueueEmpty
r1 = [R_ReadIndex]
jnz L_TQ_JudgeCond2
r1 = [R_WriteIndex]
cmp r1, C_QueueSize-1
je L_TQ_QueueFull
L_TQ_JudgeCond2:
r1 = [R_ReadIndex]
r1 -=1
cmp r1,[R_WriteIndex]
je L_TQ_QueueFull
r1 = 0
retf
L_TQ_QueueFull:
r1 = 1
retf
L_TQ_QueueEmpty:
r1 = 2
retf
F_SP_SACM_A2000_Init_:
r1=0x0000;
[P_SystemClock]=r1
r1 = 0x0030
[P_TimerA_Ctrl] = r1
r1 = 0xfd00
[P_TimerA_Data] = r1
r1 = 0x00A8
[P_DAC_Ctrl] = r1
r1 = 0xffff
[P_INT_Clear] = r1
r1 =0x0000
r1 = [P_INT_Mask]
r1 |= C_FIQ_TMA
[R_InterruptStatus] = r1
[P_INT_Ctrl] = r1
RETF
⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -