h2aux.a51

Vitesse 24port gigabit Switch Source Code

;*
;*
;*    Copyright (c) 2002-2005 Vitesse Semiconductor Corporation "Vitesse".  
;*    All Rights Reserved.  Unpublished rights reserved under the copyright laws
;*    of the United States of America, other countries and international treaties.
;*    The software is provided without a fee. Permission to use, copy, store and 
;*    modify, the software and its source code is granted. Permission to integrate
;*    into other products, disclose, transmit and distribute the software in an
;*    absolute machine readable format (e.g. HEX file) is also granted. 
;*
;*    The source code of the software may not be disclosed, transmitted or
;*    distributed without the written permission of Vitesse. The software and its
;*    source code may only be used in products utilizing a Vitesse VSC73xx product.
;* 
;*    This copyright notice must appear in any copy, modification, disclosure,
;*    transmission or distribution of the software. Vitesse retains all ownership,
;*    copyright, trade secret and proprietary rights in the software.  
;*
;*    THIS SOFTWARE HAS BEEN PROVIDED "AS IS," WITHOUT EXPRESS OR IMPLIED WARRANTY
;*    INCLUDING, WITHOUT LIMITATION, IMPLIED WARRANTIES OF MERCHANTABILITY,
;*    FITNESS FOR A PARTICULAR USE AND NON-INFRINGEMENT.
;*
;*
$NOMOD51
$INCLUDE (REG52.INC)

NAME    H2AUX

PUBLIC  _build_phy_write_cmd

H2PROG    SEGMENT CODE

        RSEG    H2PROG


;* ************************************************************************ */
;ulong build_phy_write_cmd (ushort value, uchar reg_no, uchar phy_no) small;
_build_phy_write_cmd:
;* ------------------------------------------------------------------------ --
;* Purpose     : Build 32-bit value to be written to MIIMCMD register for
;*               a write command. written in assembler for performance reasons.
;* Remarks     : value is in r6-r7, reg_no in r5 and phy_no in r3.
;* Restrictions:
;* See also    :
;* Example     :
; * ************************************************************************ */

        ;* mov phy_no to bit 25:21, ie. bit 9:5 of most significant 16 bits
        mov     a, r3   ; get phy no
        mov     b, #020H; shift left 5 times, ie. multiply with 32
        mul     ab      ; now b,a hold 16 most significant bits except for register no.
        ; mov reg_no to bit 20:16, ie. bit 4:0 of most significant 16 bits
        orl     a, r5   ; insert reg no

        ; deliver result in r4-r7 (r6-r7 already contain value)
        mov     r4, b
        mov     r5, a
		
        RET

        END