tsc2101regs.h

cayman提供的PXA270 wince下的bsp源码包

/*************************************************************/
//
// Copyright (c) Texas Instruments 2003.  All rights reserved.
//
/**************************************************************
THIS CODE AND INFORMATION IS PROVIDED "AS IS" WITHOUT WARRANTY
OF ANY KIND, EITHER EXPRESSED OR IMPLIED, INCLUDING BUT NOT
LIMITED TO THE IMPLIED WARRANTIES OF MERCHANTABILITY AND/OR 
FITNESS FOR A PARTICULAR PURPOSE.

Module Name:	
		TSC2101Regs.H

Abstract:	
		This header file contains the defination of the TSC2101
		device's control registers.

Functions:
  
Revision History:

***************************************************************/

#ifndef __TSC2101Regs_H__
#define __TSC2101Regs_H__

#define TSC2101_READ	0x8000
#define TSC2101_WRITE	0x0000

/*********************************
/*  TSC2101 Registers
*********************************/

// Data Registers (page0)
#define TSC2101_X		0x0000
#define TSC2101_Y		0x0020
#define TSC2101_Z1		0x0040
#define TSC2101_Z2		0x0060
#define TSC2101_BAT 	0x00A0
#define TSC2101_AUX1	0x00E0
#define TSC2101_AUX2	0x0100
#define TSC2101_TEMP1	0x0120
#define TSC2101_TEMP2	0x0140

// TouchScreen Control Registers (page1)
#define TSC2101_ADC		0x0800	
#define TSC2101_STATUS	0x0820
#define TSC2101_BUFFER	0x0840
#define TSC2101_REF		0x0860
#define TSC2101_RESET	0x0880
#define TSC2101_CFG		0x08A0
#define TSC2101_TEMPMAX	0x08C0
#define TSC2101_TEMPMIN	0x08E0
#define TSC2101_AUX1MAX	0x0900
#define TSC2101_AUX1MIN	0x0920
#define TSC2101_AUX2MAX	0x0940
#define TSC2101_AUX2MIN	0x0960
#define TSC2101_MCFG	0x0980
#define TSC2101_DELAY	0x09A0
#define TSC2101_RESETD	0x09C0

// Audio Control Registers (page2)
#define TSC2101_AUDCTL1		0x1000
#define TSC2101_HEDVOL		0x1020
#define TSC2101_DACVOL		0x1040
#define TSC2101_MIXER		0x1060
#define TSC2101_AUDCTL2		0x1080
#define TSC2101_AUDPD		0x10A0
#define TSC2101_AUDCTL3		0x10C0
#define TSC2101_BASSLN0		0x10E0
#define TSC2101_BASSLN1		0x1100
#define TSC2101_BASSLN2		0x1120
#define TSC2101_BASSLN3		0x1140
#define TSC2101_BASSLN4		0x1160
#define TSC2101_BASSLN5		0x1180
#define TSC2101_BASSLD1		0x11A0
#define TSC2101_BASSLD2		0x11C0
#define TSC2101_BASSLD4		0x11E0
#define TSC2101_BASSLD5		0x1200
#define TSC2101_BASSRN0		0x1220
#define TSC2101_BASSRN1		0x1240
#define TSC2101_BASSRN2		0x1260
#define TSC2101_BASSRN3		0x1280
#define TSC2101_BASSRN4		0x12A0
#define TSC2101_BASSRN5		0x12C0
#define TSC2101_BASSRD1		0x12E0
#define TSC2101_BASSRD2		0x1300
#define TSC2101_BASSRD4		0x1320
#define TSC2101_BASSRD5		0x1340
#define TSC2101_PLL1		0x1360
#define TSC2101_PLL2		0x1380
#define TSC2101_AUDCTL4		0x13A0
#define TSC2101_HNDVOL		0x13C0
#define TSC2101_CELLVOL		0x13E0
#define TSC2101_AUDCTL5		0x1400
#define TSC2101_AUDCTL6		0x1420
#define TSC2101_AUDCTL7		0x1440
#define TSC2101_GPIO		0x1460
#define TSC2101_CELLAGC     0x1480
#define TSC2101_DRVPD		0x14A0
#define TSC2101_MICAGC		0x14C0
#define TSC2101_CELLAGC2    0x14E0


/*********************************
/*  TSC2101 Register Definitions
*********************************/

/*
** Touch Screen
*/

// A/D Converter Control Register: TSC2101_ADC
// ControlMode
#define ADC_PSM_HOST	0x0000			
#define ADC_PSM_TSC		0x8000
#define ADC_PSM_PENUP	0x0000			
#define ADC_PSM_PENDOWN	0x8000

// ConversionControl
#define	ADC_STS_NORMAL	0x0000
#define	ADC_STS_STOP	0x4000

// A/D Function
#define ADC_AD_MASK			0x3C00
#define ADC_AD_NOSCAN		0x0000
#define	ADC_AD_XY_SCAN		0x0400
#define ADC_AD_XYZ_SCAN		0x0800
#define ADC_AD_X_SCAN		0x0C00
#define ADC_AD_Y_SCAN		0x1000
#define ADC_AD_Z_SCAN		0x1400
#define ADC_AD_BAT1_CONV	0x1800
#define ADC_AD_AUX2_CONV	0x1C00
#define ADC_AD_AUX1_CONV	0x2000
#define ADC_AD_AUTO_CONV	0x2400
#define ADC_AD_TEMP1_CONV	0x2800
#define ADC_AD_PORT_SCAN	0x2C00
#define ADC_AD_TEMP2_CONV	0x3000
#define ADC_AD_X_DRIVER		0x3400
#define ADC_AD_Y_DRIVER		0x3800
#define ADC_AD_Z_DRIVER		0x3C00

// A/D Resolution Control
#define ADC_RS_8		0x0100
#define ADC_RS_10		0x0200
#define ADC_RS_12		0x0300

// A/D Convert Averaging Control
#define ADC_AV_0		0x0000
#define ADC_AV_4		0x0040
#define ADC_AV_8		0x0080
#define ADC_AV_16		0x00C0

// A/D Convert Clock Control
#define ADC_CL_8MHz		0x0000
#define ADC_CL_4MHz		0x0010
#define ADC_CL_2MHz		0x0020
#define ADC_CL_1MHz		0x0030
 
// Panal Voltage Stabilization Time Control
#define ADC_PV_0uS		0x0000	
#define ADC_PV_100uS	0x0002
#define ADC_PV_500uS	0x0004
#define ADC_PV_1mS		0x0006
#define ADC_PV_5mS		0x0008
#define ADC_PV_10mS		0x000A
#define ADC_PV_50mS		0x000C
#define ADC_PV_100mS	0x000E

// Mean vs Median average mode
#define ADC_AVG_MEAN    0x0000
#define ADC_AVG_MEDIAN  0x0001

// Status Control Register: TSC2101_STATUS
#define STATUS_INT_PEN  0x0000
#define STATUS_INT_DATA 0x4000
#define STATUS_INT_BOTH 0x8000


// Reference Control Register: TSC2101_REF
// Internal Reference Mode
#define REF_INT_EXTERNAL 0x0000
#define REF_INT_INTERNAL 0x0010

// Power-Up Delay Reference
#define REF_DL_0uS		0x0000
#define REF_DL_100uS	0x0004
#define REF_DL_500uS	0x0008
#define REF_DL_1mS		0x000C

// Power Down Reference - Ref PowerDown between Conversions
#define REF_PDN_ON		0x0000
#define REF_PDN_OFF		0x0002

// Reference Volatage Control
#define REF_RFV_125		0x0000
#define REF_RFV_250		0x0001

// Reset Control Register: TSC2101_RESET
// Reset
#define RESET_RESET		0xBB00

// Configuration Control Register: TSC2101_CFG
// Precharge Time (in uSecond)
#define CFG_PRE_20		0x0000
#define CFG_PRE_84		0x0008
#define CFG_PRE_276		0x0010
#define CFG_PRE_340		0x0018
#define CFG_PRE_1044	0x0020
#define CFG_PRE_1108	0x0028
#define CFG_PRE_1300	0x0030
#define CFG_PRE_1364	0x0038

// Sense Time (in uSecond)
#define CFG_SNS_32		0x0000
#define CFG_SNS_96		0x0001
#define CFG_SNS_544		0x0002
#define CFG_SNS_608		0x0003
#define CFG_SNS_2080	0x0004
#define CFG_SNS_2144	0x0005
#define CFG_SNS_2592	0x0006
#define CFG_SNS_2656	0x0007

// Programable delay
#define DELAY_NTS_EN	0x8000
#define DELAY_NTS_112	0x0000
#define DELAY_NTS_336	0x1000
#define DELAY_NTS_559	0x2000
#define DELAY_NTS_783	0x3000
#define DELAY_NTS_1001	0x4000
#define DELAY_NTS_1230	0x5000
#define DELAY_NTS_1454	0x6000
#define DELAY_NTS_1678	0x7000
#define DELAY_TS_EN		0x0800
#define DELAY_TS_10		0x0000
#define DELAY_TS_30		0x0100
#define DELAY_TS_50		0x0200
#define DELAY_TS_65		0x0300
#define DELAY_TS_85		0x0400
#define DELAY_TS_100	0x0500
#define DELAY_TS_125	0x0600
#define DELAY_TS_150	0x0700
#define DELAY_CLK_EXT   0x0080
#define DELAY_CLK_INT   0x0000
#define DELAY_CLK_EXT   0x0080
#define DELAY_CLKDIV_M	0x001f

#define DELAY_CLKDIV_11 0x000B


/*
** Audio
*/

// Audio Control Register: TSC2101_AUDCTL1
// ADC High-Pass Filter
#define AUDCTL1_ADCHPF_DISABLED	0x0000
#define AUDCTL1_ADCHPF_00045Fs	0x4000
#define AUDCTL1_ADCHPF_00125Fs	0x8000
#define AUDCTL1_ADCHPF_0025Fs	0xC000

// Codec word length
#define AUDCTL1_WLEN_16			0x0000
#define AUDCTL1_WLEN_20			0x0400
#define AUDCTL1_WLEN_24			0x0800
#define AUDCTL1_WLEN_32			0x0C00

// Data format
#define AUDCTL1_DATFM_I2S		0x0000
#define AUDCTL1_DATFM_DSP		0x0100
#define AUDCTL1_DATFM_RIGHT		0x0200
#define AUDCTL1_DATFM_LEFT		0x0300

// DAC Sample rate
#define AUDCTL1_DACFS_1			0x0000
#define AUDCTL1_DACFS_1_5		0x0008
#define AUDCTL1_DACFS_2			0x0010
#define AUDCTL1_DACFS_3			0x0018
#define AUDCTL1_DACFS_4			0x0020
#define AUDCTL1_DACFS_5			0x0028
#define AUDCTL1_DACFS_5_5		0x0030
#define AUDCTL1_DACFS_6			0x0038

// ADC Sample rate
#define AUDCTL1_ADCFS_1			0x0000
#define AUDCTL1_ADCFS_1_5		0x0001
#define AUDCTL1_ADCFS_2			0x0002
#define AUDCTL1_ADCFS_3			0x0003
#define AUDCTL1_ADCFS_4			0x0004
#define AUDCTL1_ADCFS_5			0x0005
#define AUDCTL1_ADCFS_5_5		0x0006
#define AUDCTL1_ADCFS_6			0x0007


// Gain Control for Headset/Aux: TSC2101_HEDVOL
// Heaset/Aux Input Mute
#define HEDVOL_ADMUT_ACTIVE		0x0000
#define HEDVOL_ADMUT_MUTE		0x8000

// ADC Headset/Aux PGA Settings
#define HEDVOL_ADPGA_MASK		0x7f00

// AGC Target Gain for Headset/Aux input.
#define HEDVOL_AGCTG_05_5		0x0000
#define HEDVOL_AGCTG_08			0x0020
#define HEDVOL_AGCTG_10			0x0040
#define HEDVOL_AGCTG_12			0x0060
#define HEDVOL_AGCTG_14			0x0080
#define HEDVOL_AGCTG_17			0x00a0
#define HEDVOL_AGCTG_20			0x00c0
#define HEDVOL_AGCTG_24			0x00e0

// AGC Time constant for Headset/Aux Input
#define HEDVOL_AGCTC_8_100		0x0000
#define HEDVOL_AGCTC_11_100		0x0002
#define HEDVOL_AGCTC_16_100		0x0004
#define HEDVOL_AGCTC_20_100		0x0006
#define HEDVOL_AGCTC_8_200		0x0008
#define HEDVOL_AGCTC_11_200		0x000a
#define HEDVOL_AGCTC_16_200		0x000c
#define HEDVOL_AGCTC_20_200		0x000e
#define HEDVOL_AGCTC_8_400		0x0010
#define HEDVOL_AGCTC_11_400		0x0012
#define HEDVOL_AGCTC_16_400		0x0014
#define HEDVOL_AGCTC_20_400		0x0016
#define HEDVOL_AGCTC_8_500		0x0018
#define HEDVOL_AGCTC_11_500		0x001a
#define HEDVOL_AGCTC_16_500		0x001c
#define HEDVOL_AGCTC_20_500		0x001e

// AGC Enable for Headset/Aux Input
#define HEDVOL_AGCEN_OFF		0x0000
#define HEDVOL_AGCEN_ON			0x0001

// DAC Volume Control Register: TSC2101_DACVOL
// Left DAC Mute
#define DACVOL_DALMU_ACTIVE		0x0000
#define DACVOL_DALMU_MUTE		0x8000

// Right DAC Mute
#define DACVOL_DARMU_ACTIVE		0x0000
#define DACVOL_DARMU_MUTE		0x0080

// Mixer PGA Control Register: TSC2101_MIXER
// Analog Sidetone Mute Control
#define MIXER_ASTMU_ACTIVE		0x0000
#define MIXER_ASTMU_MUTE		0x0001

// Analog sidetone gain setting
#define MIXER_ASTG_MASK			0x7f00

// Selection for Mic Input and Aux Input for side-tone
#define MIXER_MICSEL_SHED		0x0000
#define MIXER_MICSEL_SHND		0x0020
#define MIXER_MICSEL_SAUX1		0x0040
#define MIXER_MICSEL_SAUX2		0x0060
#define MIXER_MICSEL_DHED		0x0080
#define MIXER_MICSEL_DHND		0x00a0
#define MIXER_MICSEL_DAUX1		0x00c0
#define MIXER_MICSEL_DAUX2		0x00e0

// Selection of ADC INput
#define MIXER_MICADC_NONE		0x0000
#define MIXER_MICADC_MICSEL		0x0010

// Connects Cell phone input to ADC
#define MIXER_CPADC_NONE		0x0000
#define MIXER_CPADC_CELL		0x0008

// Analog sidetone PGA Flag
#define MIXER_ASTGF_SOFT		0x0000
#define MIXER_ASTCF_DONE		0x0001

// Audio Control 2 Register: TSC2101_AUDCTL2
// Keyclick enable
#define AUDCTL2_KCLEN_OFF		0x0000
#define AUDCTL2_KCLEN_ON		0x8000

// Keyclick amplitude
#define AUDCTL2_KCLAC_MASK		0x7000

// Headset/Aux of Handset PGA Soft-stepping
#define AUDCTL2_APGASS_ONE		0x0000
#define AUDCTL2_APGASS_TWO		0x0800

// Keyclick Frequency
#define AUDCTL2_KCLFRQ_MASK		0x0700

// Keyclick length
#define AUDCTL2_KCLLN_MASK		0x00f0