exam2.tan.summary

使用C8051F020和FPGA设计的低频信号相位测量仪器

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Timing Analyzer Summary
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Type           : Worst-case tsu
Slack          : N/A
Required Time  : None
Actual Time    : 9.000 ns
From           : ENA
To             : lpm_counter:BZQ_rtl_0|alt_counter_f10ke:wysi_counter|q[9]
From Clock     : --
To Clock       : BCLK
Failed Paths   : 0

Type           : Worst-case tco
Slack          : N/A
Required Time  : None
Actual Time    : 23.100 ns
From           : SIN_ROM:u3|lpm_rom:lpm_rom_component|altrom:srom|q[7]~reg_ra9
To             : FOUT[7]
From Clock     : CLKIN_12M
To Clock       : --
Failed Paths   : 0

Type           : Worst-case th
Slack          : N/A
Required Time  : None
Actual Time    : 3.000 ns
From           : WORD[6]
To             : FWORD[6]
From Clock     : --
To Clock       : W_CLK
Failed Paths   : 0

Type           : Clock Setup: 'CLKIN_12M'
Slack          : N/A
Required Time  : None
Actual Time    : 89.29 MHz ( period = 11.200 ns )
From           : REG24B:u2|DOUT[0]
To             : REG24B:u2|DOUT[23]
From Clock     : CLKIN_12M
To Clock       : CLKIN_12M
Failed Paths   : 0

Type           : Clock Setup: 'SCLK0'
Slack          : N/A
Required Time  : None
Actual Time    : 104.17 MHz ( period = 9.600 ns )
From           : lpm_counter:TSQ_rtl_1|alt_counter_f10ke:wysi_counter|q[0]
To             : lpm_counter:TSQ_rtl_1|alt_counter_f10ke:wysi_counter|q[31]
From Clock     : SCLK0
To Clock       : SCLK0
Failed Paths   : 0

Type           : Clock Setup: 'BCLK'
Slack          : N/A
Required Time  : None
Actual Time    : 104.17 MHz ( period = 9.600 ns )
From           : lpm_counter:TSQ_rtl_1|alt_counter_f10ke:wysi_counter|q[0]
To             : lpm_counter:TSQ_rtl_1|alt_counter_f10ke:wysi_counter|q[31]
From Clock     : BCLK
To Clock       : BCLK
Failed Paths   : 0

Type           : Clock Setup: 'SCLK1'
Slack          : N/A
Required Time  : None
Actual Time    : 104.17 MHz ( period = 9.600 ns )
From           : lpm_counter:TSQ_rtl_1|alt_counter_f10ke:wysi_counter|q[0]
To             : lpm_counter:TSQ_rtl_1|alt_counter_f10ke:wysi_counter|q[31]
From Clock     : SCLK1
To Clock       : SCLK1
Failed Paths   : 0

Type           : Clock Setup: 'W_CLK'
Slack          : N/A
Required Time  : None
Actual Time    : 200.00 MHz ( period = 5.000 ns )
From           : STATE.s1
To             : FWORD[0]
From Clock     : W_CLK
To Clock       : W_CLK
Failed Paths   : 0

Type           : Total number of failed paths
Slack          : 
Required Time  : 
Actual Time    : 
From           : 
To             : 
From Clock     : 
To Clock       : 
Failed Paths   : 0

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