⭐ 欢迎来到虫虫下载站！ | 📦 资源下载 📁 资源专辑 ℹ️ 关于我们
⭐ 虫虫下载站
📤 上传资源

📄 exam2.fit.eqn

📁 使用C8051F020和FPGA设计的低频信号相位测量仪器
💻 EQN
📖 第 1 页 / 共 5 页
字号:
🔍
12345 
-- Copyright (C) 1991-2005 Altera Corporation
-- Your use of Altera Corporation's design tools, logic functions 
-- and other software and tools, and its AMPP partner logic 
-- functions, and any output files any of the foregoing 
-- (including device programming or simulation files), and any 
-- associated documentation or information are expressly subject 
-- to the terms and conditions of the Altera Program License 
-- Subscription Agreement, Altera MegaCore Function License 
-- Agreement, or other applicable license agreement, including, 
-- without limitation, that your use is for the sole purpose of 
-- programming logic devices manufactured by Altera and sold by 
-- Altera or its authorized distributors.  Please refer to the 
-- applicable agreement for further details.
--K1_q[0] is SIN_ROM:u3|lpm_rom:lpm_rom_component|altrom:srom|q[0] at EC1_E
K1_q[0]_clock_0 = CLK_6M;
K1_q[0]_write_address = WR_ADDR(~GND, ~GND, ~GND, ~GND, ~GND, ~GND, ~GND, ~GND, ~GND, ~GND);
K1_q[0]_read_address = RD_ADDR(~GND, ~GND, ~GND, ~GND, ~GND, ~GND, ~GND, ~GND, ~GND, ~GND);
K1_q[0] = MEMORY_SEGMENT(, , K1_q[0]_clock_0, , , , , , K1_q[0]_write_address, K1_q[0]_read_address);


--K1_q[1] is SIN_ROM:u3|lpm_rom:lpm_rom_component|altrom:srom|q[1] at EC2_C
K1_q[1]_clock_0 = CLK_6M;
K1_q[1]_write_address = WR_ADDR(~GND, ~GND, ~GND, ~GND, ~GND, ~GND, ~GND, ~GND, ~GND, ~GND);
K1_q[1]_read_address = RD_ADDR(~GND, ~GND, ~GND, ~GND, ~GND, ~GND, ~GND, ~GND, ~GND, ~GND);
K1_q[1] = MEMORY_SEGMENT(, , K1_q[1]_clock_0, , , , , , K1_q[1]_write_address, K1_q[1]_read_address);


--K1_q[2] is SIN_ROM:u3|lpm_rom:lpm_rom_component|altrom:srom|q[2] at EC10_C
K1_q[2]_clock_0 = CLK_6M;
K1_q[2]_write_address = WR_ADDR(~GND, ~GND, ~GND, ~GND, ~GND, ~GND, ~GND, ~GND, ~GND, ~GND);
K1_q[2]_read_address = RD_ADDR(~GND, ~GND, ~GND, ~GND, ~GND, ~GND, ~GND, ~GND, ~GND, ~GND);
K1_q[2] = MEMORY_SEGMENT(, , K1_q[2]_clock_0, , , , , , K1_q[2]_write_address, K1_q[2]_read_address);


--K1_q[3] is SIN_ROM:u3|lpm_rom:lpm_rom_component|altrom:srom|q[3] at EC1_C
K1_q[3]_clock_0 = CLK_6M;
K1_q[3]_write_address = WR_ADDR(~GND, ~GND, ~GND, ~GND, ~GND, ~GND, ~GND, ~GND, ~GND, ~GND);
K1_q[3]_read_address = RD_ADDR(~GND, ~GND, ~GND, ~GND, ~GND, ~GND, ~GND, ~GND, ~GND, ~GND);
K1_q[3] = MEMORY_SEGMENT(, , K1_q[3]_clock_0, , , , , , K1_q[3]_write_address, K1_q[3]_read_address);


--K1_q[4] is SIN_ROM:u3|lpm_rom:lpm_rom_component|altrom:srom|q[4] at EC9_C
K1_q[4]_clock_0 = CLK_6M;
K1_q[4]_write_address = WR_ADDR(~GND, ~GND, ~GND, ~GND, ~GND, ~GND, ~GND, ~GND, ~GND, ~GND);
K1_q[4]_read_address = RD_ADDR(~GND, ~GND, ~GND, ~GND, ~GND, ~GND, ~GND, ~GND, ~GND, ~GND);
K1_q[4] = MEMORY_SEGMENT(, , K1_q[4]_clock_0, , , , , , K1_q[4]_write_address, K1_q[4]_read_address);


--K1_q[5] is SIN_ROM:u3|lpm_rom:lpm_rom_component|altrom:srom|q[5] at EC2_A
K1_q[5]_clock_0 = CLK_6M;
K1_q[5]_write_address = WR_ADDR(~GND, ~GND, ~GND, ~GND, ~GND, ~GND, ~GND, ~GND, ~GND, ~GND);
K1_q[5]_read_address = RD_ADDR(~GND, ~GND, ~GND, ~GND, ~GND, ~GND, ~GND, ~GND, ~GND, ~GND);
K1_q[5] = MEMORY_SEGMENT(, , K1_q[5]_clock_0, , , , , , K1_q[5]_write_address, K1_q[5]_read_address);


--K1_q[6] is SIN_ROM:u3|lpm_rom:lpm_rom_component|altrom:srom|q[6] at EC10_A
K1_q[6]_clock_0 = CLK_6M;
K1_q[6]_write_address = WR_ADDR(~GND, ~GND, ~GND, ~GND, ~GND, ~GND, ~GND, ~GND, ~GND, ~GND);
K1_q[6]_read_address = RD_ADDR(~GND, ~GND, ~GND, ~GND, ~GND, ~GND, ~GND, ~GND, ~GND, ~GND);
K1_q[6] = MEMORY_SEGMENT(, , K1_q[6]_clock_0, , , , , , K1_q[6]_write_address, K1_q[6]_read_address);


--K1_q[7] is SIN_ROM:u3|lpm_rom:lpm_rom_component|altrom:srom|q[7] at EC1_A
K1_q[7]_clock_0 = CLK_6M;
K1_q[7]_write_address = WR_ADDR(~GND, ~GND, ~GND, ~GND, ~GND, ~GND, ~GND, ~GND, ~GND, ~GND);
K1_q[7]_read_address = RD_ADDR(~GND, ~GND, ~GND, ~GND, ~GND, ~GND, ~GND, ~GND, ~GND, ~GND);
K1_q[7] = MEMORY_SEGMENT(, , K1_q[7]_clock_0, , , , , , K1_q[7]_write_address, K1_q[7]_read_address);


--K1_q[8] is SIN_ROM:u3|lpm_rom:lpm_rom_component|altrom:srom|q[8] at EC9_A
K1_q[8]_clock_0 = CLK_6M;
K1_q[8]_write_address = WR_ADDR(~GND, ~GND, ~GND, ~GND, ~GND, ~GND, ~GND, ~GND, ~GND, ~GND);
K1_q[8]_read_address = RD_ADDR(~GND, ~GND, ~GND, ~GND, ~GND, ~GND, ~GND, ~GND, ~GND, ~GND);
K1_q[8] = MEMORY_SEGMENT(, , K1_q[8]_clock_0, , , , , , K1_q[8]_write_address, K1_q[8]_read_address);


--K1_q[9] is SIN_ROM:u3|lpm_rom:lpm_rom_component|altrom:srom|q[9] at EC2_B
K1_q[9]_clock_0 = CLK_6M;
K1_q[9]_write_address = WR_ADDR(~GND, ~GND, ~GND, ~GND, ~GND, ~GND, ~GND, ~GND, ~GND, ~GND);
K1_q[9]_read_address = RD_ADDR(~GND, ~GND, ~GND, ~GND, ~GND, ~GND, ~GND, ~GND, ~GND, ~GND);
K1_q[9] = MEMORY_SEGMENT(, , K1_q[9]_clock_0, , , , , , K1_q[9]_write_address, K1_q[9]_read_address);


--K2_q[0] is SIN_ROM:u6|lpm_rom:lpm_rom_component|altrom:srom|q[0] at EC10_B
K2_q[0]_clock_0 = CLK_6M;
K2_q[0]_write_address = WR_ADDR(~GND, ~GND, ~GND, ~GND, ~GND, ~GND, ~GND, ~GND, ~GND, ~GND);
K2_q[0]_read_address = RD_ADDR(~GND, ~GND, ~GND, ~GND, ~GND, ~GND, ~GND, ~GND, ~GND, ~GND);
K2_q[0] = MEMORY_SEGMENT(, , K2_q[0]_clock_0, , , , , , K2_q[0]_write_address, K2_q[0]_read_address);


--K2_q[1] is SIN_ROM:u6|lpm_rom:lpm_rom_component|altrom:srom|q[1] at EC1_B
K2_q[1]_clock_0 = CLK_6M;
K2_q[1]_write_address = WR_ADDR(~GND, ~GND, ~GND, ~GND, ~GND, ~GND, ~GND, ~GND, ~GND, ~GND);
K2_q[1]_read_address = RD_ADDR(~GND, ~GND, ~GND, ~GND, ~GND, ~GND, ~GND, ~GND, ~GND, ~GND);
K2_q[1] = MEMORY_SEGMENT(, , K2_q[1]_clock_0, , , , , , K2_q[1]_write_address, K2_q[1]_read_address);


--K2_q[2] is SIN_ROM:u6|lpm_rom:lpm_rom_component|altrom:srom|q[2] at EC9_B
K2_q[2]_clock_0 = CLK_6M;
K2_q[2]_write_address = WR_ADDR(~GND, ~GND, ~GND, ~GND, ~GND, ~GND, ~GND, ~GND, ~GND, ~GND);
K2_q[2]_read_address = RD_ADDR(~GND, ~GND, ~GND, ~GND, ~GND, ~GND, ~GND, ~GND, ~GND, ~GND);
K2_q[2] = MEMORY_SEGMENT(, , K2_q[2]_clock_0, , , , , , K2_q[2]_write_address, K2_q[2]_read_address);


--K2_q[3] is SIN_ROM:u6|lpm_rom:lpm_rom_component|altrom:srom|q[3] at EC2_F
K2_q[3]_clock_0 = CLK_6M;
K2_q[3]_write_address = WR_ADDR(~GND, ~GND, ~GND, ~GND, ~GND, ~GND, ~GND, ~GND, ~GND, ~GND);
K2_q[3]_read_address = RD_ADDR(~GND, ~GND, ~GND, ~GND, ~GND, ~GND, ~GND, ~GND, ~GND, ~GND);
K2_q[3] = MEMORY_SEGMENT(, , K2_q[3]_clock_0, , , , , , K2_q[3]_write_address, K2_q[3]_read_address);


--K2_q[4] is SIN_ROM:u6|lpm_rom:lpm_rom_component|altrom:srom|q[4] at EC10_F
K2_q[4]_clock_0 = CLK_6M;
K2_q[4]_write_address = WR_ADDR(~GND, ~GND, ~GND, ~GND, ~GND, ~GND, ~GND, ~GND, ~GND, ~GND);
K2_q[4]_read_address = RD_ADDR(~GND, ~GND, ~GND, ~GND, ~GND, ~GND, ~GND, ~GND, ~GND, ~GND);
K2_q[4] = MEMORY_SEGMENT(, , K2_q[4]_clock_0, , , , , , K2_q[4]_write_address, K2_q[4]_read_address);


--K2_q[5] is SIN_ROM:u6|lpm_rom:lpm_rom_component|altrom:srom|q[5] at EC1_F
K2_q[5]_clock_0 = CLK_6M;
K2_q[5]_write_address = WR_ADDR(~GND, ~GND, ~GND, ~GND, ~GND, ~GND, ~GND, ~GND, ~GND, ~GND);
K2_q[5]_read_address = RD_ADDR(~GND, ~GND, ~GND, ~GND, ~GND, ~GND, ~GND, ~GND, ~GND, ~GND);
K2_q[5] = MEMORY_SEGMENT(, , K2_q[5]_clock_0, , , , , , K2_q[5]_write_address, K2_q[5]_read_address);


--K2_q[6] is SIN_ROM:u6|lpm_rom:lpm_rom_component|altrom:srom|q[6] at EC9_F
K2_q[6]_clock_0 = CLK_6M;
K2_q[6]_write_address = WR_ADDR(~GND, ~GND, ~GND, ~GND, ~GND, ~GND, ~GND, ~GND, ~GND, ~GND);
K2_q[6]_read_address = RD_ADDR(~GND, ~GND, ~GND, ~GND, ~GND, ~GND, ~GND, ~GND, ~GND, ~GND);
K2_q[6] = MEMORY_SEGMENT(, , K2_q[6]_clock_0, , , , , , K2_q[6]_write_address, K2_q[6]_read_address);


--K2_q[7] is SIN_ROM:u6|lpm_rom:lpm_rom_component|altrom:srom|q[7] at EC10_E
K2_q[7]_clock_0 = CLK_6M;
K2_q[7]_write_address = WR_ADDR(~GND, ~GND, ~GND, ~GND, ~GND, ~GND, ~GND, ~GND, ~GND, ~GND);
K2_q[7]_read_address = RD_ADDR(~GND, ~GND, ~GND, ~GND, ~GND, ~GND, ~GND, ~GND, ~GND, ~GND);
K2_q[7] = MEMORY_SEGMENT(, , K2_q[7]_clock_0, , , , , , K2_q[7]_write_address, K2_q[7]_read_address);


--K2_q[8] is SIN_ROM:u6|lpm_rom:lpm_rom_component|altrom:srom|q[8] at EC2_E
K2_q[8]_clock_0 = CLK_6M;
K2_q[8]_write_address = WR_ADDR(~GND, ~GND, ~GND, ~GND, ~GND, ~GND, ~GND, ~GND, ~GND, ~GND);
K2_q[8]_read_address = RD_ADDR(~GND, ~GND, ~GND, ~GND, ~GND, ~GND, ~GND, ~GND, ~GND, ~GND);
K2_q[8] = MEMORY_SEGMENT(, , K2_q[8]_clock_0, , , , , , K2_q[8]_write_address, K2_q[8]_read_address);


--K2_q[9] is SIN_ROM:u6|lpm_rom:lpm_rom_component|altrom:srom|q[9] at EC9_E
K2_q[9]_clock_0 = CLK_6M;
K2_q[9]_write_address = WR_ADDR(~GND, ~GND, ~GND, ~GND, ~GND, ~GND, ~GND, ~GND, ~GND, ~GND);
K2_q[9]_read_address = RD_ADDR(~GND, ~GND, ~GND, ~GND, ~GND, ~GND, ~GND, ~GND, ~GND, ~GND);
K2_q[9] = MEMORY_SEGMENT(, , K2_q[9]_clock_0, , , , , , K2_q[9]_write_address, K2_q[9]_read_address);


--A1L184Q is QOUT~reg0 at LC7_F21
--operation mode is normal

A1L184Q_lut_out = SCLK0;
A1L184Q = DFFEA(A1L184Q_lut_out, GLOBAL(SCLK1), , , , , );

--A1L183Q is QOUT~1 at LC7_F21
--operation mode is normal

A1L183Q = A1L184Q;


--CLK_6M is CLK_6M at LC1_C7
--operation mode is normal

CLK_6M_lut_out = !CLK_6M;
CLK_6M = DFFEA(CLK_6M_lut_out, GLOBAL(CLKIN_12M), , , , , );

--A1L4Q is CLK_6M~1 at LC1_C7
--operation mode is normal

A1L4Q = CLK_6M;


--A1L193 is SEL_WORD~18 at LC2_F8
--operation mode is normal

A1L193 = !CL & (!SEL[1] & !SEL[2] # !SEL[3]);

--A1L194 is SEL_WORD~19 at LC2_F8
--operation mode is normal

A1L194 = !CL & (!SEL[1] & !SEL[2] # !SEL[3]);


--H1_q[16] is lpm_counter:BZQ_rtl_0|alt_counter_f10ke:wysi_counter|q[16] at LC1_F14
--operation mode is clrb_cntr

H1_q[16]_lut_out = (H1_q[16] $ (ENA & H1L33)) & VCC;
H1_q[16] = DFFEA(H1_q[16]_lut_out, GLOBAL(BCLK), !CLR, , ENA, , );

--H1L99Q is lpm_counter:BZQ_rtl_0|alt_counter_f10ke:wysi_counter|q[16]~0 at LC1_F14
--operation mode is clrb_cntr

H1L99Q = H1_q[16];

--H1L35 is lpm_counter:BZQ_rtl_0|alt_counter_f10ke:wysi_counter|counter_cell[16]~COUT at LC1_F14
--operation mode is clrb_cntr

H1L35 = CARRY(H1_q[16] & (H1L33));


--H1_q[8] is lpm_counter:BZQ_rtl_0|alt_counter_f10ke:wysi_counter|q[8] at LC1_F12
--operation mode is clrb_cntr

H1_q[8]_lut_out = (H1_q[8] $ (ENA & H1L17)) & VCC;
H1_q[8] = DFFEA(H1_q[8]_lut_out, GLOBAL(BCLK), !CLR, , ENA, , );

--H1L83Q is lpm_counter:BZQ_rtl_0|alt_counter_f10ke:wysi_counter|q[8]~1 at LC1_F12
--operation mode is clrb_cntr

H1L83Q = H1_q[8];

--H1L19 is lpm_counter:BZQ_rtl_0|alt_counter_f10ke:wysi_counter|counter_cell[8]~COUT at LC1_F12
--operation mode is clrb_cntr

H1L19 = CARRY(H1_q[8] & (H1L17));


--H1_q[24] is lpm_counter:BZQ_rtl_0|alt_counter_f10ke:wysi_counter|q[24] at LC1_F16
--operation mode is clrb_cntr

H1_q[24]_lut_out = (H1_q[24] $ (ENA & H1L49)) & VCC;
H1_q[24] = DFFEA(H1_q[24]_lut_out, GLOBAL(BCLK), !CLR, , ENA, , );

--H1L115Q is lpm_counter:BZQ_rtl_0|alt_counter_f10ke:wysi_counter|q[24]~2 at LC1_F16
--operation mode is clrb_cntr

H1L115Q = H1_q[24];

--H1L51 is lpm_counter:BZQ_rtl_0|alt_counter_f10ke:wysi_counter|counter_cell[24]~COUT at LC1_F16
--operation mode is clrb_cntr

H1L51 = CARRY(H1_q[24] & (H1L49));


--A1L55 is Mux~1117 at LC3_F2
--operation mode is normal

A1L55 = SEL[0] & (SEL[1]) # !SEL[0] & (SEL[1] & H1_q[8] # !SEL[1] & (H1_q[24]));

--A1L104 is Mux~1182 at LC3_F2
--operation mode is normal

A1L104 = SEL[0] & (SEL[1]) # !SEL[0] & (SEL[1] & H1_q[8] # !SEL[1] & (H1_q[24]));


--H1_q[0] is lpm_counter:BZQ_rtl_0|alt_counter_f10ke:wysi_counter|q[0] at LC1_F10
--operation mode is clrb_cntr

H1_q[0]_lut_out = (ENA $ H1_q[0]) & VCC;
H1_q[0] = DFFEA(H1_q[0]_lut_out, GLOBAL(BCLK), !CLR, , ENA, , );

--H1L67Q is lpm_counter:BZQ_rtl_0|alt_counter_f10ke:wysi_counter|q[0]~3 at LC1_F10
--operation mode is clrb_cntr

H1L67Q = H1_q[0];

--H1L3 is lpm_counter:BZQ_rtl_0|alt_counter_f10ke:wysi_counter|counter_cell[0]~COUT at LC1_F10
--operation mode is clrb_cntr

H1L3 = CARRY(H1_q[0]);


--A1L56 is Mux~1118 at LC5_F2
--operation mode is normal

A1L56 = SEL[0] & (A1L55 & (H1_q[0]) # !A1L55 & H1_q[16]) # !SEL[0] & (A1L55);

--A1L105 is Mux~1183 at LC5_F2
--operation mode is normal

A1L105 = SEL[0] & (A1L55 & (H1_q[0]) # !A1L55 & H1_q[16]) # !SEL[0] & (A1L55);


--H2_q[8] is lpm_counter:TSQ_rtl_1|alt_counter_f10ke:wysi_counter|q[8] at LC1_F32
--operation mode is clrb_cntr

H2_q[8]_lut_out = (H2_q[8] $ (ENA & H2L17)) & VCC;
H2_q[8] = DFFEA(H2_q[8]_lut_out, TCLK, !CLR, , ENA, , );

--H2L83Q is lpm_counter:TSQ_rtl_1|alt_counter_f10ke:wysi_counter|q[8]~0 at LC1_F32
--operation mode is clrb_cntr

H2L83Q = H2_q[8];

--H2L19 is lpm_counter:TSQ_rtl_1|alt_counter_f10ke:wysi_counter|counter_cell[8]~COUT at LC1_F32
--operation mode is clrb_cntr

H2L19 = CARRY(H2_q[8] & (H2L17));


--H2_q[16] is lpm_counter:TSQ_rtl_1|alt_counter_f10ke:wysi_counter|q[16] at LC1_F34
--operation mode is clrb_cntr

H2_q[16]_lut_out = (H2_q[16] $ (ENA & H2L33)) & VCC;
H2_q[16] = DFFEA(H2_q[16]_lut_out, TCLK, !CLR, , ENA, , );

--H2L99Q is lpm_counter:TSQ_rtl_1|alt_counter_f10ke:wysi_counter|q[16]~1 at LC1_F34
--operation mode is clrb_cntr

H2L99Q = H2_q[16];

--H2L35 is lpm_counter:TSQ_rtl_1|alt_counter_f10ke:wysi_counter|counter_cell[16]~COUT at LC1_F34
--operation mode is clrb_cntr

H2L35 = CARRY(H2_q[16] & (H2L33));


--H2_q[24] is lpm_counter:TSQ_rtl_1|alt_counter_f10ke:wysi_counter|q[24] at LC1_F36
--operation mode is clrb_cntr

H2_q[24]_lut_out = (H2_q[24] $ (ENA & H2L49)) & VCC;
H2_q[24] = DFFEA(H2_q[24]_lut_out, TCLK, !CLR, , ENA, , );

--H2L115Q is lpm_counter:TSQ_rtl_1|alt_counter_f10ke:wysi_counter|q[24]~2 at LC1_F36
--operation mode is clrb_cntr

H2L115Q = H2_q[24];

--H2L51 is lpm_counter:TSQ_rtl_1|alt_counter_f10ke:wysi_counter|counter_cell[24]~COUT at LC1_F36
--operation mode is clrb_cntr

H2L51 = CARRY(H2_q[24] & (H2L49));


--A1L57 is Mux~1119 at LC6_F2
--operation mode is normal

A1L57 = SEL[1] & (SEL[0]) # !SEL[1] & (SEL[0] & H2_q[16] # !SEL[0] & (H2_q[24]));

--A1L106 is Mux~1184 at LC6_F2
--operation mode is normal

A1L106 = SEL[1] & (SEL[0]) # !SEL[1] & (SEL[0] & H2_q[16] # !SEL[0] & (H2_q[24]));


--H2_q[0] is lpm_counter:TSQ_rtl_1|alt_counter_f10ke:wysi_counter|q[0] at LC1_F30
--operation mode is clrb_cntr

H2_q[0]_lut_out = (ENA $ H2_q[0]) & VCC;
H2_q[0] = DFFEA(H2_q[0]_lut_out, TCLK, !CLR, , ENA, , );

--H2L67Q is lpm_counter:TSQ_rtl_1|alt_counter_f10ke:wysi_counter|q[0]~3 at LC1_F30
--operation mode is clrb_cntr

H2L67Q = H2_q[0];

--H2L3 is lpm_counter:TSQ_rtl_1|alt_counter_f10ke:wysi_counter|counter_cell[0]~COUT at LC1_F30
--operation mode is clrb_cntr

H2L3 = CARRY(H2_q[0]);


--A1L58 is Mux~1120 at LC7_F2
--operation mode is normal

A1L58 = SEL[1] & (A1L57 & (H2_q[0]) # !A1L57 & H2_q[8]) # !SEL[1] & (A1L57);

--A1L107 is Mux~1185 at LC7_F2
--operation mode is normal

A1L107 = SEL[1] & (A1L57 & (H2_q[0]) # !A1L57 & H2_q[8]) # !SEL[1] & (A1L57);


--A1L59 is Mux~1121 at LC1_F2
--operation mode is normal

A1L59 = SEL[3] # SEL[2] & (!A1L58) # !SEL[2] & !A1L56;

--A1L108 is Mux~1186 at LC1_F2
--operation mode is normal

A1L108 = SEL[3] # SEL[2] & (!A1L58) # !SEL[2] & !A1L56;

--A1L109 is Mux~1187 at LC1_F2
--operation mode is normal

A1L109 = SEL[3] # SEL[2] & (!A1L58) # !SEL[2] & !A1L56;


--H3_q[8] is lpm_counter:SQ_rtl_2|alt_counter_f10ke:wysi_counter|q[8] at LC1_F3
--operation mode is clrb_cntr

H3_q[8]_lut_out = (H3_q[8] $ (ENA & H3L17)) & VCC;
H3_q[8] = DFFEA(H3_q[8]_lut_out, GLOBAL(SCLK0), !CLR, , ENA, , );

--H3L51Q is lpm_counter:SQ_rtl_2|alt_counter_f10ke:wysi_counter|q[8]~0 at LC1_F3
--operation mode is clrb_cntr

H3L51Q = H3_q[8];

--H3L19 is lpm_counter:SQ_rtl_2|alt_counter_f10ke:wysi_counter|counter_cell[8]~COUT at LC1_F3
--operation mode is clrb_cntr

H3L19 = CARRY(H3_q[8] & (H3L17));


--H3_q[0] is lpm_counter:SQ_rtl_2|alt_counter_f10ke:wysi_counter|q[0] at LC1_F1
--operation mode is clrb_cntr

H3_q[0]_lut_out = (ENA $ H3_q[0]) & VCC;
H3_q[0] = DFFEA(H3_q[0]_lut_out, GLOBAL(SCLK0), !CLR, , ENA, , );

--H3L35Q is lpm_counter:SQ_rtl_2|alt_counter_f10ke:wysi_counter|q[0]~1 at LC1_F1
--operation mode is clrb_cntr
12345

⌨️ 快捷键说明

复制代码 Ctrl + C
搜索代码 Ctrl + F
全屏模式 F11
切换主题 Ctrl + Shift + D
显示快捷键 ?
增大字号 Ctrl + =
减小字号 Ctrl + -