exam2.map.qmsg

使用C8051F020和FPGA设计的低频信号相位测量仪器

{ "Info" "ISGN_MEGAFN_DESCENDANT" "ADDER10B:u4\|lpm_add_sub:Add0\|addcore:adder\|a_csnbuffer:oflow_node ADDER10B:u4\|lpm_add_sub:Add0 " "Info: Elaborated megafunction instantiation \"ADDER10B:u4\|lpm_add_sub:Add0\|addcore:adder\|a_csnbuffer:oflow_node\", which is child of megafunction instantiation \"ADDER10B:u4\|lpm_add_sub:Add0\"" {  } { { "addcore.tdf" "" { Text "d:/altera/70/quartus/libraries/megafunctions/addcore.tdf" 94 2 0 } } { "d:/altera/70/quartus/libraries/vhdl/synopsys/syn_arit.vhd" "" { Text "d:/altera/70/quartus/libraries/vhdl/synopsys/syn_arit.vhd" 836 -1 0 } }  } 0 0 "Elaborated megafunction instantiation \"%1!s!\", which is child of megafunction instantiation \"%2!s!\"" 0 0}
{ "Info" "ISGN_MEGAFN_PARAM_TOP" "ADDER10B:u4\|lpm_add_sub:Add0 " "Info: Instantiated megafunction \"ADDER10B:u4\|lpm_add_sub:Add0\" with the following parameter:" { { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_WIDTH 10 " "Info: Parameter \"LPM_WIDTH\" = \"10\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_DIRECTION ADD " "Info: Parameter \"LPM_DIRECTION\" = \"ADD\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_REPRESENTATION UNSIGNED " "Info: Parameter \"LPM_REPRESENTATION\" = \"UNSIGNED\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "ONE_INPUT_IS_CONSTANT NO " "Info: Parameter \"ONE_INPUT_IS_CONSTANT\" = \"NO\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0}  } { { "d:/altera/70/quartus/libraries/vhdl/synopsys/syn_arit.vhd" "" { Text "d:/altera/70/quartus/libraries/vhdl/synopsys/syn_arit.vhd" 836 -1 0 } }  } 0 0 "Instantiated megafunction \"%1!s!\" with the following parameter:" 0 0}
{ "Info" "ISGN_MEGAFN_DESCENDANT" "ADDER10B:u4\|lpm_add_sub:Add0\|addcore:adder\|a_csnbuffer:result_node ADDER10B:u4\|lpm_add_sub:Add0 " "Info: Elaborated megafunction instantiation \"ADDER10B:u4\|lpm_add_sub:Add0\|addcore:adder\|a_csnbuffer:result_node\", which is child of megafunction instantiation \"ADDER10B:u4\|lpm_add_sub:Add0\"" {  } { { "addcore.tdf" "" { Text "d:/altera/70/quartus/libraries/megafunctions/addcore.tdf" 120 6 0 } } { "d:/altera/70/quartus/libraries/vhdl/synopsys/syn_arit.vhd" "" { Text "d:/altera/70/quartus/libraries/vhdl/synopsys/syn_arit.vhd" 836 -1 0 } }  } 0 0 "Elaborated megafunction instantiation \"%1!s!\", which is child of megafunction instantiation \"%2!s!\"" 0 0}
{ "Info" "ISGN_MEGAFN_PARAM_TOP" "ADDER10B:u4\|lpm_add_sub:Add0 " "Info: Instantiated megafunction \"ADDER10B:u4\|lpm_add_sub:Add0\" with the following parameter:" { { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_WIDTH 10 " "Info: Parameter \"LPM_WIDTH\" = \"10\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_DIRECTION ADD " "Info: Parameter \"LPM_DIRECTION\" = \"ADD\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_REPRESENTATION UNSIGNED " "Info: Parameter \"LPM_REPRESENTATION\" = \"UNSIGNED\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "ONE_INPUT_IS_CONSTANT NO " "Info: Parameter \"ONE_INPUT_IS_CONSTANT\" = \"NO\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0}  } { { "d:/altera/70/quartus/libraries/vhdl/synopsys/syn_arit.vhd" "" { Text "d:/altera/70/quartus/libraries/vhdl/synopsys/syn_arit.vhd" 836 -1 0 } }  } 0 0 "Instantiated megafunction \"%1!s!\" with the following parameter:" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "d:/altera/70/quartus/libraries/megafunctions/altshift.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file d:/altera/70/quartus/libraries/megafunctions/altshift.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 altshift " "Info: Found entity 1: altshift" {  } { { "altshift.tdf" "" { Text "d:/altera/70/quartus/libraries/megafunctions/altshift.tdf" 30 1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0}
{ "Info" "ISGN_MEGAFN_DESCENDANT" "ADDER10B:u4\|lpm_add_sub:Add0\|altshift:result_ext_latency_ffs ADDER10B:u4\|lpm_add_sub:Add0 " "Info: Elaborated megafunction instantiation \"ADDER10B:u4\|lpm_add_sub:Add0\|altshift:result_ext_latency_ffs\", which is child of megafunction instantiation \"ADDER10B:u4\|lpm_add_sub:Add0\"" {  } { { "lpm_add_sub.tdf" "" { Text "d:/altera/70/quartus/libraries/megafunctions/lpm_add_sub.tdf" 286 2 0 } } { "d:/altera/70/quartus/libraries/vhdl/synopsys/syn_arit.vhd" "" { Text "d:/altera/70/quartus/libraries/vhdl/synopsys/syn_arit.vhd" 836 -1 0 } }  } 0 0 "Elaborated megafunction instantiation \"%1!s!\", which is child of megafunction instantiation \"%2!s!\"" 0 0}
{ "Info" "ISGN_MEGAFN_PARAM_TOP" "ADDER10B:u4\|lpm_add_sub:Add0 " "Info: Instantiated megafunction \"ADDER10B:u4\|lpm_add_sub:Add0\" with the following parameter:" { { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_WIDTH 10 " "Info: Parameter \"LPM_WIDTH\" = \"10\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_DIRECTION ADD " "Info: Parameter \"LPM_DIRECTION\" = \"ADD\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_REPRESENTATION UNSIGNED " "Info: Parameter \"LPM_REPRESENTATION\" = \"UNSIGNED\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "ONE_INPUT_IS_CONSTANT NO " "Info: Parameter \"ONE_INPUT_IS_CONSTANT\" = \"NO\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0}  } { { "d:/altera/70/quartus/libraries/vhdl/synopsys/syn_arit.vhd" "" { Text "d:/altera/70/quartus/libraries/vhdl/synopsys/syn_arit.vhd" 836 -1 0 } }  } 0 0 "Instantiated megafunction \"%1!s!\" with the following parameter:" 0 0}
{ "Info" "ISGN_MEGAFN_DESCENDANT" "ADDER10B:u4\|lpm_add_sub:Add0\|altshift:carry_ext_latency_ffs ADDER10B:u4\|lpm_add_sub:Add0 " "Info: Elaborated megafunction instantiation \"ADDER10B:u4\|lpm_add_sub:Add0\|altshift:carry_ext_latency_ffs\", which is child of megafunction instantiation \"ADDER10B:u4\|lpm_add_sub:Add0\"" {  } { { "lpm_add_sub.tdf" "" { Text "d:/altera/70/quartus/libraries/megafunctions/lpm_add_sub.tdf" 288 2 0 } } { "d:/altera/70/quartus/libraries/vhdl/synopsys/syn_arit.vhd" "" { Text "d:/altera/70/quartus/libraries/vhdl/synopsys/syn_arit.vhd" 836 -1 0 } }  } 0 0 "Elaborated megafunction instantiation \"%1!s!\", which is child of megafunction instantiation \"%2!s!\"" 0 0}
{ "Info" "ISGN_MEGAFN_PARAM_TOP" "ADDER10B:u4\|lpm_add_sub:Add0 " "Info: Instantiated megafunction \"ADDER10B:u4\|lpm_add_sub:Add0\" with the following parameter:" { { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_WIDTH 10 " "Info: Parameter \"LPM_WIDTH\" = \"10\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_DIRECTION ADD " "Info: Parameter \"LPM_DIRECTION\" = \"ADD\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_REPRESENTATION UNSIGNED " "Info: Parameter \"LPM_REPRESENTATION\" = \"UNSIGNED\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "ONE_INPUT_IS_CONSTANT NO " "Info: Parameter \"ONE_INPUT_IS_CONSTANT\" = \"NO\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0}  } { { "d:/altera/70/quartus/libraries/vhdl/synopsys/syn_arit.vhd" "" { Text "d:/altera/70/quartus/libraries/vhdl/synopsys/syn_arit.vhd" 836 -1 0 } }  } 0 0 "Instantiated megafunction \"%1!s!\" with the following parameter:" 0 0}
{ "Info" "ISGN_ELABORATION_HEADER" "ADDER24B:u1\|lpm_add_sub:Add0 " "Info: Elaborated megafunction instantiation \"ADDER24B:u1\|lpm_add_sub:Add0\"" {  } { { "d:/altera/70/quartus/libraries/vhdl/synopsys/syn_arit.vhd" "" { Text "d:/altera/70/quartus/libraries/vhdl/synopsys/syn_arit.vhd" 836 -1 0 } }  } 0 0 "Elaborated megafunction instantiation \"%1!s!\"" 0 0}
{ "Info" "ISGN_MEGAFN_DESCENDANT" "ADDER24B:u1\|lpm_add_sub:Add0\|addcore:adder ADDER24B:u1\|lpm_add_sub:Add0 " "Info: Elaborated megafunction instantiation \"ADDER24B:u1\|lpm_add_sub:Add0\|addcore:adder\", which is child of megafunction instantiation \"ADDER24B:u1\|lpm_add_sub:Add0\"" {  } { { "lpm_add_sub.tdf" "" { Text "d:/altera/70/quartus/libraries/megafunctions/lpm_add_sub.tdf" 268 4 0 } } { "d:/altera/70/quartus/libraries/vhdl/synopsys/syn_arit.vhd" "" { Text "d:/altera/70/quartus/libraries/vhdl/synopsys/syn_arit.vhd" 836 -1 0 } }  } 0 0 "Elaborated megafunction instantiation \"%1!s!\", which is child of megafunction instantiation \"%2!s!\"" 0 0}
{ "Info" "ISGN_MEGAFN_PARAM_TOP" "ADDER24B:u1\|lpm_add_sub:Add0 " "Info: Instantiated megafunction \"ADDER24B:u1\|lpm_add_sub:Add0\" with the following parameter:" { { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_WIDTH 24 " "Info: Parameter \"LPM_WIDTH\" = \"24\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_DIRECTION ADD " "Info: Parameter \"LPM_DIRECTION\" = \"ADD\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_REPRESENTATION UNSIGNED " "Info: Parameter \"LPM_REPRESENTATION\" = \"UNSIGNED\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "ONE_INPUT_IS_CONSTANT NO " "Info: Parameter \"ONE_INPUT_IS_CONSTANT\" = \"NO\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0}  } { { "d:/altera/70/quartus/libraries/vhdl/synopsys/syn_arit.vhd" "" { Text "d:/altera/70/quartus/libraries/vhdl/synopsys/syn_arit.vhd" 836 -1 0 } }  } 0 0 "Instantiated megafunction \"%1!s!\" with the following parameter:" 0 0}
{ "Info" "ISGN_MEGAFN_DESCENDANT" "ADDER24B:u1\|lpm_add_sub:Add0\|addcore:adder\|a_csnbuffer:oflow_node ADDER24B:u1\|lpm_add_sub:Add0 " "Info: Elaborated megafunction instantiation \"ADDER24B:u1\|lpm_add_sub:Add0\|addcore:adder\|a_csnbuffer:oflow_node\", which is child of megafunction instantiation \"ADDER24B:u1\|lpm_add_sub:Add0\"" {  } { { "addcore.tdf" "" { Text "d:/altera/70/quartus/libraries/megafunctions/addcore.tdf" 94 2 0 } } { "d:/altera/70/quartus/libraries/vhdl/synopsys/syn_arit.vhd" "" { Text "d:/altera/70/quartus/libraries/vhdl/synopsys/syn_arit.vhd" 836 -1 0 } }  } 0 0 "Elaborated megafunction instantiation \"%1!s!\", which is child of megafunction instantiation \"%2!s!\"" 0 0}
{ "Info" "ISGN_MEGAFN_PARAM_TOP" "ADDER24B:u1\|lpm_add_sub:Add0 " "Info: Instantiated megafunction \"ADDER24B:u1\|lpm_add_sub:Add0\" with the following parameter:" { { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_WIDTH 24 " "Info: Parameter \"LPM_WIDTH\" = \"24\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_DIRECTION ADD " "Info: Parameter \"LPM_DIRECTION\" = \"ADD\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_REPRESENTATION UNSIGNED " "Info: Parameter \"LPM_REPRESENTATION\" = \"UNSIGNED\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "ONE_INPUT_IS_CONSTANT NO " "Info: Parameter \"ONE_INPUT_IS_CONSTANT\" = \"NO\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0}  } { { "d:/altera/70/quartus/libraries/vhdl/synopsys/syn_arit.vhd" "" { Text "d:/altera/70/quartus/libraries/vhdl/synopsys/syn_arit.vhd" 836 -1 0 } }  } 0 0 "Instantiated megafunction \"%1!s!\" with the following parameter:" 0 0}
{ "Info" "ISGN_MEGAFN_DESCENDANT" "ADDER24B:u1\|lpm_add_sub:Add0\|addcore:adder\|a_csnbuffer:result_node ADDER24B:u1\|lpm_add_sub:Add0 " "Info: Elaborated megafunction instantiation \"ADDER24B:u1\|lpm_add_sub:Add0\|addcore:adder\|a_csnbuffer:result_node\", which is child of megafunction instantiation \"ADDER24B:u1\|lpm_add_sub:Add0\"" {  } { { "addcore.tdf" "" { Text "d:/altera/70/quartus/libraries/megafunctions/addcore.tdf" 120 6 0 } } { "d:/altera/70/quartus/libraries/vhdl/synopsys/syn_arit.vhd" "" { Text "d:/altera/70/quartus/libraries/vhdl/synopsys/syn_arit.vhd" 836 -1 0 } }  } 0 0 "Elaborated megafunction instantiation \"%1!s!\", which is child of megafunction instantiation \"%2!s!\"" 0 0}
{ "Info" "ISGN_MEGAFN_PARAM_TOP" "ADDER24B:u1\|lpm_add_sub:Add0 " "Info: Instantiated megafunction \"ADDER24B:u1\|lpm_add_sub:Add0\" with the following parameter:" { { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_WIDTH 24 " "Info: Parameter \"LPM_WIDTH\" = \"24\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_DIRECTION ADD " "Info: Parameter \"LPM_DIRECTION\" = \"ADD\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_REPRESENTATION UNSIGNED " "Info: Parameter \"LPM_REPRESENTATION\" = \"UNSIGNED\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "ONE_INPUT_IS_CONSTANT NO " "Info: Parameter \"ONE_INPUT_IS_CONSTANT\" = \"NO\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0}  } { { "d:/altera/70/quartus/libraries/vhdl/synopsys/syn_arit.vhd" "" { Text "d:/altera/70/quartus/libraries/vhdl/synopsys/syn_arit.vhd" 836 -1 0 } }  } 0 0 "Instantiated megafunction \"%1!s!\" with the following parameter:" 0 0}
{ "Info" "ISGN_MEGAFN_DESCENDANT" "ADDER24B:u1\|lpm_add_sub:Add0\|altshift:result_ext_latency_ffs ADDER24B:u1\|lpm_add_sub:Add0 " "Info: Elaborated megafunction instantiation \"ADDER24B:u1\|lpm_add_sub:Add0\|altshift:result_ext_latency_ffs\", which is child of megafunction instantiation \"ADDER24B:u1\|lpm_add_sub:Add0\"" {  } { { "lpm_add_sub.tdf" "" { Text "d:/altera/70/quartus/libraries/megafunctions/lpm_add_sub.tdf" 286 2 0 } } { "d:/altera/70/quartus/libraries/vhdl/synopsys/syn_arit.vhd" "" { Text "d:/altera/70/quartus/libraries/vhdl/synopsys/syn_arit.vhd" 836 -1 0 } }  } 0 0 "Elaborated megafunction instantiation \"%1!s!\", which is child of megafunction instantiation \"%2!s!\"" 0 0}
{ "Info" "ISGN_MEGAFN_PARAM_TOP" "ADDER24B:u1\|lpm_add_sub:Add0 " "Info: Instantiated megafunction \"ADDER24B:u1\|lpm_add_sub:Add0\" with the following parameter:" { { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_WIDTH 24 " "Info: Parameter \"LPM_WIDTH\" = \"24\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_DIRECTION ADD " "Info: Parameter \"LPM_DIRECTION\" = \"ADD\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_REPRESENTATION UNSIGNED " "Info: Parameter \"LPM_REPRESENTATION\" = \"UNSIGNED\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "ONE_INPUT_IS_CONSTANT NO " "Info: Parameter \"ONE_INPUT_IS_CONSTANT\" = \"NO\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0}  } { { "d:/altera/70/quartus/libraries/vhdl/synopsys/syn_arit.vhd" "" { Text "d:/altera/70/quartus/libraries/vhdl/synopsys/syn_arit.vhd" 836 -1 0 } }  } 0 0 "Instantiated megafunction \"%1!s!\" with the following parameter:" 0 0}
{ "Info" "IOPT_SMP_MACHINE_PREPROCESS_STAT_NO_BITS" "\|SIN\|STATE 4 " "Info: State machine \"\|SIN\|STATE\" contains 4 states" {  } { { "SIN.vhd" "" { Text "G:/seoul/EP1K30TC144/项目一/低频数字相位测试仪/f16_P10_fretest/定稿1/SIN.vhd" 28 -1 0 } }  } 0 0 "State machine \"%1!s!\" contains %2!d! states" 0 0}
{ "Info" "IOPT_SMP_MACHINE_REPORT_PROCESSOR" "Auto \|SIN\|STATE " "Info: Selected Auto state machine encoding method for state machine \"\|SIN\|STATE\"" {  } { { "SIN.vhd" "" { Text "G:/seoul/EP1K30TC144/项目一/低频数字相位测试仪/f16_P10_fretest/定稿1/SIN.vhd" 28 -1 0 } }  } 0 0 "Selected %1!s! state machine encoding method for state machine \"%2!s!\"" 0 0}
{ "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_HEADER" "\|SIN\|STATE " "Info: Encoding result for state machine \"\|SIN\|STATE\"" { { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS_HEADER" "4 " "Info: Completed encoding using 4 state bits" { { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "STATE.s3 " "Info: Encoded state bit \"STATE.s3\"" {  } { { "SIN.vhd" "" { Text "G:/seoul/EP1K30TC144/项目一/低频数字相位测试仪/f16_P10_fretest/定稿1/SIN.vhd" 28 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "STATE.s2 " "Info: Encoded state bit \"STATE.s2\"" {  } { { "SIN.vhd" "" { Text "G:/seoul/EP1K30TC144/项目一/低频数字相位测试仪/f16_P10_fretest/定稿1/SIN.vhd" 28 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "STATE.s1 " "Info: Encoded state bit \"STATE.s1\"" {  } { { "SIN.vhd" "" { Text "G:/seoul/EP1K30TC144/项目一/低频数字相位测试仪/f16_P10_fretest/定稿1/SIN.vhd" 28 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "STATE.s0 " "Info: Encoded state bit \"STATE.s0\"" {  } { { "SIN.vhd" "" { Text "G:/seoul/EP1K30TC144/项目一/低频数字相位测试仪/f16_P10_fretest/定稿1/SIN.vhd" 28 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0}  } {  } 0 0 "Completed encoding using %1!d! state bits" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|SIN\|STATE.s0 0000 " "Info: State \"\|SIN\|STATE.s0\" uses code string \"0000\"" {  } { { "SIN.vhd" "" { Text "G:/seoul/EP1K30TC144/项目一/低频数字相位测试仪/f16_P10_fretest/定稿1/SIN.vhd" 28 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|SIN\|STATE.s1 0011 " "Info: State \"\|SIN\|STATE.s1\" uses code string \"0011\"" {  } { { "SIN.vhd" "" { Text "G:/seoul/EP1K30TC144/项目一/低频数字相位测试仪/f16_P10_fretest/定稿1/SIN.vhd" 28 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|SIN\|STATE.s2 0101 " "Info: State \"\|SIN\|STATE.s2\" uses code string \"0101\"" {  } { { "SIN.vhd" "" { Text "G:/seoul/EP1K30TC144/项目一/低频数字相位测试仪/f16_P10_fretest/定稿1/SIN.vhd" 28 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|SIN\|STATE.s3 1001 " "Info: State \"\|SIN\|STATE.s3\" uses code string \"1001\"" {  } { { "SIN.vhd" "" { Text "G:/seoul/EP1K30TC144/项目一/低频数字相位测试仪/f16_P10_fretest/定稿1/SIN.vhd" 28 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0}  } { { "SIN.vhd" "" { Text "G:/seoul/EP1K30TC144/项目一/低频数字相位测试仪/f16_P10_fretest/定稿1/SIN.vhd" 28 -1 0 } }  } 0 0 "Encoding result for state machine \"%1!s!\"" 0 0}
{ "Warning" "WOPT_OPT_REMOVED_ALWAYS_ENABLED_TRI" "SIN_ROM:u3\|lpm_rom:lpm_rom_component\|otri\[0\] " "Warning: Removed always-enabled tri-state buffer SIN_ROM:u3\|lpm_rom:lpm_rom_component\|otri\[0\] feeding logic, open-drain buffer, or output pin" {  } { { "lpm_rom.tdf" "" { Text "d:/altera/70/quartus/libraries/megafunctions/lpm_rom.tdf" 67 6 0 } }  } 0 0 "Removed always-enabled tri-state buffer %1!s! feeding logic, open-drain buffer, or output pin" 0 0}
{ "Warning" "WOPT_OPT_REMOVED_ALWAYS_ENABLED_TRI" "SIN_ROM:u3\|lpm_rom:lpm_rom_component\|otri\[1\] " "Warning: Removed always-enabled tri-state buffer SIN_ROM:u3\|lpm_rom:lpm_rom_component\|otri\[1\] feeding logic, open-drain buffer, or output pin" {  } { { "lpm_rom.tdf" "" { Text "d:/altera/70/quartus/libraries/megafunctions/lpm_rom.tdf" 67 6 0 } }  } 0 0 "Removed always-enabled tri-state buffer %1!s! feeding logic, open-drain buffer, or output pin" 0 0}