csl_cachehal.h

在DSP6416T上实现的二次引导程序

*
* L2ALLOC0 - L2 allocation register 0 (1)
*
* Fields:
* (rw) Q0CNT (2) (3)
*
* (1) only supported for C6400
* (2) default value is different from L2ALLOC1, L2ALLOC2, L2ALLOC3
* (3) Rename bit filed based on spru610
*
\******************************************************************************/
#if (L2CACHE_SUPPORT && C64_SUPPORT)
  #define _CACHE_L2ALLOC0_ADDR               0x01842000u

  #define _CACHE_L2ALLOC0_Q0CNT_MASK       0x00000007u
  #define _CACHE_L2ALLOC0_Q0CNT_SHIFT      0x00000000u
  #define  CACHE_L2ALLOC0_Q0CNT_DEFAULT    0x00000006u
  #define  CACHE_L2ALLOC0_Q0CNT_OF(x)      _VALUEOF(x)

  #define _CACHE_L2ALLOC0_L2ALLOC_MASK       _CACHE_L2ALLOC0_Q0CNT_MASK   
  #define _CACHE_L2ALLOC0_L2ALLOC_SHIFT      _CACHE_L2ALLOC0_Q0CNT_SHIFT  
  #define  CACHE_L2ALLOC0_L2ALLOC_DEFAULT     CACHE_L2ALLOC0_Q0CNT_DEFAULT
  #define  CACHE_L2ALLOC0_L2ALLOC_OF(x)       CACHE_L2ALLOC0_Q0CNT_OF(x)  

  #define  CACHE_L2ALLOC0_OF(x)            _VALUEOF(x)

  #define CACHE_L2ALLOC0_DEFAULT (Uint32)( \
     _PER_FDEFAULT(CACHE,L2ALLOC0,Q0CNT) \
  )

  #define CACHE_L2ALLOC0_RMK(q0cnt)(Uint32)( \
     _PER_FMK(CACHE,L2ALLOC0,Q0CNT,q0cnt) \
  )

  #define _CACHE_L2ALLOC0_FGET(FIELD)\
    _PER_FGET(_CACHE_L2ALLOC0_ADDR,CACHE,L2ALLOC0,##FIELD)

  #define _CACHE_L2ALLOC0_FSET(FIELD,field)\
    _PER_FSET(_CACHE_L2ALLOC0_ADDR,CACHE,L2ALLOC0,##FIELD,field)

  #define _CACHE_L2ALLOC0_FSETS(FIELD,SYM)\
    _PER_FSETS(_CACHE_L2ALLOC0_ADDR,CACHE,L2ALLOC0,##FIELD,##SYM)

#endif

/******************************************************************************\
* _____________________
* |                   |
* |  L 2 A L L O C 1  |
* |___________________|
*
* L2ALLOC1 - L2 allocation register 1 (1)
*
* Fields:
* (rw) Q1CNT (2)
*
* (1) only supported for C6400
* (2) Rename bit filed based on spru610
*
\******************************************************************************/
#if (L2CACHE_SUPPORT && C64_SUPPORT)
  #define _CACHE_L2ALLOC1_ADDR             0x01842004u

  #define _CACHE_L2ALLOC1_Q1CNT_MASK       0x00000007u
  #define _CACHE_L2ALLOC1_Q1CNT_SHIFT      0x00000000u
  #define  CACHE_L2ALLOC1_Q1CNT_DEFAULT    0x00000002u
  #define  CACHE_L2ALLOC1_Q1CNT_OF(x)      _VALUEOF(x)

  #define _CACHE_L2ALLOC1_L2ALLOC_MASK     _CACHE_L2ALLOC1_Q1CNT_MASK   
  #define _CACHE_L2ALLOC1_L2ALLOC_SHIFT    _CACHE_L2ALLOC1_Q1CNT_SHIFT  
  #define  CACHE_L2ALLOC1_L2ALLOC_DEFAULT   CACHE_L2ALLOC1_Q1CNT_DEFAULT
  #define  CACHE_L2ALLOC1_L2ALLOC_OF(x)     CACHE_L2ALLOC1_Q1CNT_OF(x)  

  #define  CACHE_L2ALLOC1_OF(x)            _VALUEOF(x)

  #define CACHE_L2ALLOC1_DEFAULT (Uint32)( \
     _PER_FDEFAULT(CACHE,L2ALLOC1,Q1CNT) \
  )

  #define CACHE_L2ALLOC1_RMK(q1cnt) (Uint32)( \
     _PER_FMK(CACHE,L2ALLOC1,Q1CNT,q1cnt) \
  )

  #define _CACHE_L2ALLOC1_FGET(FIELD)\
    _PER_FGET(_CACHE_L2ALLOC1_ADDR,CACHE,L2ALLOC1,##FIELD)

  #define _CACHE_L2ALLOC1_FSET(FIELD,field)\
    _PER_FSET(_CACHE_L2ALLOC1_ADDR,CACHE,L2ALLOC1,##FIELD,field)

  #define _CACHE_L2ALLOC1_FSETS(FIELD,SYM)\
    _PER_FSETS(_CACHE_L2ALLOC1_ADDR,CACHE,L2ALLOC1,##FIELD,##SYM)

#endif

/******************************************************************************\
* _____________________
* |                   |
* |  L 2 A L L O C 2  |
* |___________________|
*
* L2ALLOC2 - L2 allocation register 2 (1)
*
* Fields:
* (rw) Q2CNT (2)
*
* (1) only supported for C6400
* (2) Rename bit filed based on spru610
*
\******************************************************************************/
#if (L2CACHE_SUPPORT && C64_SUPPORT)
  #define _CACHE_L2ALLOC2_ADDR               0x01842008u

  #define _CACHE_L2ALLOC2_Q2CNT_MASK       0x00000007u
  #define _CACHE_L2ALLOC2_Q2CNT_SHIFT      0x00000000u
  #define  CACHE_L2ALLOC2_Q2CNT_DEFAULT    0x00000002u
  #define  CACHE_L2ALLOC2_Q2CNT_OF(x)      _VALUEOF(x)

  #define _CACHE_L2ALLOC2_L2ALLOC_MASK       _CACHE_L2ALLOC2_Q2CNT_MASK   
  #define _CACHE_L2ALLOC2_L2ALLOC_SHIFT      _CACHE_L2ALLOC2_Q2CNT_SHIFT  
  #define  CACHE_L2ALLOC2_L2ALLOC_DEFAULT     CACHE_L2ALLOC2_Q2CNT_DEFAULT
  #define  CACHE_L2ALLOC2_L2ALLOC_OF(x)       CACHE_L2ALLOC2_Q2CNT_OF(x)  

  #define  CACHE_L2ALLOC2_OF(x)            _VALUEOF(x)

  #define CACHE_L2ALLOC2_DEFAULT (Uint32)( \
     _PER_FDEFAULT(CACHE,L2ALLOC2,Q2CNT) \
  )

  #define CACHE_L2ALLOC2_RMK(q2cnt) (Uint32)( \
     _PER_FMK(CACHE,L2ALLOC2,Q2CNT,q2cnt) \
  )

  #define _CACHE_L2ALLOC2_FGET(FIELD)\
    _PER_FGET(_CACHE_L2ALLOC2_ADDR,CACHE,L2ALLOC2,##FIELD)

  #define _CACHE_L2ALLOC2_FSET(FIELD,field)\
    _PER_FSET(_CACHE_L2ALLOC2_ADDR,CACHE,L2ALLOC2,##FIELD,field)

  #define _CACHE_L2ALLOC2_FSETS(FIELD,SYM)\
    _PER_FSETS(_CACHE_L2ALLOC2_ADDR,CACHE,L2ALLOC2,##FIELD,##SYM)

#endif

/******************************************************************************\
* _____________________
* |                   |
* |  L 2 A L L O C 3  |
* |___________________|
*
* L2ALLOC3 - L2 allocation register 3 (1)
*
* Fields:
* (rw) Q2CNT (2)
*
* (1) only supported for C6400
* (2) Rename bit filed based on spru610
*
\******************************************************************************/
#if (L2CACHE_SUPPORT && C64_SUPPORT)
  #define _CACHE_L2ALLOC3_ADDR               0x0184200Cu

  #define _CACHE_L2ALLOC3_Q3CNT_MASK       0x00000007u
  #define _CACHE_L2ALLOC3_Q3CNT_SHIFT      0x00000000u
  #define  CACHE_L2ALLOC3_Q3CNT_DEFAULT    0x00000002u
  #define  CACHE_L2ALLOC3_Q3CNT_OF(x)      _VALUEOF(x)

  #define _CACHE_L2ALLOC3_L2ALLOC_MASK       _CACHE_L2ALLOC3_Q3CNT_MASK    
  #define _CACHE_L2ALLOC3_L2ALLOC_SHIFT      _CACHE_L2ALLOC3_Q3CNT_SHIFT   
  #define  CACHE_L2ALLOC3_L2ALLOC_DEFAULT     CACHE_L2ALLOC3_Q3CNT_DEFAULT 
  #define  CACHE_L2ALLOC3_L2ALLOC_OF(x)       CACHE_L2ALLOC3_Q3CNT_OF(x)   

  #define  CACHE_L2ALLOC3_OF(x)            _VALUEOF(x)

  #define CACHE_L2ALLOC3_DEFAULT (Uint32)( \
     _PER_FDEFAULT(CACHE,L2ALLOC3,Q3CNT) \
  )

  #define CACHE_L2ALLOC3_RMK(q3cnt) (Uint32)( \
     _PER_FMK(CACHE,L2ALLOC3,Q3CNT,q3cnt) \
  )

  #define _CACHE_L2ALLOC3_FGET(FIELD)\
    _PER_FGET(_CACHE_L2ALLOC3_ADDR,CACHE,L2ALLOC3,##FIELD)

  #define _CACHE_L2ALLOC3_FSET(FIELD,field)\
    _PER_FSET(_CACHE_L2ALLOC3_ADDR,CACHE,L2ALLOC3,##FIELD,field)

  #define _CACHE_L2ALLOC3_FSETS(FIELD,SYM)\
    _PER_FSETS(_CACHE_L2ALLOC3_ADDR,CACHE,L2ALLOC3,##FIELD,##SYM)

#endif

/******************************************************************************\
* _____________________
* |                   |
* |  M A R            |
* |___________________|
*
* MAR0   - memory attribute register 0 (1)
* MAR1   - memory attribute register 1 (1)
* MAR2   - memory attribute register 2 (1)
* ...    - ...
* MARn   - memory attribute register n (2)
*
* Fields:
* (rw) NR (3)
* (rw) NW (3)
* (rw) PE (3)
* (rw) CE (4)
*
* (1) register values are read only for C6400 
* (2) n = 15 for C6211/C6711, n = 255 for C6400
* (3) only supported for C6400
* (4) only supported for C6211/C6711
* (5) MARn range for C6211/C6711 are from MAR0 ~ MAR15,
*     MARn range for C6400 are:
*     MAR0   ~ MAR2   : register values read only
*     MAR48  ~ MAR51  : McBSP0 
*     MAR52  ~ MAR55  : McBSP1 
*     MAR56  ~ MAR59  : McBSP2 
*     MAR60  ~ MAR63  : UTOPIAII 
*     MAR64  ~ MAR79  : HPI/PCI 
*     MAR96  ~ MAR111 : EMIFB (1)
*     MAR128 ~ MAR191 : EMIFA 
*
* (1) only in C6414, C6415, C6416 variants
\******************************************************************************/
#if (L2CACHE_SUPPORT && !C64_SUPPORT)
  #define _CACHE_MAR0_ADDR             _CACHE_MAR128_ADDR 
  #define _CACHE_MAR1_ADDR             _CACHE_MAR129_ADDR 
  #define _CACHE_MAR2_ADDR             _CACHE_MAR130_ADDR 
  #define _CACHE_MAR3_ADDR             _CACHE_MAR131_ADDR 
  #define _CACHE_MAR4_ADDR             _CACHE_MAR144_ADDR 
  #define _CACHE_MAR5_ADDR             _CACHE_MAR145_ADDR 
  #define _CACHE_MAR6_ADDR             _CACHE_MAR146_ADDR 
  #define _CACHE_MAR7_ADDR             _CACHE_MAR147_ADDR 
  #define _CACHE_MAR8_ADDR             _CACHE_MAR160_ADDR 
  #define _CACHE_MAR9_ADDR             _CACHE_MAR161_ADDR 
  #define _CACHE_MAR10_ADDR            _CACHE_MAR162_ADDR
  #define _CACHE_MAR11_ADDR            _CACHE_MAR163_ADDR
  #define _CACHE_MAR12_ADDR            _CACHE_MAR176_ADDR
  #define _CACHE_MAR13_ADDR            _CACHE_MAR177_ADDR
  #define _CACHE_MAR14_ADDR            _CACHE_MAR178_ADDR
  #define _CACHE_MAR15_ADDR            _CACHE_MAR179_ADDR

  #define _CACHE_MAR128_ADDR            0x01848200u
  #define _CACHE_MAR129_ADDR            0x01848204u
  #define _CACHE_MAR130_ADDR            0x01848208u
  #define _CACHE_MAR131_ADDR            0x0184820Cu
  #define _CACHE_MAR144_ADDR            0x01848240u
  #define _CACHE_MAR145_ADDR            0x01848244u
  #define _CACHE_MAR146_ADDR            0x01848248u
  #define _CACHE_MAR147_ADDR            0x0184824Cu
  #define _CACHE_MAR160_ADDR            0x01848280u
  #define _CACHE_MAR161_ADDR            0x01848284u
  #define _CACHE_MAR162_ADDR            0x01848288u
  #define _CACHE_MAR163_ADDR            0x0184828Cu
  #define _CACHE_MAR176_ADDR            0x018482C0u
  #define _CACHE_MAR177_ADDR            0x018482C4u
  #define _CACHE_MAR178_ADDR            0x018482C8u
  #define _CACHE_MAR179_ADDR            0x018482CCu

  #define _CACHE_MAR_CE_MASK           0x00000001u
  #define _CACHE_MAR_CE_SHIFT          0x00000000u
  #define  CACHE_MAR_CE_DEFAULT        0x00000000u
  #define  CACHE_MAR_CE_OF(x)          _VALUEOF(x)
  #define  CACHE_MAR_CE_DISABLE        0x00000000u
  #define  CACHE_MAR_CE_ENABLE         0x00000001u

  #define  CACHE_MAR_OF(x)             _VALUEOF(x)

  #define CACHE_MAR_DEFAULT (Uint32)( \
     _PER_FDEFAULT(CACHE,MAR,CE) \
  )

  #define CACHE_MAR_RMK(ce) (Uint32)( \
     _PER_FMK(CACHE,MAR,CE,ce) \
  )

  #define _CACHE_MAR_FGET(N,FIELD)\
    _PER_FGET(_CACHE_MAR##N##_ADDR,CACHE,MAR,##FIELD)

  #define _CACHE_MAR_FSET(N,FIELD,field)\
    _PER_FSET(_CACHE_MAR##N##_ADDR,CACHE,MAR,##FIELD,field)

  #define _CACHE_MAR_FSETS(N,FIELD,SYM)\
    _PER_FSETS(_CACHE_MAR##N##_ADDR,CACHE,MAR,##FIELD,##SYM)

  #define _CACHE_MAR0_FGET(FIELD)  _CACHE_MAR_FGET(128,##FIELD)
  #define _CACHE_MAR1_FGET(FIELD)  _CACHE_MAR_FGET(129,##FIELD)
  #define _CACHE_MAR2_FGET(FIELD)  _CACHE_MAR_FGET(130,##FIELD)
  #define _CACHE_MAR3_FGET(FIELD)  _CACHE_MAR_FGET(131,##FIELD)
  #define _CACHE_MAR4_FGET(FIELD)  _CACHE_MAR_FGET(144,##FIELD)
  #define _CACHE_MAR5_FGET(FIELD)  _CACHE_MAR_FGET(145,##FIELD)
  #define _CACHE_MAR6_FGET(FIELD)  _CACHE_MAR_FGET(146,##FIELD)
  #define _CACHE_MAR7_FGET(FIELD)  _CACHE_MAR_FGET(147,##FIELD)
  #define _CACHE_MAR8_FGET(FIELD)  _CACHE_MAR_FGET(160,##FIELD)
  #define _CACHE_MAR9_FGET(FIELD)  _CACHE_MAR_FGET(161,##FIELD)
  #define _CACHE_MAR10_FGET(FIELD) _CACHE_MAR_FGET(162,##FIELD)
  #define _CACHE_MAR11_FGET(FIELD) _CACHE_MAR_FGET(163,##FIELD)
  #define _CACHE_MAR12_FGET(FIELD) _CACHE_MAR_FGET(176,##FIELD)
  #define _CACHE_MAR13_FGET(FIELD) _CACHE_MAR_FGET(177,##FIELD)
  #define _CACHE_MAR14_FGET(FIELD) _CACHE_MAR_FGET(178,##FIELD)
  #define _CACHE_MAR15_FGET(FIELD) _CACHE_MAR_FGET(179,##FIELD)

  #define _CACHE_MAR0_FSET(FIELD,f)  _CACHE_MAR_FSET(128,##FIELD,f)
  #define _CACHE_MAR1_FSET(FIELD,f)  _CACHE_MAR_FSET(129,##FIELD,f)
  #define _CACHE_MAR2_FSET(FIELD,f)  _CACHE_MAR_FSET(130,##FIELD,f)
  #define _CACHE_MAR3_FSET(FIELD,f)  _CACHE_MAR_FSET(131,##FIELD,f)
  #define _CACHE_MAR4_FSET(FIELD,f)  _CACHE_MAR_FSET(144,##FIELD,f)
  #define _CACHE_MAR5_FSET(FIELD,f)  _CACHE_MAR_FSET(145,##FIELD,f)
  #define _CACHE_MAR6_FSET(FIELD,f)  _CACHE_MAR_FSET(146,##FIELD,f)
  #define _CACHE_MAR7_FSET(FIELD,f)  _CACHE_MAR_FSET(147,##FIELD,f)
  #define _CACHE_MAR8_FSET(FIELD,f)  _CACHE_MAR_FSET(160,##FIELD,f)
  #define _CACHE_MAR9_FSET(FIELD,f)  _CACHE_MAR_FSET(161,##FIELD,f)
  #define _CACHE_MAR10_FSET(FIELD,f) _CACHE_MAR_FSET(162,##FIELD,f)
  #define _CACHE_MAR11_FSET(FIELD,f) _CACHE_MAR_FSET(163,##FIELD,f)
  #define _CACHE_MAR12_FSET(FIELD,f) _CACHE_MAR_FSET(176,##FIELD,f)
  #define _CACHE_MAR13_FSET(FIELD,f) _CACHE_MAR_FSET(177,##FIELD,f)
  #define _CACHE_MAR14_FSET(FIELD,f) _CACHE_MAR_FSET(178,##FIELD,f)
  #define _CACHE_MAR15_FSET(FIELD,f) _CACHE_MAR_FSET(179,##FIELD,f)

  #define _CACHE_MAR0_FSETS(FIELD,SYM)  _CACHE_MAR_FSETS(128,##FIELD,##SYM)
  #define _CACHE_MAR1_FSETS(FIELD,SYM)  _CACHE_MAR_FSETS(129,##FIELD,##SYM)
  #define _CACHE_MAR2_FSETS(FIELD,SYM)  _CACHE_MAR_FSETS(130,##FIELD,##SYM)
  #define _CACHE_MAR3_FSETS(FIELD,SYM)  _CACHE_MAR_FSETS(131,##FIELD,##SYM)
  #define _CACHE_MAR4_FSETS(FIELD,SYM)  _CACHE_MAR_FSETS(144,##FIELD,##SYM)
  #define _CACHE_MAR5_FSETS(FIELD,SYM)  _CACHE_MAR_FSETS(145,##FIELD,##SYM)
  #define _CACHE_MAR6_FSETS(FIELD,SYM)  _CACHE_MAR_FSETS(146,##FIELD,##SYM)